mediatek,mtu3.txt 3.8 KB

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  1. The device node for Mediatek USB3.0 DRD controller
  2. Required properties:
  3. - compatible : should be "mediatek,<soc-model>-mtu3", "mediatek,mtu3",
  4. soc-model is the name of SoC, such as mt8173, mt2712 etc,
  5. when using "mediatek,mtu3" compatible string, you need SoC specific
  6. ones in addition, one of:
  7. - "mediatek,mt8173-mtu3"
  8. - reg : specifies physical base address and size of the registers
  9. - reg-names: should be "mac" for device IP and "ippc" for IP port control
  10. - interrupts : interrupt used by the device IP
  11. - power-domains : a phandle to USB power domain node to control USB's
  12. mtcmos
  13. - vusb33-supply : regulator of USB avdd3.3v
  14. - clocks : a list of phandle + clock-specifier pairs, one for each
  15. entry in clock-names
  16. - clock-names : must contain "sys_ck" for clock of controller,
  17. the following clocks are optional:
  18. "ref_ck", "mcu_ck" and "dam_ck";
  19. - phys : see usb-hcd.txt in the current directory
  20. - dr_mode : should be one of "host", "peripheral" or "otg",
  21. refer to usb/generic.txt
  22. Optional properties:
  23. - #address-cells, #size-cells : should be '2' if the device has sub-nodes
  24. with 'reg' property
  25. - ranges : allows valid 1:1 translation between child's address space and
  26. parent's address space
  27. - extcon : external connector for vbus and idpin changes detection, needed
  28. when supports dual-role mode.
  29. - vbus-supply : reference to the VBUS regulator, needed when supports
  30. dual-role mode.
  31. - pinctrl-names : a pinctrl state named "default" is optional, and need be
  32. defined if auto drd switch is enabled, that means the property dr_mode
  33. is set as "otg", and meanwhile the property "mediatek,enable-manual-drd"
  34. is not set.
  35. - pinctrl-0 : pin control group
  36. See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
  37. - maximum-speed : valid arguments are "super-speed", "high-speed" and
  38. "full-speed"; refer to usb/generic.txt
  39. - enable-manual-drd : supports manual dual-role switch via debugfs; usually
  40. used when receptacle is TYPE-A and also wants to support dual-role
  41. mode.
  42. - wakeup-source: enable USB remote wakeup of host mode.
  43. - mediatek,syscon-wakeup : phandle to syscon used to access the register
  44. of the USB wakeup glue layer between SSUSB and SPM; it depends on
  45. "wakeup-source", and has two arguments:
  46. - the first one : register base address of the glue layer in syscon;
  47. - the second one : hardware version of the glue layer
  48. - 1 : used by mt8173 etc
  49. - 2 : used by mt2712 etc
  50. - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
  51. bit1 for u3port1, ... etc;
  52. additionally the properties from usb-hcd.txt (in the current directory) are
  53. supported.
  54. Sub-nodes:
  55. The xhci should be added as subnode to mtu3 as shown in the following example
  56. if host mode is enabled. The DT binding details of xhci can be found in:
  57. Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
  58. Example:
  59. ssusb: usb@11271000 {
  60. compatible = "mediatek,mt8173-mtu3";
  61. reg = <0 0x11271000 0 0x3000>,
  62. <0 0x11280700 0 0x0100>;
  63. reg-names = "mac", "ippc";
  64. interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>;
  65. phys = <&phy_port0 PHY_TYPE_USB3>,
  66. <&phy_port1 PHY_TYPE_USB2>;
  67. power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
  68. clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>,
  69. <&pericfg CLK_PERI_USB0>,
  70. <&pericfg CLK_PERI_USB1>;
  71. clock-names = "sys_ck", "ref_ck";
  72. vusb33-supply = <&mt6397_vusb_reg>;
  73. vbus-supply = <&usb_p0_vbus>;
  74. extcon = <&extcon_usb>;
  75. dr_mode = "otg";
  76. wakeup-source;
  77. mediatek,syscon-wakeup = <&pericfg 0x400 1>;
  78. #address-cells = <2>;
  79. #size-cells = <2>;
  80. ranges;
  81. usb_host: xhci@11270000 {
  82. compatible = "mediatek,mt8173-xhci";
  83. reg = <0 0x11270000 0 0x1000>;
  84. reg-names = "mac";
  85. interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
  86. power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
  87. clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
  88. clock-names = "sys_ck", "ref_ck";
  89. vusb33-supply = <&mt6397_vusb_reg>;
  90. };
  91. };