core.c 28 KB

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  1. /*
  2. * Filename: core.c
  3. *
  4. *
  5. * Authors: Joshua Morris <josh.h.morris@us.ibm.com>
  6. * Philip Kelleher <pjk1939@linux.vnet.ibm.com>
  7. *
  8. * (C) Copyright 2013 IBM Corporation
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of the
  13. * License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  18. * General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software Foundation,
  22. * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23. */
  24. #include <linux/kernel.h>
  25. #include <linux/init.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/module.h>
  28. #include <linux/pci.h>
  29. #include <linux/reboot.h>
  30. #include <linux/slab.h>
  31. #include <linux/bitops.h>
  32. #include <linux/delay.h>
  33. #include <linux/debugfs.h>
  34. #include <linux/seq_file.h>
  35. #include <linux/genhd.h>
  36. #include <linux/idr.h>
  37. #include "rsxx_priv.h"
  38. #include "rsxx_cfg.h"
  39. #define NO_LEGACY 0
  40. #define SYNC_START_TIMEOUT (10 * 60) /* 10 minutes */
  41. MODULE_DESCRIPTION("IBM Flash Adapter 900GB Full Height Device Driver");
  42. MODULE_AUTHOR("Joshua Morris/Philip Kelleher, IBM");
  43. MODULE_LICENSE("GPL");
  44. MODULE_VERSION(DRIVER_VERSION);
  45. static unsigned int force_legacy = NO_LEGACY;
  46. module_param(force_legacy, uint, 0444);
  47. MODULE_PARM_DESC(force_legacy, "Force the use of legacy type PCI interrupts");
  48. static unsigned int sync_start = 1;
  49. module_param(sync_start, uint, 0444);
  50. MODULE_PARM_DESC(sync_start, "On by Default: Driver load will not complete "
  51. "until the card startup has completed.");
  52. static DEFINE_IDA(rsxx_disk_ida);
  53. /* --------------------Debugfs Setup ------------------- */
  54. static int rsxx_attr_pci_regs_show(struct seq_file *m, void *p)
  55. {
  56. struct rsxx_cardinfo *card = m->private;
  57. seq_printf(m, "HWID 0x%08x\n",
  58. ioread32(card->regmap + HWID));
  59. seq_printf(m, "SCRATCH 0x%08x\n",
  60. ioread32(card->regmap + SCRATCH));
  61. seq_printf(m, "IER 0x%08x\n",
  62. ioread32(card->regmap + IER));
  63. seq_printf(m, "IPR 0x%08x\n",
  64. ioread32(card->regmap + IPR));
  65. seq_printf(m, "CREG_CMD 0x%08x\n",
  66. ioread32(card->regmap + CREG_CMD));
  67. seq_printf(m, "CREG_ADD 0x%08x\n",
  68. ioread32(card->regmap + CREG_ADD));
  69. seq_printf(m, "CREG_CNT 0x%08x\n",
  70. ioread32(card->regmap + CREG_CNT));
  71. seq_printf(m, "CREG_STAT 0x%08x\n",
  72. ioread32(card->regmap + CREG_STAT));
  73. seq_printf(m, "CREG_DATA0 0x%08x\n",
  74. ioread32(card->regmap + CREG_DATA0));
  75. seq_printf(m, "CREG_DATA1 0x%08x\n",
  76. ioread32(card->regmap + CREG_DATA1));
  77. seq_printf(m, "CREG_DATA2 0x%08x\n",
  78. ioread32(card->regmap + CREG_DATA2));
  79. seq_printf(m, "CREG_DATA3 0x%08x\n",
  80. ioread32(card->regmap + CREG_DATA3));
  81. seq_printf(m, "CREG_DATA4 0x%08x\n",
  82. ioread32(card->regmap + CREG_DATA4));
  83. seq_printf(m, "CREG_DATA5 0x%08x\n",
  84. ioread32(card->regmap + CREG_DATA5));
  85. seq_printf(m, "CREG_DATA6 0x%08x\n",
  86. ioread32(card->regmap + CREG_DATA6));
  87. seq_printf(m, "CREG_DATA7 0x%08x\n",
  88. ioread32(card->regmap + CREG_DATA7));
  89. seq_printf(m, "INTR_COAL 0x%08x\n",
  90. ioread32(card->regmap + INTR_COAL));
  91. seq_printf(m, "HW_ERROR 0x%08x\n",
  92. ioread32(card->regmap + HW_ERROR));
  93. seq_printf(m, "DEBUG0 0x%08x\n",
  94. ioread32(card->regmap + PCI_DEBUG0));
  95. seq_printf(m, "DEBUG1 0x%08x\n",
  96. ioread32(card->regmap + PCI_DEBUG1));
  97. seq_printf(m, "DEBUG2 0x%08x\n",
  98. ioread32(card->regmap + PCI_DEBUG2));
  99. seq_printf(m, "DEBUG3 0x%08x\n",
  100. ioread32(card->regmap + PCI_DEBUG3));
  101. seq_printf(m, "DEBUG4 0x%08x\n",
  102. ioread32(card->regmap + PCI_DEBUG4));
  103. seq_printf(m, "DEBUG5 0x%08x\n",
  104. ioread32(card->regmap + PCI_DEBUG5));
  105. seq_printf(m, "DEBUG6 0x%08x\n",
  106. ioread32(card->regmap + PCI_DEBUG6));
  107. seq_printf(m, "DEBUG7 0x%08x\n",
  108. ioread32(card->regmap + PCI_DEBUG7));
  109. seq_printf(m, "RECONFIG 0x%08x\n",
  110. ioread32(card->regmap + PCI_RECONFIG));
  111. return 0;
  112. }
  113. static int rsxx_attr_stats_show(struct seq_file *m, void *p)
  114. {
  115. struct rsxx_cardinfo *card = m->private;
  116. int i;
  117. for (i = 0; i < card->n_targets; i++) {
  118. seq_printf(m, "Ctrl %d CRC Errors = %d\n",
  119. i, card->ctrl[i].stats.crc_errors);
  120. seq_printf(m, "Ctrl %d Hard Errors = %d\n",
  121. i, card->ctrl[i].stats.hard_errors);
  122. seq_printf(m, "Ctrl %d Soft Errors = %d\n",
  123. i, card->ctrl[i].stats.soft_errors);
  124. seq_printf(m, "Ctrl %d Writes Issued = %d\n",
  125. i, card->ctrl[i].stats.writes_issued);
  126. seq_printf(m, "Ctrl %d Writes Failed = %d\n",
  127. i, card->ctrl[i].stats.writes_failed);
  128. seq_printf(m, "Ctrl %d Reads Issued = %d\n",
  129. i, card->ctrl[i].stats.reads_issued);
  130. seq_printf(m, "Ctrl %d Reads Failed = %d\n",
  131. i, card->ctrl[i].stats.reads_failed);
  132. seq_printf(m, "Ctrl %d Reads Retried = %d\n",
  133. i, card->ctrl[i].stats.reads_retried);
  134. seq_printf(m, "Ctrl %d Discards Issued = %d\n",
  135. i, card->ctrl[i].stats.discards_issued);
  136. seq_printf(m, "Ctrl %d Discards Failed = %d\n",
  137. i, card->ctrl[i].stats.discards_failed);
  138. seq_printf(m, "Ctrl %d DMA SW Errors = %d\n",
  139. i, card->ctrl[i].stats.dma_sw_err);
  140. seq_printf(m, "Ctrl %d DMA HW Faults = %d\n",
  141. i, card->ctrl[i].stats.dma_hw_fault);
  142. seq_printf(m, "Ctrl %d DMAs Cancelled = %d\n",
  143. i, card->ctrl[i].stats.dma_cancelled);
  144. seq_printf(m, "Ctrl %d SW Queue Depth = %d\n",
  145. i, card->ctrl[i].stats.sw_q_depth);
  146. seq_printf(m, "Ctrl %d HW Queue Depth = %d\n",
  147. i, atomic_read(&card->ctrl[i].stats.hw_q_depth));
  148. }
  149. return 0;
  150. }
  151. static int rsxx_attr_stats_open(struct inode *inode, struct file *file)
  152. {
  153. return single_open(file, rsxx_attr_stats_show, inode->i_private);
  154. }
  155. static int rsxx_attr_pci_regs_open(struct inode *inode, struct file *file)
  156. {
  157. return single_open(file, rsxx_attr_pci_regs_show, inode->i_private);
  158. }
  159. static ssize_t rsxx_cram_read(struct file *fp, char __user *ubuf,
  160. size_t cnt, loff_t *ppos)
  161. {
  162. struct rsxx_cardinfo *card = file_inode(fp)->i_private;
  163. char *buf;
  164. int st;
  165. buf = kzalloc(cnt, GFP_KERNEL);
  166. if (!buf)
  167. return -ENOMEM;
  168. st = rsxx_creg_read(card, CREG_ADD_CRAM + (u32)*ppos, cnt, buf, 1);
  169. if (!st) {
  170. if (copy_to_user(ubuf, buf, cnt))
  171. st = -EFAULT;
  172. }
  173. kfree(buf);
  174. if (st)
  175. return st;
  176. *ppos += cnt;
  177. return cnt;
  178. }
  179. static ssize_t rsxx_cram_write(struct file *fp, const char __user *ubuf,
  180. size_t cnt, loff_t *ppos)
  181. {
  182. struct rsxx_cardinfo *card = file_inode(fp)->i_private;
  183. char *buf;
  184. ssize_t st;
  185. buf = memdup_user(ubuf, cnt);
  186. if (IS_ERR(buf))
  187. return PTR_ERR(buf);
  188. st = rsxx_creg_write(card, CREG_ADD_CRAM + (u32)*ppos, cnt, buf, 1);
  189. kfree(buf);
  190. if (st)
  191. return st;
  192. *ppos += cnt;
  193. return cnt;
  194. }
  195. static const struct file_operations debugfs_cram_fops = {
  196. .owner = THIS_MODULE,
  197. .read = rsxx_cram_read,
  198. .write = rsxx_cram_write,
  199. };
  200. static const struct file_operations debugfs_stats_fops = {
  201. .owner = THIS_MODULE,
  202. .open = rsxx_attr_stats_open,
  203. .read = seq_read,
  204. .llseek = seq_lseek,
  205. .release = single_release,
  206. };
  207. static const struct file_operations debugfs_pci_regs_fops = {
  208. .owner = THIS_MODULE,
  209. .open = rsxx_attr_pci_regs_open,
  210. .read = seq_read,
  211. .llseek = seq_lseek,
  212. .release = single_release,
  213. };
  214. static void rsxx_debugfs_dev_new(struct rsxx_cardinfo *card)
  215. {
  216. struct dentry *debugfs_stats;
  217. struct dentry *debugfs_pci_regs;
  218. struct dentry *debugfs_cram;
  219. card->debugfs_dir = debugfs_create_dir(card->gendisk->disk_name, NULL);
  220. if (IS_ERR_OR_NULL(card->debugfs_dir))
  221. goto failed_debugfs_dir;
  222. debugfs_stats = debugfs_create_file("stats", 0444,
  223. card->debugfs_dir, card,
  224. &debugfs_stats_fops);
  225. if (IS_ERR_OR_NULL(debugfs_stats))
  226. goto failed_debugfs_stats;
  227. debugfs_pci_regs = debugfs_create_file("pci_regs", 0444,
  228. card->debugfs_dir, card,
  229. &debugfs_pci_regs_fops);
  230. if (IS_ERR_OR_NULL(debugfs_pci_regs))
  231. goto failed_debugfs_pci_regs;
  232. debugfs_cram = debugfs_create_file("cram", 0644,
  233. card->debugfs_dir, card,
  234. &debugfs_cram_fops);
  235. if (IS_ERR_OR_NULL(debugfs_cram))
  236. goto failed_debugfs_cram;
  237. return;
  238. failed_debugfs_cram:
  239. debugfs_remove(debugfs_pci_regs);
  240. failed_debugfs_pci_regs:
  241. debugfs_remove(debugfs_stats);
  242. failed_debugfs_stats:
  243. debugfs_remove(card->debugfs_dir);
  244. failed_debugfs_dir:
  245. card->debugfs_dir = NULL;
  246. }
  247. /*----------------- Interrupt Control & Handling -------------------*/
  248. static void rsxx_mask_interrupts(struct rsxx_cardinfo *card)
  249. {
  250. card->isr_mask = 0;
  251. card->ier_mask = 0;
  252. }
  253. static void __enable_intr(unsigned int *mask, unsigned int intr)
  254. {
  255. *mask |= intr;
  256. }
  257. static void __disable_intr(unsigned int *mask, unsigned int intr)
  258. {
  259. *mask &= ~intr;
  260. }
  261. /*
  262. * NOTE: Disabling the IER will disable the hardware interrupt.
  263. * Disabling the ISR will disable the software handling of the ISR bit.
  264. *
  265. * Enable/Disable interrupt functions assume the card->irq_lock
  266. * is held by the caller.
  267. */
  268. void rsxx_enable_ier(struct rsxx_cardinfo *card, unsigned int intr)
  269. {
  270. if (unlikely(card->halt) ||
  271. unlikely(card->eeh_state))
  272. return;
  273. __enable_intr(&card->ier_mask, intr);
  274. iowrite32(card->ier_mask, card->regmap + IER);
  275. }
  276. void rsxx_disable_ier(struct rsxx_cardinfo *card, unsigned int intr)
  277. {
  278. if (unlikely(card->eeh_state))
  279. return;
  280. __disable_intr(&card->ier_mask, intr);
  281. iowrite32(card->ier_mask, card->regmap + IER);
  282. }
  283. void rsxx_enable_ier_and_isr(struct rsxx_cardinfo *card,
  284. unsigned int intr)
  285. {
  286. if (unlikely(card->halt) ||
  287. unlikely(card->eeh_state))
  288. return;
  289. __enable_intr(&card->isr_mask, intr);
  290. __enable_intr(&card->ier_mask, intr);
  291. iowrite32(card->ier_mask, card->regmap + IER);
  292. }
  293. void rsxx_disable_ier_and_isr(struct rsxx_cardinfo *card,
  294. unsigned int intr)
  295. {
  296. if (unlikely(card->eeh_state))
  297. return;
  298. __disable_intr(&card->isr_mask, intr);
  299. __disable_intr(&card->ier_mask, intr);
  300. iowrite32(card->ier_mask, card->regmap + IER);
  301. }
  302. static irqreturn_t rsxx_isr(int irq, void *pdata)
  303. {
  304. struct rsxx_cardinfo *card = pdata;
  305. unsigned int isr;
  306. int handled = 0;
  307. int reread_isr;
  308. int i;
  309. spin_lock(&card->irq_lock);
  310. do {
  311. reread_isr = 0;
  312. if (unlikely(card->eeh_state))
  313. break;
  314. isr = ioread32(card->regmap + ISR);
  315. if (isr == 0xffffffff) {
  316. /*
  317. * A few systems seem to have an intermittent issue
  318. * where PCI reads return all Fs, but retrying the read
  319. * a little later will return as expected.
  320. */
  321. dev_info(CARD_TO_DEV(card),
  322. "ISR = 0xFFFFFFFF, retrying later\n");
  323. break;
  324. }
  325. isr &= card->isr_mask;
  326. if (!isr)
  327. break;
  328. for (i = 0; i < card->n_targets; i++) {
  329. if (isr & CR_INTR_DMA(i)) {
  330. if (card->ier_mask & CR_INTR_DMA(i)) {
  331. rsxx_disable_ier(card, CR_INTR_DMA(i));
  332. reread_isr = 1;
  333. }
  334. queue_work(card->ctrl[i].done_wq,
  335. &card->ctrl[i].dma_done_work);
  336. handled++;
  337. }
  338. }
  339. if (isr & CR_INTR_CREG) {
  340. queue_work(card->creg_ctrl.creg_wq,
  341. &card->creg_ctrl.done_work);
  342. handled++;
  343. }
  344. if (isr & CR_INTR_EVENT) {
  345. queue_work(card->event_wq, &card->event_work);
  346. rsxx_disable_ier_and_isr(card, CR_INTR_EVENT);
  347. handled++;
  348. }
  349. } while (reread_isr);
  350. spin_unlock(&card->irq_lock);
  351. return handled ? IRQ_HANDLED : IRQ_NONE;
  352. }
  353. /*----------------- Card Event Handler -------------------*/
  354. static const char * const rsxx_card_state_to_str(unsigned int state)
  355. {
  356. static const char * const state_strings[] = {
  357. "Unknown", "Shutdown", "Starting", "Formatting",
  358. "Uninitialized", "Good", "Shutting Down",
  359. "Fault", "Read Only Fault", "dStroying"
  360. };
  361. return state_strings[ffs(state)];
  362. }
  363. static void card_state_change(struct rsxx_cardinfo *card,
  364. unsigned int new_state)
  365. {
  366. int st;
  367. dev_info(CARD_TO_DEV(card),
  368. "card state change detected.(%s -> %s)\n",
  369. rsxx_card_state_to_str(card->state),
  370. rsxx_card_state_to_str(new_state));
  371. card->state = new_state;
  372. /* Don't attach DMA interfaces if the card has an invalid config */
  373. if (!card->config_valid)
  374. return;
  375. switch (new_state) {
  376. case CARD_STATE_RD_ONLY_FAULT:
  377. dev_crit(CARD_TO_DEV(card),
  378. "Hardware has entered read-only mode!\n");
  379. /*
  380. * Fall through so the DMA devices can be attached and
  381. * the user can attempt to pull off their data.
  382. */
  383. case CARD_STATE_GOOD:
  384. st = rsxx_get_card_size8(card, &card->size8);
  385. if (st)
  386. dev_err(CARD_TO_DEV(card),
  387. "Failed attaching DMA devices\n");
  388. if (card->config_valid)
  389. set_capacity(card->gendisk, card->size8 >> 9);
  390. break;
  391. case CARD_STATE_FAULT:
  392. dev_crit(CARD_TO_DEV(card),
  393. "Hardware Fault reported!\n");
  394. /* Fall through. */
  395. /* Everything else, detach DMA interface if it's attached. */
  396. case CARD_STATE_SHUTDOWN:
  397. case CARD_STATE_STARTING:
  398. case CARD_STATE_FORMATTING:
  399. case CARD_STATE_UNINITIALIZED:
  400. case CARD_STATE_SHUTTING_DOWN:
  401. /*
  402. * dStroy is a term coined by marketing to represent the low level
  403. * secure erase.
  404. */
  405. case CARD_STATE_DSTROYING:
  406. set_capacity(card->gendisk, 0);
  407. break;
  408. }
  409. }
  410. static void card_event_handler(struct work_struct *work)
  411. {
  412. struct rsxx_cardinfo *card;
  413. unsigned int state;
  414. unsigned long flags;
  415. int st;
  416. card = container_of(work, struct rsxx_cardinfo, event_work);
  417. if (unlikely(card->halt))
  418. return;
  419. /*
  420. * Enable the interrupt now to avoid any weird race conditions where a
  421. * state change might occur while rsxx_get_card_state() is
  422. * processing a returned creg cmd.
  423. */
  424. spin_lock_irqsave(&card->irq_lock, flags);
  425. rsxx_enable_ier_and_isr(card, CR_INTR_EVENT);
  426. spin_unlock_irqrestore(&card->irq_lock, flags);
  427. st = rsxx_get_card_state(card, &state);
  428. if (st) {
  429. dev_info(CARD_TO_DEV(card),
  430. "Failed reading state after event.\n");
  431. return;
  432. }
  433. if (card->state != state)
  434. card_state_change(card, state);
  435. if (card->creg_ctrl.creg_stats.stat & CREG_STAT_LOG_PENDING)
  436. rsxx_read_hw_log(card);
  437. }
  438. /*----------------- Card Operations -------------------*/
  439. static int card_shutdown(struct rsxx_cardinfo *card)
  440. {
  441. unsigned int state;
  442. signed long start;
  443. const int timeout = msecs_to_jiffies(120000);
  444. int st;
  445. /* We can't issue a shutdown if the card is in a transition state */
  446. start = jiffies;
  447. do {
  448. st = rsxx_get_card_state(card, &state);
  449. if (st)
  450. return st;
  451. } while (state == CARD_STATE_STARTING &&
  452. (jiffies - start < timeout));
  453. if (state == CARD_STATE_STARTING)
  454. return -ETIMEDOUT;
  455. /* Only issue a shutdown if we need to */
  456. if ((state != CARD_STATE_SHUTTING_DOWN) &&
  457. (state != CARD_STATE_SHUTDOWN)) {
  458. st = rsxx_issue_card_cmd(card, CARD_CMD_SHUTDOWN);
  459. if (st)
  460. return st;
  461. }
  462. start = jiffies;
  463. do {
  464. st = rsxx_get_card_state(card, &state);
  465. if (st)
  466. return st;
  467. } while (state != CARD_STATE_SHUTDOWN &&
  468. (jiffies - start < timeout));
  469. if (state != CARD_STATE_SHUTDOWN)
  470. return -ETIMEDOUT;
  471. return 0;
  472. }
  473. static int rsxx_eeh_frozen(struct pci_dev *dev)
  474. {
  475. struct rsxx_cardinfo *card = pci_get_drvdata(dev);
  476. int i;
  477. int st;
  478. dev_warn(&dev->dev, "IBM Flash Adapter PCI: preparing for slot reset.\n");
  479. card->eeh_state = 1;
  480. rsxx_mask_interrupts(card);
  481. /*
  482. * We need to guarantee that the write for eeh_state and masking
  483. * interrupts does not become reordered. This will prevent a possible
  484. * race condition with the EEH code.
  485. */
  486. wmb();
  487. pci_disable_device(dev);
  488. st = rsxx_eeh_save_issued_dmas(card);
  489. if (st)
  490. return st;
  491. rsxx_eeh_save_issued_creg(card);
  492. for (i = 0; i < card->n_targets; i++) {
  493. if (card->ctrl[i].status.buf)
  494. pci_free_consistent(card->dev, STATUS_BUFFER_SIZE8,
  495. card->ctrl[i].status.buf,
  496. card->ctrl[i].status.dma_addr);
  497. if (card->ctrl[i].cmd.buf)
  498. pci_free_consistent(card->dev, COMMAND_BUFFER_SIZE8,
  499. card->ctrl[i].cmd.buf,
  500. card->ctrl[i].cmd.dma_addr);
  501. }
  502. return 0;
  503. }
  504. static void rsxx_eeh_failure(struct pci_dev *dev)
  505. {
  506. struct rsxx_cardinfo *card = pci_get_drvdata(dev);
  507. int i;
  508. int cnt = 0;
  509. dev_err(&dev->dev, "IBM Flash Adapter PCI: disabling failed card.\n");
  510. card->eeh_state = 1;
  511. card->halt = 1;
  512. for (i = 0; i < card->n_targets; i++) {
  513. spin_lock_bh(&card->ctrl[i].queue_lock);
  514. cnt = rsxx_cleanup_dma_queue(&card->ctrl[i],
  515. &card->ctrl[i].queue,
  516. COMPLETE_DMA);
  517. spin_unlock_bh(&card->ctrl[i].queue_lock);
  518. cnt += rsxx_dma_cancel(&card->ctrl[i]);
  519. if (cnt)
  520. dev_info(CARD_TO_DEV(card),
  521. "Freed %d queued DMAs on channel %d\n",
  522. cnt, card->ctrl[i].id);
  523. }
  524. }
  525. static int rsxx_eeh_fifo_flush_poll(struct rsxx_cardinfo *card)
  526. {
  527. unsigned int status;
  528. int iter = 0;
  529. /* We need to wait for the hardware to reset */
  530. while (iter++ < 10) {
  531. status = ioread32(card->regmap + PCI_RECONFIG);
  532. if (status & RSXX_FLUSH_BUSY) {
  533. ssleep(1);
  534. continue;
  535. }
  536. if (status & RSXX_FLUSH_TIMEOUT)
  537. dev_warn(CARD_TO_DEV(card), "HW: flash controller timeout\n");
  538. return 0;
  539. }
  540. /* Hardware failed resetting itself. */
  541. return -1;
  542. }
  543. static pci_ers_result_t rsxx_error_detected(struct pci_dev *dev,
  544. enum pci_channel_state error)
  545. {
  546. int st;
  547. if (dev->revision < RSXX_EEH_SUPPORT)
  548. return PCI_ERS_RESULT_NONE;
  549. if (error == pci_channel_io_perm_failure) {
  550. rsxx_eeh_failure(dev);
  551. return PCI_ERS_RESULT_DISCONNECT;
  552. }
  553. st = rsxx_eeh_frozen(dev);
  554. if (st) {
  555. dev_err(&dev->dev, "Slot reset setup failed\n");
  556. rsxx_eeh_failure(dev);
  557. return PCI_ERS_RESULT_DISCONNECT;
  558. }
  559. return PCI_ERS_RESULT_NEED_RESET;
  560. }
  561. static pci_ers_result_t rsxx_slot_reset(struct pci_dev *dev)
  562. {
  563. struct rsxx_cardinfo *card = pci_get_drvdata(dev);
  564. unsigned long flags;
  565. int i;
  566. int st;
  567. dev_warn(&dev->dev,
  568. "IBM Flash Adapter PCI: recovering from slot reset.\n");
  569. st = pci_enable_device(dev);
  570. if (st)
  571. goto failed_hw_setup;
  572. pci_set_master(dev);
  573. st = rsxx_eeh_fifo_flush_poll(card);
  574. if (st)
  575. goto failed_hw_setup;
  576. rsxx_dma_queue_reset(card);
  577. for (i = 0; i < card->n_targets; i++) {
  578. st = rsxx_hw_buffers_init(dev, &card->ctrl[i]);
  579. if (st)
  580. goto failed_hw_buffers_init;
  581. }
  582. if (card->config_valid)
  583. rsxx_dma_configure(card);
  584. /* Clears the ISR register from spurious interrupts */
  585. st = ioread32(card->regmap + ISR);
  586. card->eeh_state = 0;
  587. spin_lock_irqsave(&card->irq_lock, flags);
  588. if (card->n_targets & RSXX_MAX_TARGETS)
  589. rsxx_enable_ier_and_isr(card, CR_INTR_ALL_G);
  590. else
  591. rsxx_enable_ier_and_isr(card, CR_INTR_ALL_C);
  592. spin_unlock_irqrestore(&card->irq_lock, flags);
  593. rsxx_kick_creg_queue(card);
  594. for (i = 0; i < card->n_targets; i++) {
  595. spin_lock(&card->ctrl[i].queue_lock);
  596. if (list_empty(&card->ctrl[i].queue)) {
  597. spin_unlock(&card->ctrl[i].queue_lock);
  598. continue;
  599. }
  600. spin_unlock(&card->ctrl[i].queue_lock);
  601. queue_work(card->ctrl[i].issue_wq,
  602. &card->ctrl[i].issue_dma_work);
  603. }
  604. dev_info(&dev->dev, "IBM Flash Adapter PCI: recovery complete.\n");
  605. return PCI_ERS_RESULT_RECOVERED;
  606. failed_hw_buffers_init:
  607. for (i = 0; i < card->n_targets; i++) {
  608. if (card->ctrl[i].status.buf)
  609. pci_free_consistent(card->dev,
  610. STATUS_BUFFER_SIZE8,
  611. card->ctrl[i].status.buf,
  612. card->ctrl[i].status.dma_addr);
  613. if (card->ctrl[i].cmd.buf)
  614. pci_free_consistent(card->dev,
  615. COMMAND_BUFFER_SIZE8,
  616. card->ctrl[i].cmd.buf,
  617. card->ctrl[i].cmd.dma_addr);
  618. }
  619. failed_hw_setup:
  620. rsxx_eeh_failure(dev);
  621. return PCI_ERS_RESULT_DISCONNECT;
  622. }
  623. /*----------------- Driver Initialization & Setup -------------------*/
  624. /* Returns: 0 if the driver is compatible with the device
  625. -1 if the driver is NOT compatible with the device */
  626. static int rsxx_compatibility_check(struct rsxx_cardinfo *card)
  627. {
  628. unsigned char pci_rev;
  629. pci_read_config_byte(card->dev, PCI_REVISION_ID, &pci_rev);
  630. if (pci_rev > RS70_PCI_REV_SUPPORTED)
  631. return -1;
  632. return 0;
  633. }
  634. static int rsxx_pci_probe(struct pci_dev *dev,
  635. const struct pci_device_id *id)
  636. {
  637. struct rsxx_cardinfo *card;
  638. int st;
  639. unsigned int sync_timeout;
  640. dev_info(&dev->dev, "PCI-Flash SSD discovered\n");
  641. card = kzalloc(sizeof(*card), GFP_KERNEL);
  642. if (!card)
  643. return -ENOMEM;
  644. card->dev = dev;
  645. pci_set_drvdata(dev, card);
  646. st = ida_alloc(&rsxx_disk_ida, GFP_KERNEL);
  647. if (st < 0)
  648. goto failed_ida_get;
  649. card->disk_id = st;
  650. st = pci_enable_device(dev);
  651. if (st)
  652. goto failed_enable;
  653. pci_set_master(dev);
  654. pci_set_dma_max_seg_size(dev, RSXX_HW_BLK_SIZE);
  655. st = pci_set_dma_mask(dev, DMA_BIT_MASK(64));
  656. if (st) {
  657. dev_err(CARD_TO_DEV(card),
  658. "No usable DMA configuration,aborting\n");
  659. goto failed_dma_mask;
  660. }
  661. st = pci_request_regions(dev, DRIVER_NAME);
  662. if (st) {
  663. dev_err(CARD_TO_DEV(card),
  664. "Failed to request memory region\n");
  665. goto failed_request_regions;
  666. }
  667. if (pci_resource_len(dev, 0) == 0) {
  668. dev_err(CARD_TO_DEV(card), "BAR0 has length 0!\n");
  669. st = -ENOMEM;
  670. goto failed_iomap;
  671. }
  672. card->regmap = pci_iomap(dev, 0, 0);
  673. if (!card->regmap) {
  674. dev_err(CARD_TO_DEV(card), "Failed to map BAR0\n");
  675. st = -ENOMEM;
  676. goto failed_iomap;
  677. }
  678. spin_lock_init(&card->irq_lock);
  679. card->halt = 0;
  680. card->eeh_state = 0;
  681. spin_lock_irq(&card->irq_lock);
  682. rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
  683. spin_unlock_irq(&card->irq_lock);
  684. if (!force_legacy) {
  685. st = pci_enable_msi(dev);
  686. if (st)
  687. dev_warn(CARD_TO_DEV(card),
  688. "Failed to enable MSI\n");
  689. }
  690. st = request_irq(dev->irq, rsxx_isr, IRQF_SHARED,
  691. DRIVER_NAME, card);
  692. if (st) {
  693. dev_err(CARD_TO_DEV(card),
  694. "Failed requesting IRQ%d\n", dev->irq);
  695. goto failed_irq;
  696. }
  697. /************* Setup Processor Command Interface *************/
  698. st = rsxx_creg_setup(card);
  699. if (st) {
  700. dev_err(CARD_TO_DEV(card), "Failed to setup creg interface.\n");
  701. goto failed_creg_setup;
  702. }
  703. spin_lock_irq(&card->irq_lock);
  704. rsxx_enable_ier_and_isr(card, CR_INTR_CREG);
  705. spin_unlock_irq(&card->irq_lock);
  706. st = rsxx_compatibility_check(card);
  707. if (st) {
  708. dev_warn(CARD_TO_DEV(card),
  709. "Incompatible driver detected. Please update the driver.\n");
  710. st = -EINVAL;
  711. goto failed_compatiblity_check;
  712. }
  713. /************* Load Card Config *************/
  714. st = rsxx_load_config(card);
  715. if (st)
  716. dev_err(CARD_TO_DEV(card),
  717. "Failed loading card config\n");
  718. /************* Setup DMA Engine *************/
  719. st = rsxx_get_num_targets(card, &card->n_targets);
  720. if (st)
  721. dev_info(CARD_TO_DEV(card),
  722. "Failed reading the number of DMA targets\n");
  723. card->ctrl = kcalloc(card->n_targets, sizeof(*card->ctrl),
  724. GFP_KERNEL);
  725. if (!card->ctrl) {
  726. st = -ENOMEM;
  727. goto failed_dma_setup;
  728. }
  729. st = rsxx_dma_setup(card);
  730. if (st) {
  731. dev_info(CARD_TO_DEV(card),
  732. "Failed to setup DMA engine\n");
  733. goto failed_dma_setup;
  734. }
  735. /************* Setup Card Event Handler *************/
  736. card->event_wq = create_singlethread_workqueue(DRIVER_NAME"_event");
  737. if (!card->event_wq) {
  738. dev_err(CARD_TO_DEV(card), "Failed card event setup.\n");
  739. st = -ENOMEM;
  740. goto failed_event_handler;
  741. }
  742. INIT_WORK(&card->event_work, card_event_handler);
  743. st = rsxx_setup_dev(card);
  744. if (st)
  745. goto failed_create_dev;
  746. rsxx_get_card_state(card, &card->state);
  747. dev_info(CARD_TO_DEV(card),
  748. "card state: %s\n",
  749. rsxx_card_state_to_str(card->state));
  750. /*
  751. * Now that the DMA Engine and devices have been setup,
  752. * we can enable the event interrupt(it kicks off actions in
  753. * those layers so we couldn't enable it right away.)
  754. */
  755. spin_lock_irq(&card->irq_lock);
  756. rsxx_enable_ier_and_isr(card, CR_INTR_EVENT);
  757. spin_unlock_irq(&card->irq_lock);
  758. if (card->state == CARD_STATE_SHUTDOWN) {
  759. st = rsxx_issue_card_cmd(card, CARD_CMD_STARTUP);
  760. if (st)
  761. dev_crit(CARD_TO_DEV(card),
  762. "Failed issuing card startup\n");
  763. if (sync_start) {
  764. sync_timeout = SYNC_START_TIMEOUT;
  765. dev_info(CARD_TO_DEV(card),
  766. "Waiting for card to startup\n");
  767. do {
  768. ssleep(1);
  769. sync_timeout--;
  770. rsxx_get_card_state(card, &card->state);
  771. } while (sync_timeout &&
  772. (card->state == CARD_STATE_STARTING));
  773. if (card->state == CARD_STATE_STARTING) {
  774. dev_warn(CARD_TO_DEV(card),
  775. "Card startup timed out\n");
  776. card->size8 = 0;
  777. } else {
  778. dev_info(CARD_TO_DEV(card),
  779. "card state: %s\n",
  780. rsxx_card_state_to_str(card->state));
  781. st = rsxx_get_card_size8(card, &card->size8);
  782. if (st)
  783. card->size8 = 0;
  784. }
  785. }
  786. } else if (card->state == CARD_STATE_GOOD ||
  787. card->state == CARD_STATE_RD_ONLY_FAULT) {
  788. st = rsxx_get_card_size8(card, &card->size8);
  789. if (st)
  790. card->size8 = 0;
  791. }
  792. rsxx_attach_dev(card);
  793. /************* Setup Debugfs *************/
  794. rsxx_debugfs_dev_new(card);
  795. return 0;
  796. failed_create_dev:
  797. destroy_workqueue(card->event_wq);
  798. card->event_wq = NULL;
  799. failed_event_handler:
  800. rsxx_dma_destroy(card);
  801. failed_dma_setup:
  802. failed_compatiblity_check:
  803. destroy_workqueue(card->creg_ctrl.creg_wq);
  804. card->creg_ctrl.creg_wq = NULL;
  805. failed_creg_setup:
  806. spin_lock_irq(&card->irq_lock);
  807. rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
  808. spin_unlock_irq(&card->irq_lock);
  809. free_irq(dev->irq, card);
  810. if (!force_legacy)
  811. pci_disable_msi(dev);
  812. failed_irq:
  813. pci_iounmap(dev, card->regmap);
  814. failed_iomap:
  815. pci_release_regions(dev);
  816. failed_request_regions:
  817. failed_dma_mask:
  818. pci_disable_device(dev);
  819. failed_enable:
  820. ida_free(&rsxx_disk_ida, card->disk_id);
  821. failed_ida_get:
  822. kfree(card);
  823. return st;
  824. }
  825. static void rsxx_pci_remove(struct pci_dev *dev)
  826. {
  827. struct rsxx_cardinfo *card = pci_get_drvdata(dev);
  828. unsigned long flags;
  829. int st;
  830. int i;
  831. if (!card)
  832. return;
  833. dev_info(CARD_TO_DEV(card),
  834. "Removing PCI-Flash SSD.\n");
  835. rsxx_detach_dev(card);
  836. for (i = 0; i < card->n_targets; i++) {
  837. spin_lock_irqsave(&card->irq_lock, flags);
  838. rsxx_disable_ier_and_isr(card, CR_INTR_DMA(i));
  839. spin_unlock_irqrestore(&card->irq_lock, flags);
  840. }
  841. st = card_shutdown(card);
  842. if (st)
  843. dev_crit(CARD_TO_DEV(card), "Shutdown failed!\n");
  844. /* Sync outstanding event handlers. */
  845. spin_lock_irqsave(&card->irq_lock, flags);
  846. rsxx_disable_ier_and_isr(card, CR_INTR_EVENT);
  847. spin_unlock_irqrestore(&card->irq_lock, flags);
  848. cancel_work_sync(&card->event_work);
  849. destroy_workqueue(card->event_wq);
  850. rsxx_destroy_dev(card);
  851. rsxx_dma_destroy(card);
  852. destroy_workqueue(card->creg_ctrl.creg_wq);
  853. spin_lock_irqsave(&card->irq_lock, flags);
  854. rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
  855. spin_unlock_irqrestore(&card->irq_lock, flags);
  856. /* Prevent work_structs from re-queuing themselves. */
  857. card->halt = 1;
  858. debugfs_remove_recursive(card->debugfs_dir);
  859. free_irq(dev->irq, card);
  860. if (!force_legacy)
  861. pci_disable_msi(dev);
  862. rsxx_creg_destroy(card);
  863. pci_iounmap(dev, card->regmap);
  864. pci_disable_device(dev);
  865. pci_release_regions(dev);
  866. ida_free(&rsxx_disk_ida, card->disk_id);
  867. kfree(card);
  868. }
  869. static int rsxx_pci_suspend(struct pci_dev *dev, pm_message_t state)
  870. {
  871. /* We don't support suspend at this time. */
  872. return -ENOSYS;
  873. }
  874. static void rsxx_pci_shutdown(struct pci_dev *dev)
  875. {
  876. struct rsxx_cardinfo *card = pci_get_drvdata(dev);
  877. unsigned long flags;
  878. int i;
  879. if (!card)
  880. return;
  881. dev_info(CARD_TO_DEV(card), "Shutting down PCI-Flash SSD.\n");
  882. rsxx_detach_dev(card);
  883. for (i = 0; i < card->n_targets; i++) {
  884. spin_lock_irqsave(&card->irq_lock, flags);
  885. rsxx_disable_ier_and_isr(card, CR_INTR_DMA(i));
  886. spin_unlock_irqrestore(&card->irq_lock, flags);
  887. }
  888. card_shutdown(card);
  889. }
  890. static const struct pci_error_handlers rsxx_err_handler = {
  891. .error_detected = rsxx_error_detected,
  892. .slot_reset = rsxx_slot_reset,
  893. };
  894. static const struct pci_device_id rsxx_pci_ids[] = {
  895. {PCI_DEVICE(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_FS70_FLASH)},
  896. {PCI_DEVICE(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_FS80_FLASH)},
  897. {0,},
  898. };
  899. MODULE_DEVICE_TABLE(pci, rsxx_pci_ids);
  900. static struct pci_driver rsxx_pci_driver = {
  901. .name = DRIVER_NAME,
  902. .id_table = rsxx_pci_ids,
  903. .probe = rsxx_pci_probe,
  904. .remove = rsxx_pci_remove,
  905. .suspend = rsxx_pci_suspend,
  906. .shutdown = rsxx_pci_shutdown,
  907. .err_handler = &rsxx_err_handler,
  908. };
  909. static int __init rsxx_core_init(void)
  910. {
  911. int st;
  912. st = rsxx_dev_init();
  913. if (st)
  914. return st;
  915. st = rsxx_dma_init();
  916. if (st)
  917. goto dma_init_failed;
  918. st = rsxx_creg_init();
  919. if (st)
  920. goto creg_init_failed;
  921. return pci_register_driver(&rsxx_pci_driver);
  922. creg_init_failed:
  923. rsxx_dma_cleanup();
  924. dma_init_failed:
  925. rsxx_dev_cleanup();
  926. return st;
  927. }
  928. static void __exit rsxx_core_cleanup(void)
  929. {
  930. pci_unregister_driver(&rsxx_pci_driver);
  931. rsxx_creg_cleanup();
  932. rsxx_dma_cleanup();
  933. rsxx_dev_cleanup();
  934. }
  935. module_init(rsxx_core_init);
  936. module_exit(rsxx_core_cleanup);