hci_intel.c 30 KB

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  1. /*
  2. *
  3. * Bluetooth HCI UART driver for Intel devices
  4. *
  5. * Copyright (C) 2015 Intel Corporation
  6. *
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <linux/kernel.h>
  24. #include <linux/errno.h>
  25. #include <linux/skbuff.h>
  26. #include <linux/firmware.h>
  27. #include <linux/module.h>
  28. #include <linux/wait.h>
  29. #include <linux/tty.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/gpio/consumer.h>
  32. #include <linux/acpi.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/pm_runtime.h>
  35. #include <net/bluetooth/bluetooth.h>
  36. #include <net/bluetooth/hci_core.h>
  37. #include "hci_uart.h"
  38. #include "btintel.h"
  39. #define STATE_BOOTLOADER 0
  40. #define STATE_DOWNLOADING 1
  41. #define STATE_FIRMWARE_LOADED 2
  42. #define STATE_FIRMWARE_FAILED 3
  43. #define STATE_BOOTING 4
  44. #define STATE_LPM_ENABLED 5
  45. #define STATE_TX_ACTIVE 6
  46. #define STATE_SUSPENDED 7
  47. #define STATE_LPM_TRANSACTION 8
  48. #define HCI_LPM_WAKE_PKT 0xf0
  49. #define HCI_LPM_PKT 0xf1
  50. #define HCI_LPM_MAX_SIZE 10
  51. #define HCI_LPM_HDR_SIZE HCI_EVENT_HDR_SIZE
  52. #define LPM_OP_TX_NOTIFY 0x00
  53. #define LPM_OP_SUSPEND_ACK 0x02
  54. #define LPM_OP_RESUME_ACK 0x03
  55. #define LPM_SUSPEND_DELAY_MS 1000
  56. struct hci_lpm_pkt {
  57. __u8 opcode;
  58. __u8 dlen;
  59. __u8 data[0];
  60. } __packed;
  61. struct intel_device {
  62. struct list_head list;
  63. struct platform_device *pdev;
  64. struct gpio_desc *reset;
  65. struct hci_uart *hu;
  66. struct mutex hu_lock;
  67. int irq;
  68. };
  69. static LIST_HEAD(intel_device_list);
  70. static DEFINE_MUTEX(intel_device_list_lock);
  71. struct intel_data {
  72. struct sk_buff *rx_skb;
  73. struct sk_buff_head txq;
  74. struct work_struct busy_work;
  75. struct hci_uart *hu;
  76. unsigned long flags;
  77. };
  78. static u8 intel_convert_speed(unsigned int speed)
  79. {
  80. switch (speed) {
  81. case 9600:
  82. return 0x00;
  83. case 19200:
  84. return 0x01;
  85. case 38400:
  86. return 0x02;
  87. case 57600:
  88. return 0x03;
  89. case 115200:
  90. return 0x04;
  91. case 230400:
  92. return 0x05;
  93. case 460800:
  94. return 0x06;
  95. case 921600:
  96. return 0x07;
  97. case 1843200:
  98. return 0x08;
  99. case 3250000:
  100. return 0x09;
  101. case 2000000:
  102. return 0x0a;
  103. case 3000000:
  104. return 0x0b;
  105. default:
  106. return 0xff;
  107. }
  108. }
  109. static int intel_wait_booting(struct hci_uart *hu)
  110. {
  111. struct intel_data *intel = hu->priv;
  112. int err;
  113. err = wait_on_bit_timeout(&intel->flags, STATE_BOOTING,
  114. TASK_INTERRUPTIBLE,
  115. msecs_to_jiffies(1000));
  116. if (err == -EINTR) {
  117. bt_dev_err(hu->hdev, "Device boot interrupted");
  118. return -EINTR;
  119. }
  120. if (err) {
  121. bt_dev_err(hu->hdev, "Device boot timeout");
  122. return -ETIMEDOUT;
  123. }
  124. return err;
  125. }
  126. #ifdef CONFIG_PM
  127. static int intel_wait_lpm_transaction(struct hci_uart *hu)
  128. {
  129. struct intel_data *intel = hu->priv;
  130. int err;
  131. err = wait_on_bit_timeout(&intel->flags, STATE_LPM_TRANSACTION,
  132. TASK_INTERRUPTIBLE,
  133. msecs_to_jiffies(1000));
  134. if (err == -EINTR) {
  135. bt_dev_err(hu->hdev, "LPM transaction interrupted");
  136. return -EINTR;
  137. }
  138. if (err) {
  139. bt_dev_err(hu->hdev, "LPM transaction timeout");
  140. return -ETIMEDOUT;
  141. }
  142. return err;
  143. }
  144. static int intel_lpm_suspend(struct hci_uart *hu)
  145. {
  146. static const u8 suspend[] = { 0x01, 0x01, 0x01 };
  147. struct intel_data *intel = hu->priv;
  148. struct sk_buff *skb;
  149. if (!test_bit(STATE_LPM_ENABLED, &intel->flags) ||
  150. test_bit(STATE_SUSPENDED, &intel->flags))
  151. return 0;
  152. if (test_bit(STATE_TX_ACTIVE, &intel->flags))
  153. return -EAGAIN;
  154. bt_dev_dbg(hu->hdev, "Suspending");
  155. skb = bt_skb_alloc(sizeof(suspend), GFP_KERNEL);
  156. if (!skb) {
  157. bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet");
  158. return -ENOMEM;
  159. }
  160. skb_put_data(skb, suspend, sizeof(suspend));
  161. hci_skb_pkt_type(skb) = HCI_LPM_PKT;
  162. set_bit(STATE_LPM_TRANSACTION, &intel->flags);
  163. /* LPM flow is a priority, enqueue packet at list head */
  164. skb_queue_head(&intel->txq, skb);
  165. hci_uart_tx_wakeup(hu);
  166. intel_wait_lpm_transaction(hu);
  167. /* Even in case of failure, continue and test the suspended flag */
  168. clear_bit(STATE_LPM_TRANSACTION, &intel->flags);
  169. if (!test_bit(STATE_SUSPENDED, &intel->flags)) {
  170. bt_dev_err(hu->hdev, "Device suspend error");
  171. return -EINVAL;
  172. }
  173. bt_dev_dbg(hu->hdev, "Suspended");
  174. hci_uart_set_flow_control(hu, true);
  175. return 0;
  176. }
  177. static int intel_lpm_resume(struct hci_uart *hu)
  178. {
  179. struct intel_data *intel = hu->priv;
  180. struct sk_buff *skb;
  181. if (!test_bit(STATE_LPM_ENABLED, &intel->flags) ||
  182. !test_bit(STATE_SUSPENDED, &intel->flags))
  183. return 0;
  184. bt_dev_dbg(hu->hdev, "Resuming");
  185. hci_uart_set_flow_control(hu, false);
  186. skb = bt_skb_alloc(0, GFP_KERNEL);
  187. if (!skb) {
  188. bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet");
  189. return -ENOMEM;
  190. }
  191. hci_skb_pkt_type(skb) = HCI_LPM_WAKE_PKT;
  192. set_bit(STATE_LPM_TRANSACTION, &intel->flags);
  193. /* LPM flow is a priority, enqueue packet at list head */
  194. skb_queue_head(&intel->txq, skb);
  195. hci_uart_tx_wakeup(hu);
  196. intel_wait_lpm_transaction(hu);
  197. /* Even in case of failure, continue and test the suspended flag */
  198. clear_bit(STATE_LPM_TRANSACTION, &intel->flags);
  199. if (test_bit(STATE_SUSPENDED, &intel->flags)) {
  200. bt_dev_err(hu->hdev, "Device resume error");
  201. return -EINVAL;
  202. }
  203. bt_dev_dbg(hu->hdev, "Resumed");
  204. return 0;
  205. }
  206. #endif /* CONFIG_PM */
  207. static int intel_lpm_host_wake(struct hci_uart *hu)
  208. {
  209. static const u8 lpm_resume_ack[] = { LPM_OP_RESUME_ACK, 0x00 };
  210. struct intel_data *intel = hu->priv;
  211. struct sk_buff *skb;
  212. hci_uart_set_flow_control(hu, false);
  213. clear_bit(STATE_SUSPENDED, &intel->flags);
  214. skb = bt_skb_alloc(sizeof(lpm_resume_ack), GFP_KERNEL);
  215. if (!skb) {
  216. bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet");
  217. return -ENOMEM;
  218. }
  219. skb_put_data(skb, lpm_resume_ack, sizeof(lpm_resume_ack));
  220. hci_skb_pkt_type(skb) = HCI_LPM_PKT;
  221. /* LPM flow is a priority, enqueue packet at list head */
  222. skb_queue_head(&intel->txq, skb);
  223. hci_uart_tx_wakeup(hu);
  224. bt_dev_dbg(hu->hdev, "Resumed by controller");
  225. return 0;
  226. }
  227. static irqreturn_t intel_irq(int irq, void *dev_id)
  228. {
  229. struct intel_device *idev = dev_id;
  230. dev_info(&idev->pdev->dev, "hci_intel irq\n");
  231. mutex_lock(&idev->hu_lock);
  232. if (idev->hu)
  233. intel_lpm_host_wake(idev->hu);
  234. mutex_unlock(&idev->hu_lock);
  235. /* Host/Controller are now LPM resumed, trigger a new delayed suspend */
  236. pm_runtime_get(&idev->pdev->dev);
  237. pm_runtime_mark_last_busy(&idev->pdev->dev);
  238. pm_runtime_put_autosuspend(&idev->pdev->dev);
  239. return IRQ_HANDLED;
  240. }
  241. static int intel_set_power(struct hci_uart *hu, bool powered)
  242. {
  243. struct list_head *p;
  244. int err = -ENODEV;
  245. if (!hu->tty->dev)
  246. return err;
  247. mutex_lock(&intel_device_list_lock);
  248. list_for_each(p, &intel_device_list) {
  249. struct intel_device *idev = list_entry(p, struct intel_device,
  250. list);
  251. /* tty device and pdev device should share the same parent
  252. * which is the UART port.
  253. */
  254. if (hu->tty->dev->parent != idev->pdev->dev.parent)
  255. continue;
  256. if (!idev->reset) {
  257. err = -ENOTSUPP;
  258. break;
  259. }
  260. BT_INFO("hu %p, Switching compatible pm device (%s) to %u",
  261. hu, dev_name(&idev->pdev->dev), powered);
  262. gpiod_set_value(idev->reset, powered);
  263. /* Provide to idev a hu reference which is used to run LPM
  264. * transactions (lpm suspend/resume) from PM callbacks.
  265. * hu needs to be protected against concurrent removing during
  266. * these PM ops.
  267. */
  268. mutex_lock(&idev->hu_lock);
  269. idev->hu = powered ? hu : NULL;
  270. mutex_unlock(&idev->hu_lock);
  271. if (idev->irq < 0)
  272. break;
  273. if (powered && device_can_wakeup(&idev->pdev->dev)) {
  274. err = devm_request_threaded_irq(&idev->pdev->dev,
  275. idev->irq, NULL,
  276. intel_irq,
  277. IRQF_ONESHOT,
  278. "bt-host-wake", idev);
  279. if (err) {
  280. BT_ERR("hu %p, unable to allocate irq-%d",
  281. hu, idev->irq);
  282. break;
  283. }
  284. device_wakeup_enable(&idev->pdev->dev);
  285. pm_runtime_set_active(&idev->pdev->dev);
  286. pm_runtime_use_autosuspend(&idev->pdev->dev);
  287. pm_runtime_set_autosuspend_delay(&idev->pdev->dev,
  288. LPM_SUSPEND_DELAY_MS);
  289. pm_runtime_enable(&idev->pdev->dev);
  290. } else if (!powered && device_may_wakeup(&idev->pdev->dev)) {
  291. devm_free_irq(&idev->pdev->dev, idev->irq, idev);
  292. device_wakeup_disable(&idev->pdev->dev);
  293. pm_runtime_disable(&idev->pdev->dev);
  294. }
  295. }
  296. mutex_unlock(&intel_device_list_lock);
  297. return err;
  298. }
  299. static void intel_busy_work(struct work_struct *work)
  300. {
  301. struct list_head *p;
  302. struct intel_data *intel = container_of(work, struct intel_data,
  303. busy_work);
  304. if (!intel->hu->tty->dev)
  305. return;
  306. /* Link is busy, delay the suspend */
  307. mutex_lock(&intel_device_list_lock);
  308. list_for_each(p, &intel_device_list) {
  309. struct intel_device *idev = list_entry(p, struct intel_device,
  310. list);
  311. if (intel->hu->tty->dev->parent == idev->pdev->dev.parent) {
  312. pm_runtime_get(&idev->pdev->dev);
  313. pm_runtime_mark_last_busy(&idev->pdev->dev);
  314. pm_runtime_put_autosuspend(&idev->pdev->dev);
  315. break;
  316. }
  317. }
  318. mutex_unlock(&intel_device_list_lock);
  319. }
  320. static int intel_open(struct hci_uart *hu)
  321. {
  322. struct intel_data *intel;
  323. BT_DBG("hu %p", hu);
  324. if (!hci_uart_has_flow_control(hu))
  325. return -EOPNOTSUPP;
  326. intel = kzalloc(sizeof(*intel), GFP_KERNEL);
  327. if (!intel)
  328. return -ENOMEM;
  329. skb_queue_head_init(&intel->txq);
  330. INIT_WORK(&intel->busy_work, intel_busy_work);
  331. intel->hu = hu;
  332. hu->priv = intel;
  333. if (!intel_set_power(hu, true))
  334. set_bit(STATE_BOOTING, &intel->flags);
  335. return 0;
  336. }
  337. static int intel_close(struct hci_uart *hu)
  338. {
  339. struct intel_data *intel = hu->priv;
  340. BT_DBG("hu %p", hu);
  341. cancel_work_sync(&intel->busy_work);
  342. intel_set_power(hu, false);
  343. skb_queue_purge(&intel->txq);
  344. kfree_skb(intel->rx_skb);
  345. kfree(intel);
  346. hu->priv = NULL;
  347. return 0;
  348. }
  349. static int intel_flush(struct hci_uart *hu)
  350. {
  351. struct intel_data *intel = hu->priv;
  352. BT_DBG("hu %p", hu);
  353. skb_queue_purge(&intel->txq);
  354. return 0;
  355. }
  356. static int inject_cmd_complete(struct hci_dev *hdev, __u16 opcode)
  357. {
  358. struct sk_buff *skb;
  359. struct hci_event_hdr *hdr;
  360. struct hci_ev_cmd_complete *evt;
  361. skb = bt_skb_alloc(sizeof(*hdr) + sizeof(*evt) + 1, GFP_KERNEL);
  362. if (!skb)
  363. return -ENOMEM;
  364. hdr = skb_put(skb, sizeof(*hdr));
  365. hdr->evt = HCI_EV_CMD_COMPLETE;
  366. hdr->plen = sizeof(*evt) + 1;
  367. evt = skb_put(skb, sizeof(*evt));
  368. evt->ncmd = 0x01;
  369. evt->opcode = cpu_to_le16(opcode);
  370. skb_put_u8(skb, 0x00);
  371. hci_skb_pkt_type(skb) = HCI_EVENT_PKT;
  372. return hci_recv_frame(hdev, skb);
  373. }
  374. static int intel_set_baudrate(struct hci_uart *hu, unsigned int speed)
  375. {
  376. struct intel_data *intel = hu->priv;
  377. struct hci_dev *hdev = hu->hdev;
  378. u8 speed_cmd[] = { 0x06, 0xfc, 0x01, 0x00 };
  379. struct sk_buff *skb;
  380. int err;
  381. /* This can be the first command sent to the chip, check
  382. * that the controller is ready.
  383. */
  384. err = intel_wait_booting(hu);
  385. clear_bit(STATE_BOOTING, &intel->flags);
  386. /* In case of timeout, try to continue anyway */
  387. if (err && err != -ETIMEDOUT)
  388. return err;
  389. bt_dev_info(hdev, "Change controller speed to %d", speed);
  390. speed_cmd[3] = intel_convert_speed(speed);
  391. if (speed_cmd[3] == 0xff) {
  392. bt_dev_err(hdev, "Unsupported speed");
  393. return -EINVAL;
  394. }
  395. /* Device will not accept speed change if Intel version has not been
  396. * previously requested.
  397. */
  398. skb = __hci_cmd_sync(hdev, 0xfc05, 0, NULL, HCI_CMD_TIMEOUT);
  399. if (IS_ERR(skb)) {
  400. bt_dev_err(hdev, "Reading Intel version information failed (%ld)",
  401. PTR_ERR(skb));
  402. return PTR_ERR(skb);
  403. }
  404. kfree_skb(skb);
  405. skb = bt_skb_alloc(sizeof(speed_cmd), GFP_KERNEL);
  406. if (!skb) {
  407. bt_dev_err(hdev, "Failed to alloc memory for baudrate packet");
  408. return -ENOMEM;
  409. }
  410. skb_put_data(skb, speed_cmd, sizeof(speed_cmd));
  411. hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
  412. hci_uart_set_flow_control(hu, true);
  413. skb_queue_tail(&intel->txq, skb);
  414. hci_uart_tx_wakeup(hu);
  415. /* wait 100ms to change baudrate on controller side */
  416. msleep(100);
  417. hci_uart_set_baudrate(hu, speed);
  418. hci_uart_set_flow_control(hu, false);
  419. return 0;
  420. }
  421. static int intel_setup(struct hci_uart *hu)
  422. {
  423. struct intel_data *intel = hu->priv;
  424. struct hci_dev *hdev = hu->hdev;
  425. struct sk_buff *skb;
  426. struct intel_version ver;
  427. struct intel_boot_params params;
  428. struct list_head *p;
  429. const struct firmware *fw;
  430. char fwname[64];
  431. u32 boot_param;
  432. ktime_t calltime, delta, rettime;
  433. unsigned long long duration;
  434. unsigned int init_speed, oper_speed;
  435. int speed_change = 0;
  436. int err;
  437. bt_dev_dbg(hdev, "start intel_setup");
  438. hu->hdev->set_diag = btintel_set_diag;
  439. hu->hdev->set_bdaddr = btintel_set_bdaddr;
  440. /* Set the default boot parameter to 0x0 and it is updated to
  441. * SKU specific boot parameter after reading Intel_Write_Boot_Params
  442. * command while downloading the firmware.
  443. */
  444. boot_param = 0x00000000;
  445. calltime = ktime_get();
  446. if (hu->init_speed)
  447. init_speed = hu->init_speed;
  448. else
  449. init_speed = hu->proto->init_speed;
  450. if (hu->oper_speed)
  451. oper_speed = hu->oper_speed;
  452. else
  453. oper_speed = hu->proto->oper_speed;
  454. if (oper_speed && init_speed && oper_speed != init_speed)
  455. speed_change = 1;
  456. /* Check that the controller is ready */
  457. err = intel_wait_booting(hu);
  458. clear_bit(STATE_BOOTING, &intel->flags);
  459. /* In case of timeout, try to continue anyway */
  460. if (err && err != -ETIMEDOUT)
  461. return err;
  462. set_bit(STATE_BOOTLOADER, &intel->flags);
  463. /* Read the Intel version information to determine if the device
  464. * is in bootloader mode or if it already has operational firmware
  465. * loaded.
  466. */
  467. err = btintel_read_version(hdev, &ver);
  468. if (err)
  469. return err;
  470. /* The hardware platform number has a fixed value of 0x37 and
  471. * for now only accept this single value.
  472. */
  473. if (ver.hw_platform != 0x37) {
  474. bt_dev_err(hdev, "Unsupported Intel hardware platform (%u)",
  475. ver.hw_platform);
  476. return -EINVAL;
  477. }
  478. /* Check for supported iBT hardware variants of this firmware
  479. * loading method.
  480. *
  481. * This check has been put in place to ensure correct forward
  482. * compatibility options when newer hardware variants come along.
  483. */
  484. switch (ver.hw_variant) {
  485. case 0x0b: /* LnP */
  486. case 0x0c: /* WsP */
  487. case 0x12: /* ThP */
  488. break;
  489. default:
  490. bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)",
  491. ver.hw_variant);
  492. return -EINVAL;
  493. }
  494. btintel_version_info(hdev, &ver);
  495. /* The firmware variant determines if the device is in bootloader
  496. * mode or is running operational firmware. The value 0x06 identifies
  497. * the bootloader and the value 0x23 identifies the operational
  498. * firmware.
  499. *
  500. * When the operational firmware is already present, then only
  501. * the check for valid Bluetooth device address is needed. This
  502. * determines if the device will be added as configured or
  503. * unconfigured controller.
  504. *
  505. * It is not possible to use the Secure Boot Parameters in this
  506. * case since that command is only available in bootloader mode.
  507. */
  508. if (ver.fw_variant == 0x23) {
  509. clear_bit(STATE_BOOTLOADER, &intel->flags);
  510. btintel_check_bdaddr(hdev);
  511. return 0;
  512. }
  513. /* If the device is not in bootloader mode, then the only possible
  514. * choice is to return an error and abort the device initialization.
  515. */
  516. if (ver.fw_variant != 0x06) {
  517. bt_dev_err(hdev, "Unsupported Intel firmware variant (%u)",
  518. ver.fw_variant);
  519. return -ENODEV;
  520. }
  521. /* Read the secure boot parameters to identify the operating
  522. * details of the bootloader.
  523. */
  524. err = btintel_read_boot_params(hdev, &params);
  525. if (err)
  526. return err;
  527. /* It is required that every single firmware fragment is acknowledged
  528. * with a command complete event. If the boot parameters indicate
  529. * that this bootloader does not send them, then abort the setup.
  530. */
  531. if (params.limited_cce != 0x00) {
  532. bt_dev_err(hdev, "Unsupported Intel firmware loading method (%u)",
  533. params.limited_cce);
  534. return -EINVAL;
  535. }
  536. /* If the OTP has no valid Bluetooth device address, then there will
  537. * also be no valid address for the operational firmware.
  538. */
  539. if (!bacmp(&params.otp_bdaddr, BDADDR_ANY)) {
  540. bt_dev_info(hdev, "No device address configured");
  541. set_bit(HCI_QUIRK_INVALID_BDADDR, &hdev->quirks);
  542. }
  543. /* With this Intel bootloader only the hardware variant and device
  544. * revision information are used to select the right firmware for SfP
  545. * and WsP.
  546. *
  547. * The firmware filename is ibt-<hw_variant>-<dev_revid>.sfi.
  548. *
  549. * Currently the supported hardware variants are:
  550. * 11 (0x0b) for iBT 3.0 (LnP/SfP)
  551. * 12 (0x0c) for iBT 3.5 (WsP)
  552. *
  553. * For ThP/JfP and for future SKU's, the FW name varies based on HW
  554. * variant, HW revision and FW revision, as these are dependent on CNVi
  555. * and RF Combination.
  556. *
  557. * 18 (0x12) for iBT3.5 (ThP/JfP)
  558. *
  559. * The firmware file name for these will be
  560. * ibt-<hw_variant>-<hw_revision>-<fw_revision>.sfi.
  561. *
  562. */
  563. switch (ver.hw_variant) {
  564. case 0x0b: /* SfP */
  565. case 0x0c: /* WsP */
  566. snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u.sfi",
  567. le16_to_cpu(ver.hw_variant),
  568. le16_to_cpu(params.dev_revid));
  569. break;
  570. case 0x12: /* ThP */
  571. snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u-%u.sfi",
  572. le16_to_cpu(ver.hw_variant),
  573. le16_to_cpu(ver.hw_revision),
  574. le16_to_cpu(ver.fw_revision));
  575. break;
  576. default:
  577. bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)",
  578. ver.hw_variant);
  579. return -EINVAL;
  580. }
  581. err = request_firmware(&fw, fwname, &hdev->dev);
  582. if (err < 0) {
  583. bt_dev_err(hdev, "Failed to load Intel firmware file (%d)",
  584. err);
  585. return err;
  586. }
  587. bt_dev_info(hdev, "Found device firmware: %s", fwname);
  588. /* Save the DDC file name for later */
  589. switch (ver.hw_variant) {
  590. case 0x0b: /* SfP */
  591. case 0x0c: /* WsP */
  592. snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u.ddc",
  593. le16_to_cpu(ver.hw_variant),
  594. le16_to_cpu(params.dev_revid));
  595. break;
  596. case 0x12: /* ThP */
  597. snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u-%u.ddc",
  598. le16_to_cpu(ver.hw_variant),
  599. le16_to_cpu(ver.hw_revision),
  600. le16_to_cpu(ver.fw_revision));
  601. break;
  602. default:
  603. bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)",
  604. ver.hw_variant);
  605. return -EINVAL;
  606. }
  607. if (fw->size < 644) {
  608. bt_dev_err(hdev, "Invalid size of firmware file (%zu)",
  609. fw->size);
  610. err = -EBADF;
  611. goto done;
  612. }
  613. set_bit(STATE_DOWNLOADING, &intel->flags);
  614. /* Start firmware downloading and get boot parameter */
  615. err = btintel_download_firmware(hdev, fw, &boot_param);
  616. if (err < 0)
  617. goto done;
  618. set_bit(STATE_FIRMWARE_LOADED, &intel->flags);
  619. bt_dev_info(hdev, "Waiting for firmware download to complete");
  620. /* Before switching the device into operational mode and with that
  621. * booting the loaded firmware, wait for the bootloader notification
  622. * that all fragments have been successfully received.
  623. *
  624. * When the event processing receives the notification, then the
  625. * STATE_DOWNLOADING flag will be cleared.
  626. *
  627. * The firmware loading should not take longer than 5 seconds
  628. * and thus just timeout if that happens and fail the setup
  629. * of this device.
  630. */
  631. err = wait_on_bit_timeout(&intel->flags, STATE_DOWNLOADING,
  632. TASK_INTERRUPTIBLE,
  633. msecs_to_jiffies(5000));
  634. if (err == -EINTR) {
  635. bt_dev_err(hdev, "Firmware loading interrupted");
  636. err = -EINTR;
  637. goto done;
  638. }
  639. if (err) {
  640. bt_dev_err(hdev, "Firmware loading timeout");
  641. err = -ETIMEDOUT;
  642. goto done;
  643. }
  644. if (test_bit(STATE_FIRMWARE_FAILED, &intel->flags)) {
  645. bt_dev_err(hdev, "Firmware loading failed");
  646. err = -ENOEXEC;
  647. goto done;
  648. }
  649. rettime = ktime_get();
  650. delta = ktime_sub(rettime, calltime);
  651. duration = (unsigned long long) ktime_to_ns(delta) >> 10;
  652. bt_dev_info(hdev, "Firmware loaded in %llu usecs", duration);
  653. done:
  654. release_firmware(fw);
  655. if (err < 0)
  656. return err;
  657. /* We need to restore the default speed before Intel reset */
  658. if (speed_change) {
  659. err = intel_set_baudrate(hu, init_speed);
  660. if (err)
  661. return err;
  662. }
  663. calltime = ktime_get();
  664. set_bit(STATE_BOOTING, &intel->flags);
  665. err = btintel_send_intel_reset(hdev, boot_param);
  666. if (err)
  667. return err;
  668. /* The bootloader will not indicate when the device is ready. This
  669. * is done by the operational firmware sending bootup notification.
  670. *
  671. * Booting into operational firmware should not take longer than
  672. * 1 second. However if that happens, then just fail the setup
  673. * since something went wrong.
  674. */
  675. bt_dev_info(hdev, "Waiting for device to boot");
  676. err = intel_wait_booting(hu);
  677. if (err)
  678. return err;
  679. clear_bit(STATE_BOOTING, &intel->flags);
  680. rettime = ktime_get();
  681. delta = ktime_sub(rettime, calltime);
  682. duration = (unsigned long long) ktime_to_ns(delta) >> 10;
  683. bt_dev_info(hdev, "Device booted in %llu usecs", duration);
  684. /* Enable LPM if matching pdev with wakeup enabled, set TX active
  685. * until further LPM TX notification.
  686. */
  687. mutex_lock(&intel_device_list_lock);
  688. list_for_each(p, &intel_device_list) {
  689. struct intel_device *dev = list_entry(p, struct intel_device,
  690. list);
  691. if (!hu->tty->dev)
  692. break;
  693. if (hu->tty->dev->parent == dev->pdev->dev.parent) {
  694. if (device_may_wakeup(&dev->pdev->dev)) {
  695. set_bit(STATE_LPM_ENABLED, &intel->flags);
  696. set_bit(STATE_TX_ACTIVE, &intel->flags);
  697. }
  698. break;
  699. }
  700. }
  701. mutex_unlock(&intel_device_list_lock);
  702. /* Ignore errors, device can work without DDC parameters */
  703. btintel_load_ddc_config(hdev, fwname);
  704. skb = __hci_cmd_sync(hdev, HCI_OP_RESET, 0, NULL, HCI_CMD_TIMEOUT);
  705. if (IS_ERR(skb))
  706. return PTR_ERR(skb);
  707. kfree_skb(skb);
  708. if (speed_change) {
  709. err = intel_set_baudrate(hu, oper_speed);
  710. if (err)
  711. return err;
  712. }
  713. bt_dev_info(hdev, "Setup complete");
  714. clear_bit(STATE_BOOTLOADER, &intel->flags);
  715. return 0;
  716. }
  717. static int intel_recv_event(struct hci_dev *hdev, struct sk_buff *skb)
  718. {
  719. struct hci_uart *hu = hci_get_drvdata(hdev);
  720. struct intel_data *intel = hu->priv;
  721. struct hci_event_hdr *hdr;
  722. if (!test_bit(STATE_BOOTLOADER, &intel->flags) &&
  723. !test_bit(STATE_BOOTING, &intel->flags))
  724. goto recv;
  725. hdr = (void *)skb->data;
  726. /* When the firmware loading completes the device sends
  727. * out a vendor specific event indicating the result of
  728. * the firmware loading.
  729. */
  730. if (skb->len == 7 && hdr->evt == 0xff && hdr->plen == 0x05 &&
  731. skb->data[2] == 0x06) {
  732. if (skb->data[3] != 0x00)
  733. set_bit(STATE_FIRMWARE_FAILED, &intel->flags);
  734. if (test_and_clear_bit(STATE_DOWNLOADING, &intel->flags) &&
  735. test_bit(STATE_FIRMWARE_LOADED, &intel->flags)) {
  736. smp_mb__after_atomic();
  737. wake_up_bit(&intel->flags, STATE_DOWNLOADING);
  738. }
  739. /* When switching to the operational firmware the device
  740. * sends a vendor specific event indicating that the bootup
  741. * completed.
  742. */
  743. } else if (skb->len == 9 && hdr->evt == 0xff && hdr->plen == 0x07 &&
  744. skb->data[2] == 0x02) {
  745. if (test_and_clear_bit(STATE_BOOTING, &intel->flags)) {
  746. smp_mb__after_atomic();
  747. wake_up_bit(&intel->flags, STATE_BOOTING);
  748. }
  749. }
  750. recv:
  751. return hci_recv_frame(hdev, skb);
  752. }
  753. static void intel_recv_lpm_notify(struct hci_dev *hdev, int value)
  754. {
  755. struct hci_uart *hu = hci_get_drvdata(hdev);
  756. struct intel_data *intel = hu->priv;
  757. bt_dev_dbg(hdev, "TX idle notification (%d)", value);
  758. if (value) {
  759. set_bit(STATE_TX_ACTIVE, &intel->flags);
  760. schedule_work(&intel->busy_work);
  761. } else {
  762. clear_bit(STATE_TX_ACTIVE, &intel->flags);
  763. }
  764. }
  765. static int intel_recv_lpm(struct hci_dev *hdev, struct sk_buff *skb)
  766. {
  767. struct hci_lpm_pkt *lpm = (void *)skb->data;
  768. struct hci_uart *hu = hci_get_drvdata(hdev);
  769. struct intel_data *intel = hu->priv;
  770. switch (lpm->opcode) {
  771. case LPM_OP_TX_NOTIFY:
  772. if (lpm->dlen < 1) {
  773. bt_dev_err(hu->hdev, "Invalid LPM notification packet");
  774. break;
  775. }
  776. intel_recv_lpm_notify(hdev, lpm->data[0]);
  777. break;
  778. case LPM_OP_SUSPEND_ACK:
  779. set_bit(STATE_SUSPENDED, &intel->flags);
  780. if (test_and_clear_bit(STATE_LPM_TRANSACTION, &intel->flags)) {
  781. smp_mb__after_atomic();
  782. wake_up_bit(&intel->flags, STATE_LPM_TRANSACTION);
  783. }
  784. break;
  785. case LPM_OP_RESUME_ACK:
  786. clear_bit(STATE_SUSPENDED, &intel->flags);
  787. if (test_and_clear_bit(STATE_LPM_TRANSACTION, &intel->flags)) {
  788. smp_mb__after_atomic();
  789. wake_up_bit(&intel->flags, STATE_LPM_TRANSACTION);
  790. }
  791. break;
  792. default:
  793. bt_dev_err(hdev, "Unknown LPM opcode (%02x)", lpm->opcode);
  794. break;
  795. }
  796. kfree_skb(skb);
  797. return 0;
  798. }
  799. #define INTEL_RECV_LPM \
  800. .type = HCI_LPM_PKT, \
  801. .hlen = HCI_LPM_HDR_SIZE, \
  802. .loff = 1, \
  803. .lsize = 1, \
  804. .maxlen = HCI_LPM_MAX_SIZE
  805. static const struct h4_recv_pkt intel_recv_pkts[] = {
  806. { H4_RECV_ACL, .recv = hci_recv_frame },
  807. { H4_RECV_SCO, .recv = hci_recv_frame },
  808. { H4_RECV_EVENT, .recv = intel_recv_event },
  809. { INTEL_RECV_LPM, .recv = intel_recv_lpm },
  810. };
  811. static int intel_recv(struct hci_uart *hu, const void *data, int count)
  812. {
  813. struct intel_data *intel = hu->priv;
  814. if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
  815. return -EUNATCH;
  816. intel->rx_skb = h4_recv_buf(hu->hdev, intel->rx_skb, data, count,
  817. intel_recv_pkts,
  818. ARRAY_SIZE(intel_recv_pkts));
  819. if (IS_ERR(intel->rx_skb)) {
  820. int err = PTR_ERR(intel->rx_skb);
  821. bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
  822. intel->rx_skb = NULL;
  823. return err;
  824. }
  825. return count;
  826. }
  827. static int intel_enqueue(struct hci_uart *hu, struct sk_buff *skb)
  828. {
  829. struct intel_data *intel = hu->priv;
  830. struct list_head *p;
  831. BT_DBG("hu %p skb %p", hu, skb);
  832. if (!hu->tty->dev)
  833. goto out_enqueue;
  834. /* Be sure our controller is resumed and potential LPM transaction
  835. * completed before enqueuing any packet.
  836. */
  837. mutex_lock(&intel_device_list_lock);
  838. list_for_each(p, &intel_device_list) {
  839. struct intel_device *idev = list_entry(p, struct intel_device,
  840. list);
  841. if (hu->tty->dev->parent == idev->pdev->dev.parent) {
  842. pm_runtime_get_sync(&idev->pdev->dev);
  843. pm_runtime_mark_last_busy(&idev->pdev->dev);
  844. pm_runtime_put_autosuspend(&idev->pdev->dev);
  845. break;
  846. }
  847. }
  848. mutex_unlock(&intel_device_list_lock);
  849. out_enqueue:
  850. skb_queue_tail(&intel->txq, skb);
  851. return 0;
  852. }
  853. static struct sk_buff *intel_dequeue(struct hci_uart *hu)
  854. {
  855. struct intel_data *intel = hu->priv;
  856. struct sk_buff *skb;
  857. skb = skb_dequeue(&intel->txq);
  858. if (!skb)
  859. return skb;
  860. if (test_bit(STATE_BOOTLOADER, &intel->flags) &&
  861. (hci_skb_pkt_type(skb) == HCI_COMMAND_PKT)) {
  862. struct hci_command_hdr *cmd = (void *)skb->data;
  863. __u16 opcode = le16_to_cpu(cmd->opcode);
  864. /* When the 0xfc01 command is issued to boot into
  865. * the operational firmware, it will actually not
  866. * send a command complete event. To keep the flow
  867. * control working inject that event here.
  868. */
  869. if (opcode == 0xfc01)
  870. inject_cmd_complete(hu->hdev, opcode);
  871. }
  872. /* Prepend skb with frame type */
  873. memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
  874. return skb;
  875. }
  876. static const struct hci_uart_proto intel_proto = {
  877. .id = HCI_UART_INTEL,
  878. .name = "Intel",
  879. .manufacturer = 2,
  880. .init_speed = 115200,
  881. .oper_speed = 3000000,
  882. .open = intel_open,
  883. .close = intel_close,
  884. .flush = intel_flush,
  885. .setup = intel_setup,
  886. .set_baudrate = intel_set_baudrate,
  887. .recv = intel_recv,
  888. .enqueue = intel_enqueue,
  889. .dequeue = intel_dequeue,
  890. };
  891. #ifdef CONFIG_ACPI
  892. static const struct acpi_device_id intel_acpi_match[] = {
  893. { "INT33E1", 0 },
  894. { },
  895. };
  896. MODULE_DEVICE_TABLE(acpi, intel_acpi_match);
  897. #endif
  898. #ifdef CONFIG_PM
  899. static int intel_suspend_device(struct device *dev)
  900. {
  901. struct intel_device *idev = dev_get_drvdata(dev);
  902. mutex_lock(&idev->hu_lock);
  903. if (idev->hu)
  904. intel_lpm_suspend(idev->hu);
  905. mutex_unlock(&idev->hu_lock);
  906. return 0;
  907. }
  908. static int intel_resume_device(struct device *dev)
  909. {
  910. struct intel_device *idev = dev_get_drvdata(dev);
  911. mutex_lock(&idev->hu_lock);
  912. if (idev->hu)
  913. intel_lpm_resume(idev->hu);
  914. mutex_unlock(&idev->hu_lock);
  915. return 0;
  916. }
  917. #endif
  918. #ifdef CONFIG_PM_SLEEP
  919. static int intel_suspend(struct device *dev)
  920. {
  921. struct intel_device *idev = dev_get_drvdata(dev);
  922. if (device_may_wakeup(dev))
  923. enable_irq_wake(idev->irq);
  924. return intel_suspend_device(dev);
  925. }
  926. static int intel_resume(struct device *dev)
  927. {
  928. struct intel_device *idev = dev_get_drvdata(dev);
  929. if (device_may_wakeup(dev))
  930. disable_irq_wake(idev->irq);
  931. return intel_resume_device(dev);
  932. }
  933. #endif
  934. static const struct dev_pm_ops intel_pm_ops = {
  935. SET_SYSTEM_SLEEP_PM_OPS(intel_suspend, intel_resume)
  936. SET_RUNTIME_PM_OPS(intel_suspend_device, intel_resume_device, NULL)
  937. };
  938. static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
  939. static const struct acpi_gpio_params host_wake_gpios = { 1, 0, false };
  940. static const struct acpi_gpio_mapping acpi_hci_intel_gpios[] = {
  941. { "reset-gpios", &reset_gpios, 1 },
  942. { "host-wake-gpios", &host_wake_gpios, 1 },
  943. { },
  944. };
  945. static int intel_probe(struct platform_device *pdev)
  946. {
  947. struct intel_device *idev;
  948. int ret;
  949. idev = devm_kzalloc(&pdev->dev, sizeof(*idev), GFP_KERNEL);
  950. if (!idev)
  951. return -ENOMEM;
  952. mutex_init(&idev->hu_lock);
  953. idev->pdev = pdev;
  954. ret = devm_acpi_dev_add_driver_gpios(&pdev->dev, acpi_hci_intel_gpios);
  955. if (ret)
  956. dev_dbg(&pdev->dev, "Unable to add GPIO mapping table\n");
  957. idev->reset = devm_gpiod_get(&pdev->dev, "reset", GPIOD_OUT_LOW);
  958. if (IS_ERR(idev->reset)) {
  959. dev_err(&pdev->dev, "Unable to retrieve gpio\n");
  960. return PTR_ERR(idev->reset);
  961. }
  962. idev->irq = platform_get_irq(pdev, 0);
  963. if (idev->irq < 0) {
  964. struct gpio_desc *host_wake;
  965. dev_err(&pdev->dev, "No IRQ, falling back to gpio-irq\n");
  966. host_wake = devm_gpiod_get(&pdev->dev, "host-wake", GPIOD_IN);
  967. if (IS_ERR(host_wake)) {
  968. dev_err(&pdev->dev, "Unable to retrieve IRQ\n");
  969. goto no_irq;
  970. }
  971. idev->irq = gpiod_to_irq(host_wake);
  972. if (idev->irq < 0) {
  973. dev_err(&pdev->dev, "No corresponding irq for gpio\n");
  974. goto no_irq;
  975. }
  976. }
  977. /* Only enable wake-up/irq when controller is powered */
  978. device_set_wakeup_capable(&pdev->dev, true);
  979. device_wakeup_disable(&pdev->dev);
  980. no_irq:
  981. platform_set_drvdata(pdev, idev);
  982. /* Place this instance on the device list */
  983. mutex_lock(&intel_device_list_lock);
  984. list_add_tail(&idev->list, &intel_device_list);
  985. mutex_unlock(&intel_device_list_lock);
  986. dev_info(&pdev->dev, "registered, gpio(%d)/irq(%d).\n",
  987. desc_to_gpio(idev->reset), idev->irq);
  988. return 0;
  989. }
  990. static int intel_remove(struct platform_device *pdev)
  991. {
  992. struct intel_device *idev = platform_get_drvdata(pdev);
  993. device_wakeup_disable(&pdev->dev);
  994. mutex_lock(&intel_device_list_lock);
  995. list_del(&idev->list);
  996. mutex_unlock(&intel_device_list_lock);
  997. dev_info(&pdev->dev, "unregistered.\n");
  998. return 0;
  999. }
  1000. static struct platform_driver intel_driver = {
  1001. .probe = intel_probe,
  1002. .remove = intel_remove,
  1003. .driver = {
  1004. .name = "hci_intel",
  1005. .acpi_match_table = ACPI_PTR(intel_acpi_match),
  1006. .pm = &intel_pm_ops,
  1007. },
  1008. };
  1009. int __init intel_init(void)
  1010. {
  1011. platform_driver_register(&intel_driver);
  1012. return hci_uart_register_proto(&intel_proto);
  1013. }
  1014. int __exit intel_deinit(void)
  1015. {
  1016. platform_driver_unregister(&intel_driver);
  1017. return hci_uart_unregister_proto(&intel_proto);
  1018. }