clk-usb.c 11 KB

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  1. /*
  2. * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. */
  10. #include <linux/clk-provider.h>
  11. #include <linux/clkdev.h>
  12. #include <linux/clk/at91_pmc.h>
  13. #include <linux/of.h>
  14. #include <linux/mfd/syscon.h>
  15. #include <linux/regmap.h>
  16. #include "pmc.h"
  17. #define USB_SOURCE_MAX 2
  18. #define SAM9X5_USB_DIV_SHIFT 8
  19. #define SAM9X5_USB_MAX_DIV 0xf
  20. #define RM9200_USB_DIV_SHIFT 28
  21. #define RM9200_USB_DIV_TAB_SIZE 4
  22. struct at91sam9x5_clk_usb {
  23. struct clk_hw hw;
  24. struct regmap *regmap;
  25. };
  26. #define to_at91sam9x5_clk_usb(hw) \
  27. container_of(hw, struct at91sam9x5_clk_usb, hw)
  28. struct at91rm9200_clk_usb {
  29. struct clk_hw hw;
  30. struct regmap *regmap;
  31. u32 divisors[4];
  32. };
  33. #define to_at91rm9200_clk_usb(hw) \
  34. container_of(hw, struct at91rm9200_clk_usb, hw)
  35. static unsigned long at91sam9x5_clk_usb_recalc_rate(struct clk_hw *hw,
  36. unsigned long parent_rate)
  37. {
  38. struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
  39. unsigned int usbr;
  40. u8 usbdiv;
  41. regmap_read(usb->regmap, AT91_PMC_USB, &usbr);
  42. usbdiv = (usbr & AT91_PMC_OHCIUSBDIV) >> SAM9X5_USB_DIV_SHIFT;
  43. return DIV_ROUND_CLOSEST(parent_rate, (usbdiv + 1));
  44. }
  45. static int at91sam9x5_clk_usb_determine_rate(struct clk_hw *hw,
  46. struct clk_rate_request *req)
  47. {
  48. struct clk_hw *parent;
  49. long best_rate = -EINVAL;
  50. unsigned long tmp_rate;
  51. int best_diff = -1;
  52. int tmp_diff;
  53. int i;
  54. for (i = 0; i < clk_hw_get_num_parents(hw); i++) {
  55. int div;
  56. parent = clk_hw_get_parent_by_index(hw, i);
  57. if (!parent)
  58. continue;
  59. for (div = 1; div < SAM9X5_USB_MAX_DIV + 2; div++) {
  60. unsigned long tmp_parent_rate;
  61. tmp_parent_rate = req->rate * div;
  62. tmp_parent_rate = clk_hw_round_rate(parent,
  63. tmp_parent_rate);
  64. if (!tmp_parent_rate)
  65. continue;
  66. tmp_rate = DIV_ROUND_CLOSEST(tmp_parent_rate, div);
  67. if (tmp_rate < req->rate)
  68. tmp_diff = req->rate - tmp_rate;
  69. else
  70. tmp_diff = tmp_rate - req->rate;
  71. if (best_diff < 0 || best_diff > tmp_diff) {
  72. best_rate = tmp_rate;
  73. best_diff = tmp_diff;
  74. req->best_parent_rate = tmp_parent_rate;
  75. req->best_parent_hw = parent;
  76. }
  77. if (!best_diff || tmp_rate < req->rate)
  78. break;
  79. }
  80. if (!best_diff)
  81. break;
  82. }
  83. if (best_rate < 0)
  84. return best_rate;
  85. req->rate = best_rate;
  86. return 0;
  87. }
  88. static int at91sam9x5_clk_usb_set_parent(struct clk_hw *hw, u8 index)
  89. {
  90. struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
  91. if (index > 1)
  92. return -EINVAL;
  93. regmap_update_bits(usb->regmap, AT91_PMC_USB, AT91_PMC_USBS,
  94. index ? AT91_PMC_USBS : 0);
  95. return 0;
  96. }
  97. static u8 at91sam9x5_clk_usb_get_parent(struct clk_hw *hw)
  98. {
  99. struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
  100. unsigned int usbr;
  101. regmap_read(usb->regmap, AT91_PMC_USB, &usbr);
  102. return usbr & AT91_PMC_USBS;
  103. }
  104. static int at91sam9x5_clk_usb_set_rate(struct clk_hw *hw, unsigned long rate,
  105. unsigned long parent_rate)
  106. {
  107. struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
  108. unsigned long div;
  109. if (!rate)
  110. return -EINVAL;
  111. div = DIV_ROUND_CLOSEST(parent_rate, rate);
  112. if (div > SAM9X5_USB_MAX_DIV + 1 || !div)
  113. return -EINVAL;
  114. regmap_update_bits(usb->regmap, AT91_PMC_USB, AT91_PMC_OHCIUSBDIV,
  115. (div - 1) << SAM9X5_USB_DIV_SHIFT);
  116. return 0;
  117. }
  118. static const struct clk_ops at91sam9x5_usb_ops = {
  119. .recalc_rate = at91sam9x5_clk_usb_recalc_rate,
  120. .determine_rate = at91sam9x5_clk_usb_determine_rate,
  121. .get_parent = at91sam9x5_clk_usb_get_parent,
  122. .set_parent = at91sam9x5_clk_usb_set_parent,
  123. .set_rate = at91sam9x5_clk_usb_set_rate,
  124. };
  125. static int at91sam9n12_clk_usb_enable(struct clk_hw *hw)
  126. {
  127. struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
  128. regmap_update_bits(usb->regmap, AT91_PMC_USB, AT91_PMC_USBS,
  129. AT91_PMC_USBS);
  130. return 0;
  131. }
  132. static void at91sam9n12_clk_usb_disable(struct clk_hw *hw)
  133. {
  134. struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
  135. regmap_update_bits(usb->regmap, AT91_PMC_USB, AT91_PMC_USBS, 0);
  136. }
  137. static int at91sam9n12_clk_usb_is_enabled(struct clk_hw *hw)
  138. {
  139. struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
  140. unsigned int usbr;
  141. regmap_read(usb->regmap, AT91_PMC_USB, &usbr);
  142. return usbr & AT91_PMC_USBS;
  143. }
  144. static const struct clk_ops at91sam9n12_usb_ops = {
  145. .enable = at91sam9n12_clk_usb_enable,
  146. .disable = at91sam9n12_clk_usb_disable,
  147. .is_enabled = at91sam9n12_clk_usb_is_enabled,
  148. .recalc_rate = at91sam9x5_clk_usb_recalc_rate,
  149. .determine_rate = at91sam9x5_clk_usb_determine_rate,
  150. .set_rate = at91sam9x5_clk_usb_set_rate,
  151. };
  152. static struct clk_hw * __init
  153. at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name,
  154. const char **parent_names, u8 num_parents)
  155. {
  156. struct at91sam9x5_clk_usb *usb;
  157. struct clk_hw *hw;
  158. struct clk_init_data init;
  159. int ret;
  160. usb = kzalloc(sizeof(*usb), GFP_KERNEL);
  161. if (!usb)
  162. return ERR_PTR(-ENOMEM);
  163. init.name = name;
  164. init.ops = &at91sam9x5_usb_ops;
  165. init.parent_names = parent_names;
  166. init.num_parents = num_parents;
  167. init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
  168. CLK_SET_RATE_PARENT;
  169. usb->hw.init = &init;
  170. usb->regmap = regmap;
  171. hw = &usb->hw;
  172. ret = clk_hw_register(NULL, &usb->hw);
  173. if (ret) {
  174. kfree(usb);
  175. hw = ERR_PTR(ret);
  176. }
  177. return hw;
  178. }
  179. static struct clk_hw * __init
  180. at91sam9n12_clk_register_usb(struct regmap *regmap, const char *name,
  181. const char *parent_name)
  182. {
  183. struct at91sam9x5_clk_usb *usb;
  184. struct clk_hw *hw;
  185. struct clk_init_data init;
  186. int ret;
  187. usb = kzalloc(sizeof(*usb), GFP_KERNEL);
  188. if (!usb)
  189. return ERR_PTR(-ENOMEM);
  190. init.name = name;
  191. init.ops = &at91sam9n12_usb_ops;
  192. init.parent_names = &parent_name;
  193. init.num_parents = 1;
  194. init.flags = CLK_SET_RATE_GATE | CLK_SET_RATE_PARENT;
  195. usb->hw.init = &init;
  196. usb->regmap = regmap;
  197. hw = &usb->hw;
  198. ret = clk_hw_register(NULL, &usb->hw);
  199. if (ret) {
  200. kfree(usb);
  201. hw = ERR_PTR(ret);
  202. }
  203. return hw;
  204. }
  205. static unsigned long at91rm9200_clk_usb_recalc_rate(struct clk_hw *hw,
  206. unsigned long parent_rate)
  207. {
  208. struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw);
  209. unsigned int pllbr;
  210. u8 usbdiv;
  211. regmap_read(usb->regmap, AT91_CKGR_PLLBR, &pllbr);
  212. usbdiv = (pllbr & AT91_PMC_USBDIV) >> RM9200_USB_DIV_SHIFT;
  213. if (usb->divisors[usbdiv])
  214. return parent_rate / usb->divisors[usbdiv];
  215. return 0;
  216. }
  217. static long at91rm9200_clk_usb_round_rate(struct clk_hw *hw, unsigned long rate,
  218. unsigned long *parent_rate)
  219. {
  220. struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw);
  221. struct clk_hw *parent = clk_hw_get_parent(hw);
  222. unsigned long bestrate = 0;
  223. int bestdiff = -1;
  224. unsigned long tmprate;
  225. int tmpdiff;
  226. int i = 0;
  227. for (i = 0; i < RM9200_USB_DIV_TAB_SIZE; i++) {
  228. unsigned long tmp_parent_rate;
  229. if (!usb->divisors[i])
  230. continue;
  231. tmp_parent_rate = rate * usb->divisors[i];
  232. tmp_parent_rate = clk_hw_round_rate(parent, tmp_parent_rate);
  233. tmprate = DIV_ROUND_CLOSEST(tmp_parent_rate, usb->divisors[i]);
  234. if (tmprate < rate)
  235. tmpdiff = rate - tmprate;
  236. else
  237. tmpdiff = tmprate - rate;
  238. if (bestdiff < 0 || bestdiff > tmpdiff) {
  239. bestrate = tmprate;
  240. bestdiff = tmpdiff;
  241. *parent_rate = tmp_parent_rate;
  242. }
  243. if (!bestdiff)
  244. break;
  245. }
  246. return bestrate;
  247. }
  248. static int at91rm9200_clk_usb_set_rate(struct clk_hw *hw, unsigned long rate,
  249. unsigned long parent_rate)
  250. {
  251. int i;
  252. struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw);
  253. unsigned long div;
  254. if (!rate)
  255. return -EINVAL;
  256. div = DIV_ROUND_CLOSEST(parent_rate, rate);
  257. for (i = 0; i < RM9200_USB_DIV_TAB_SIZE; i++) {
  258. if (usb->divisors[i] == div) {
  259. regmap_update_bits(usb->regmap, AT91_CKGR_PLLBR,
  260. AT91_PMC_USBDIV,
  261. i << RM9200_USB_DIV_SHIFT);
  262. return 0;
  263. }
  264. }
  265. return -EINVAL;
  266. }
  267. static const struct clk_ops at91rm9200_usb_ops = {
  268. .recalc_rate = at91rm9200_clk_usb_recalc_rate,
  269. .round_rate = at91rm9200_clk_usb_round_rate,
  270. .set_rate = at91rm9200_clk_usb_set_rate,
  271. };
  272. static struct clk_hw * __init
  273. at91rm9200_clk_register_usb(struct regmap *regmap, const char *name,
  274. const char *parent_name, const u32 *divisors)
  275. {
  276. struct at91rm9200_clk_usb *usb;
  277. struct clk_hw *hw;
  278. struct clk_init_data init;
  279. int ret;
  280. usb = kzalloc(sizeof(*usb), GFP_KERNEL);
  281. if (!usb)
  282. return ERR_PTR(-ENOMEM);
  283. init.name = name;
  284. init.ops = &at91rm9200_usb_ops;
  285. init.parent_names = &parent_name;
  286. init.num_parents = 1;
  287. init.flags = CLK_SET_RATE_PARENT;
  288. usb->hw.init = &init;
  289. usb->regmap = regmap;
  290. memcpy(usb->divisors, divisors, sizeof(usb->divisors));
  291. hw = &usb->hw;
  292. ret = clk_hw_register(NULL, &usb->hw);
  293. if (ret) {
  294. kfree(usb);
  295. hw = ERR_PTR(ret);
  296. }
  297. return hw;
  298. }
  299. static void __init of_at91sam9x5_clk_usb_setup(struct device_node *np)
  300. {
  301. struct clk_hw *hw;
  302. unsigned int num_parents;
  303. const char *parent_names[USB_SOURCE_MAX];
  304. const char *name = np->name;
  305. struct regmap *regmap;
  306. num_parents = of_clk_get_parent_count(np);
  307. if (num_parents == 0 || num_parents > USB_SOURCE_MAX)
  308. return;
  309. of_clk_parent_fill(np, parent_names, num_parents);
  310. of_property_read_string(np, "clock-output-names", &name);
  311. regmap = syscon_node_to_regmap(of_get_parent(np));
  312. if (IS_ERR(regmap))
  313. return;
  314. hw = at91sam9x5_clk_register_usb(regmap, name, parent_names,
  315. num_parents);
  316. if (IS_ERR(hw))
  317. return;
  318. of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
  319. }
  320. CLK_OF_DECLARE(at91sam9x5_clk_usb, "atmel,at91sam9x5-clk-usb",
  321. of_at91sam9x5_clk_usb_setup);
  322. static void __init of_at91sam9n12_clk_usb_setup(struct device_node *np)
  323. {
  324. struct clk_hw *hw;
  325. const char *parent_name;
  326. const char *name = np->name;
  327. struct regmap *regmap;
  328. parent_name = of_clk_get_parent_name(np, 0);
  329. if (!parent_name)
  330. return;
  331. of_property_read_string(np, "clock-output-names", &name);
  332. regmap = syscon_node_to_regmap(of_get_parent(np));
  333. if (IS_ERR(regmap))
  334. return;
  335. hw = at91sam9n12_clk_register_usb(regmap, name, parent_name);
  336. if (IS_ERR(hw))
  337. return;
  338. of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
  339. }
  340. CLK_OF_DECLARE(at91sam9n12_clk_usb, "atmel,at91sam9n12-clk-usb",
  341. of_at91sam9n12_clk_usb_setup);
  342. static void __init of_at91rm9200_clk_usb_setup(struct device_node *np)
  343. {
  344. struct clk_hw *hw;
  345. const char *parent_name;
  346. const char *name = np->name;
  347. u32 divisors[4] = {0, 0, 0, 0};
  348. struct regmap *regmap;
  349. parent_name = of_clk_get_parent_name(np, 0);
  350. if (!parent_name)
  351. return;
  352. of_property_read_u32_array(np, "atmel,clk-divisors", divisors, 4);
  353. if (!divisors[0])
  354. return;
  355. of_property_read_string(np, "clock-output-names", &name);
  356. regmap = syscon_node_to_regmap(of_get_parent(np));
  357. if (IS_ERR(regmap))
  358. return;
  359. hw = at91rm9200_clk_register_usb(regmap, name, parent_name, divisors);
  360. if (IS_ERR(hw))
  361. return;
  362. of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
  363. }
  364. CLK_OF_DECLARE(at91rm9200_clk_usb, "atmel,at91rm9200-clk-usb",
  365. of_at91rm9200_clk_usb_setup);