via-pmu.c 63 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Device driver for the PMU in Apple PowerBooks and PowerMacs.
  4. *
  5. * The VIA (versatile interface adapter) interfaces to the PMU,
  6. * a 6805 microprocessor core whose primary function is to control
  7. * battery charging and system power on the PowerBook 3400 and 2400.
  8. * The PMU also controls the ADB (Apple Desktop Bus) which connects
  9. * to the keyboard and mouse, as well as the non-volatile RAM
  10. * and the RTC (real time clock) chip.
  11. *
  12. * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
  13. * Copyright (C) 2001-2002 Benjamin Herrenschmidt
  14. * Copyright (C) 2006-2007 Johannes Berg
  15. *
  16. * THIS DRIVER IS BECOMING A TOTAL MESS !
  17. * - Cleanup atomically disabling reply to PMU events after
  18. * a sleep or a freq. switch
  19. *
  20. */
  21. #include <stdarg.h>
  22. #include <linux/mutex.h>
  23. #include <linux/types.h>
  24. #include <linux/errno.h>
  25. #include <linux/kernel.h>
  26. #include <linux/delay.h>
  27. #include <linux/sched/signal.h>
  28. #include <linux/miscdevice.h>
  29. #include <linux/blkdev.h>
  30. #include <linux/pci.h>
  31. #include <linux/slab.h>
  32. #include <linux/poll.h>
  33. #include <linux/adb.h>
  34. #include <linux/pmu.h>
  35. #include <linux/cuda.h>
  36. #include <linux/module.h>
  37. #include <linux/spinlock.h>
  38. #include <linux/pm.h>
  39. #include <linux/proc_fs.h>
  40. #include <linux/seq_file.h>
  41. #include <linux/init.h>
  42. #include <linux/interrupt.h>
  43. #include <linux/device.h>
  44. #include <linux/syscore_ops.h>
  45. #include <linux/freezer.h>
  46. #include <linux/syscalls.h>
  47. #include <linux/suspend.h>
  48. #include <linux/cpu.h>
  49. #include <linux/compat.h>
  50. #include <linux/of_address.h>
  51. #include <linux/of_irq.h>
  52. #include <linux/uaccess.h>
  53. #include <asm/machdep.h>
  54. #include <asm/io.h>
  55. #include <asm/pgtable.h>
  56. #include <asm/sections.h>
  57. #include <asm/irq.h>
  58. #ifdef CONFIG_PPC_PMAC
  59. #include <asm/pmac_feature.h>
  60. #include <asm/pmac_pfunc.h>
  61. #include <asm/pmac_low_i2c.h>
  62. #include <asm/prom.h>
  63. #include <asm/mmu_context.h>
  64. #include <asm/cputable.h>
  65. #include <asm/time.h>
  66. #include <asm/backlight.h>
  67. #else
  68. #include <asm/macintosh.h>
  69. #include <asm/macints.h>
  70. #include <asm/mac_via.h>
  71. #endif
  72. #include "via-pmu-event.h"
  73. /* Some compile options */
  74. #undef DEBUG_SLEEP
  75. /* Misc minor number allocated for /dev/pmu */
  76. #define PMU_MINOR 154
  77. /* How many iterations between battery polls */
  78. #define BATTERY_POLLING_COUNT 2
  79. static DEFINE_MUTEX(pmu_info_proc_mutex);
  80. /* VIA registers - spaced 0x200 bytes apart */
  81. #define RS 0x200 /* skip between registers */
  82. #define B 0 /* B-side data */
  83. #define A RS /* A-side data */
  84. #define DIRB (2*RS) /* B-side direction (1=output) */
  85. #define DIRA (3*RS) /* A-side direction (1=output) */
  86. #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
  87. #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
  88. #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
  89. #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
  90. #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
  91. #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
  92. #define SR (10*RS) /* Shift register */
  93. #define ACR (11*RS) /* Auxiliary control register */
  94. #define PCR (12*RS) /* Peripheral control register */
  95. #define IFR (13*RS) /* Interrupt flag register */
  96. #define IER (14*RS) /* Interrupt enable register */
  97. #define ANH (15*RS) /* A-side data, no handshake */
  98. /* Bits in B data register: both active low */
  99. #ifdef CONFIG_PPC_PMAC
  100. #define TACK 0x08 /* Transfer acknowledge (input) */
  101. #define TREQ 0x10 /* Transfer request (output) */
  102. #else
  103. #define TACK 0x02
  104. #define TREQ 0x04
  105. #endif
  106. /* Bits in ACR */
  107. #define SR_CTRL 0x1c /* Shift register control bits */
  108. #define SR_EXT 0x0c /* Shift on external clock */
  109. #define SR_OUT 0x10 /* Shift out if 1 */
  110. /* Bits in IFR and IER */
  111. #define IER_SET 0x80 /* set bits in IER */
  112. #define IER_CLR 0 /* clear bits in IER */
  113. #define SR_INT 0x04 /* Shift register full/empty */
  114. #define CB2_INT 0x08
  115. #define CB1_INT 0x10 /* transition on CB1 input */
  116. static volatile enum pmu_state {
  117. uninitialized = 0,
  118. idle,
  119. sending,
  120. intack,
  121. reading,
  122. reading_intr,
  123. locked,
  124. } pmu_state;
  125. static volatile enum int_data_state {
  126. int_data_empty,
  127. int_data_fill,
  128. int_data_ready,
  129. int_data_flush
  130. } int_data_state[2] = { int_data_empty, int_data_empty };
  131. static struct adb_request *current_req;
  132. static struct adb_request *last_req;
  133. static struct adb_request *req_awaiting_reply;
  134. static unsigned char interrupt_data[2][32];
  135. static int interrupt_data_len[2];
  136. static int int_data_last;
  137. static unsigned char *reply_ptr;
  138. static int data_index;
  139. static int data_len;
  140. static volatile int adb_int_pending;
  141. static volatile int disable_poll;
  142. static int pmu_kind = PMU_UNKNOWN;
  143. static int pmu_fully_inited;
  144. static int pmu_has_adb;
  145. #ifdef CONFIG_PPC_PMAC
  146. static volatile unsigned char __iomem *via1;
  147. static volatile unsigned char __iomem *via2;
  148. static struct device_node *vias;
  149. static struct device_node *gpio_node;
  150. #endif
  151. static unsigned char __iomem *gpio_reg;
  152. static int gpio_irq = 0;
  153. static int gpio_irq_enabled = -1;
  154. static volatile int pmu_suspended;
  155. static spinlock_t pmu_lock;
  156. static u8 pmu_intr_mask;
  157. static int pmu_version;
  158. static int drop_interrupts;
  159. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  160. static int option_lid_wakeup = 1;
  161. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  162. static unsigned long async_req_locks;
  163. #define NUM_IRQ_STATS 13
  164. static unsigned int pmu_irq_stats[NUM_IRQ_STATS];
  165. static struct proc_dir_entry *proc_pmu_root;
  166. static struct proc_dir_entry *proc_pmu_info;
  167. static struct proc_dir_entry *proc_pmu_irqstats;
  168. static struct proc_dir_entry *proc_pmu_options;
  169. static int option_server_mode;
  170. int pmu_battery_count;
  171. int pmu_cur_battery;
  172. unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
  173. struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
  174. static int query_batt_timer = BATTERY_POLLING_COUNT;
  175. static struct adb_request batt_req;
  176. static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
  177. int __fake_sleep;
  178. int asleep;
  179. #ifdef CONFIG_ADB
  180. static int adb_dev_map;
  181. static int pmu_adb_flags;
  182. static int pmu_probe(void);
  183. static int pmu_init(void);
  184. static int pmu_send_request(struct adb_request *req, int sync);
  185. static int pmu_adb_autopoll(int devs);
  186. static int pmu_adb_reset_bus(void);
  187. #endif /* CONFIG_ADB */
  188. static int init_pmu(void);
  189. static void pmu_start(void);
  190. static irqreturn_t via_pmu_interrupt(int irq, void *arg);
  191. static irqreturn_t gpio1_interrupt(int irq, void *arg);
  192. static int pmu_info_proc_show(struct seq_file *m, void *v);
  193. static int pmu_irqstats_proc_show(struct seq_file *m, void *v);
  194. static int pmu_battery_proc_show(struct seq_file *m, void *v);
  195. static void pmu_pass_intr(unsigned char *data, int len);
  196. static const struct file_operations pmu_options_proc_fops;
  197. #ifdef CONFIG_ADB
  198. const struct adb_driver via_pmu_driver = {
  199. .name = "PMU",
  200. .probe = pmu_probe,
  201. .init = pmu_init,
  202. .send_request = pmu_send_request,
  203. .autopoll = pmu_adb_autopoll,
  204. .poll = pmu_poll_adb,
  205. .reset_bus = pmu_adb_reset_bus,
  206. };
  207. #endif /* CONFIG_ADB */
  208. extern void low_sleep_handler(void);
  209. extern void enable_kernel_altivec(void);
  210. extern void enable_kernel_fp(void);
  211. #ifdef DEBUG_SLEEP
  212. int pmu_polled_request(struct adb_request *req);
  213. void pmu_blink(int n);
  214. #endif
  215. /*
  216. * This table indicates for each PMU opcode:
  217. * - the number of data bytes to be sent with the command, or -1
  218. * if a length byte should be sent,
  219. * - the number of response bytes which the PMU will return, or
  220. * -1 if it will send a length byte.
  221. */
  222. static const s8 pmu_data_len[256][2] = {
  223. /* 0 1 2 3 4 5 6 7 */
  224. /*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  225. /*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  226. /*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  227. /*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
  228. /*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
  229. /*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
  230. /*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  231. /*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
  232. /*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  233. /*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
  234. /*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
  235. /*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
  236. /*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  237. /*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
  238. /*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  239. /*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
  240. /*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  241. /*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  242. /*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  243. /*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  244. /*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
  245. /*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  246. /*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  247. /*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  248. /*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  249. /*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  250. /*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  251. /*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
  252. /*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
  253. /*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
  254. /*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  255. /*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  256. };
  257. static char *pbook_type[] = {
  258. "Unknown PowerBook",
  259. "PowerBook 2400/3400/3500(G3)",
  260. "PowerBook G3 Series",
  261. "1999 PowerBook G3",
  262. "Core99"
  263. };
  264. int __init find_via_pmu(void)
  265. {
  266. #ifdef CONFIG_PPC_PMAC
  267. u64 taddr;
  268. const u32 *reg;
  269. if (pmu_state != uninitialized)
  270. return 1;
  271. vias = of_find_node_by_name(NULL, "via-pmu");
  272. if (vias == NULL)
  273. return 0;
  274. reg = of_get_property(vias, "reg", NULL);
  275. if (reg == NULL) {
  276. printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
  277. goto fail;
  278. }
  279. taddr = of_translate_address(vias, reg);
  280. if (taddr == OF_BAD_ADDR) {
  281. printk(KERN_ERR "via-pmu: Can't translate address !\n");
  282. goto fail;
  283. }
  284. spin_lock_init(&pmu_lock);
  285. pmu_has_adb = 1;
  286. pmu_intr_mask = PMU_INT_PCEJECT |
  287. PMU_INT_SNDBRT |
  288. PMU_INT_ADB |
  289. PMU_INT_TICK;
  290. if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
  291. || of_device_is_compatible(vias->parent, "ohare")))
  292. pmu_kind = PMU_OHARE_BASED;
  293. else if (of_device_is_compatible(vias->parent, "paddington"))
  294. pmu_kind = PMU_PADDINGTON_BASED;
  295. else if (of_device_is_compatible(vias->parent, "heathrow"))
  296. pmu_kind = PMU_HEATHROW_BASED;
  297. else if (of_device_is_compatible(vias->parent, "Keylargo")
  298. || of_device_is_compatible(vias->parent, "K2-Keylargo")) {
  299. struct device_node *gpiop;
  300. struct device_node *adbp;
  301. u64 gaddr = OF_BAD_ADDR;
  302. pmu_kind = PMU_KEYLARGO_BASED;
  303. adbp = of_find_node_by_type(NULL, "adb");
  304. pmu_has_adb = (adbp != NULL);
  305. of_node_put(adbp);
  306. pmu_intr_mask = PMU_INT_PCEJECT |
  307. PMU_INT_SNDBRT |
  308. PMU_INT_ADB |
  309. PMU_INT_TICK |
  310. PMU_INT_ENVIRONMENT;
  311. gpiop = of_find_node_by_name(NULL, "gpio");
  312. if (gpiop) {
  313. reg = of_get_property(gpiop, "reg", NULL);
  314. if (reg)
  315. gaddr = of_translate_address(gpiop, reg);
  316. if (gaddr != OF_BAD_ADDR)
  317. gpio_reg = ioremap(gaddr, 0x10);
  318. of_node_put(gpiop);
  319. }
  320. if (gpio_reg == NULL) {
  321. printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
  322. goto fail;
  323. }
  324. } else
  325. pmu_kind = PMU_UNKNOWN;
  326. via1 = via2 = ioremap(taddr, 0x2000);
  327. if (via1 == NULL) {
  328. printk(KERN_ERR "via-pmu: Can't map address !\n");
  329. goto fail_via_remap;
  330. }
  331. out_8(&via1[IER], IER_CLR | 0x7f); /* disable all intrs */
  332. out_8(&via1[IFR], 0x7f); /* clear IFR */
  333. pmu_state = idle;
  334. if (!init_pmu())
  335. goto fail_init;
  336. sys_ctrler = SYS_CTRLER_PMU;
  337. return 1;
  338. fail_init:
  339. iounmap(via1);
  340. via1 = via2 = NULL;
  341. fail_via_remap:
  342. iounmap(gpio_reg);
  343. gpio_reg = NULL;
  344. fail:
  345. of_node_put(vias);
  346. vias = NULL;
  347. pmu_state = uninitialized;
  348. return 0;
  349. #else
  350. if (macintosh_config->adb_type != MAC_ADB_PB2)
  351. return 0;
  352. pmu_kind = PMU_UNKNOWN;
  353. spin_lock_init(&pmu_lock);
  354. pmu_has_adb = 1;
  355. pmu_intr_mask = PMU_INT_PCEJECT |
  356. PMU_INT_SNDBRT |
  357. PMU_INT_ADB |
  358. PMU_INT_TICK;
  359. pmu_state = idle;
  360. if (!init_pmu()) {
  361. pmu_state = uninitialized;
  362. return 0;
  363. }
  364. return 1;
  365. #endif /* !CONFIG_PPC_PMAC */
  366. }
  367. #ifdef CONFIG_ADB
  368. static int pmu_probe(void)
  369. {
  370. return pmu_state == uninitialized ? -ENODEV : 0;
  371. }
  372. static int pmu_init(void)
  373. {
  374. return pmu_state == uninitialized ? -ENODEV : 0;
  375. }
  376. #endif /* CONFIG_ADB */
  377. /*
  378. * We can't wait until pmu_init gets called, that happens too late.
  379. * It happens after IDE and SCSI initialization, which can take a few
  380. * seconds, and by that time the PMU could have given up on us and
  381. * turned us off.
  382. * Thus this is called with arch_initcall rather than device_initcall.
  383. */
  384. static int __init via_pmu_start(void)
  385. {
  386. unsigned int __maybe_unused irq;
  387. if (pmu_state == uninitialized)
  388. return -ENODEV;
  389. batt_req.complete = 1;
  390. #ifdef CONFIG_PPC_PMAC
  391. irq = irq_of_parse_and_map(vias, 0);
  392. if (!irq) {
  393. printk(KERN_ERR "via-pmu: can't map interrupt\n");
  394. return -ENODEV;
  395. }
  396. /* We set IRQF_NO_SUSPEND because we don't want the interrupt
  397. * to be disabled between the 2 passes of driver suspend, we
  398. * control our own disabling for that one
  399. */
  400. if (request_irq(irq, via_pmu_interrupt, IRQF_NO_SUSPEND,
  401. "VIA-PMU", (void *)0)) {
  402. printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
  403. return -ENODEV;
  404. }
  405. if (pmu_kind == PMU_KEYLARGO_BASED) {
  406. gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
  407. if (gpio_node == NULL)
  408. gpio_node = of_find_node_by_name(NULL,
  409. "pmu-interrupt");
  410. if (gpio_node)
  411. gpio_irq = irq_of_parse_and_map(gpio_node, 0);
  412. if (gpio_irq) {
  413. if (request_irq(gpio_irq, gpio1_interrupt,
  414. IRQF_NO_SUSPEND, "GPIO1 ADB",
  415. (void *)0))
  416. printk(KERN_ERR "pmu: can't get irq %d"
  417. " (GPIO1)\n", gpio_irq);
  418. else
  419. gpio_irq_enabled = 1;
  420. }
  421. }
  422. /* Enable interrupts */
  423. out_8(&via1[IER], IER_SET | SR_INT | CB1_INT);
  424. #else
  425. if (request_irq(IRQ_MAC_ADB_SR, via_pmu_interrupt, IRQF_NO_SUSPEND,
  426. "VIA-PMU-SR", NULL)) {
  427. pr_err("%s: couldn't get SR irq\n", __func__);
  428. return -ENODEV;
  429. }
  430. if (request_irq(IRQ_MAC_ADB_CL, via_pmu_interrupt, IRQF_NO_SUSPEND,
  431. "VIA-PMU-CL", NULL)) {
  432. pr_err("%s: couldn't get CL irq\n", __func__);
  433. free_irq(IRQ_MAC_ADB_SR, NULL);
  434. return -ENODEV;
  435. }
  436. #endif /* !CONFIG_PPC_PMAC */
  437. pmu_fully_inited = 1;
  438. /* Make sure PMU settle down before continuing. This is _very_ important
  439. * since the IDE probe may shut interrupts down for quite a bit of time. If
  440. * a PMU communication is pending while this happens, the PMU may timeout
  441. * Not that on Core99 machines, the PMU keeps sending us environement
  442. * messages, we should find a way to either fix IDE or make it call
  443. * pmu_suspend() before masking interrupts. This can also happens while
  444. * scolling with some fbdevs.
  445. */
  446. do {
  447. pmu_poll();
  448. } while (pmu_state != idle);
  449. return 0;
  450. }
  451. arch_initcall(via_pmu_start);
  452. /*
  453. * This has to be done after pci_init, which is a subsys_initcall.
  454. */
  455. static int __init via_pmu_dev_init(void)
  456. {
  457. if (pmu_state == uninitialized)
  458. return -ENODEV;
  459. #ifdef CONFIG_PMAC_BACKLIGHT
  460. /* Initialize backlight */
  461. pmu_backlight_init();
  462. #endif
  463. #ifdef CONFIG_PPC32
  464. if (of_machine_is_compatible("AAPL,3400/2400") ||
  465. of_machine_is_compatible("AAPL,3500")) {
  466. int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
  467. NULL, PMAC_MB_INFO_MODEL, 0);
  468. pmu_battery_count = 1;
  469. if (mb == PMAC_TYPE_COMET)
  470. pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
  471. else
  472. pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
  473. } else if (of_machine_is_compatible("AAPL,PowerBook1998") ||
  474. of_machine_is_compatible("PowerBook1,1")) {
  475. pmu_battery_count = 2;
  476. pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
  477. pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
  478. } else {
  479. struct device_node* prim =
  480. of_find_node_by_name(NULL, "power-mgt");
  481. const u32 *prim_info = NULL;
  482. if (prim)
  483. prim_info = of_get_property(prim, "prim-info", NULL);
  484. if (prim_info) {
  485. /* Other stuffs here yet unknown */
  486. pmu_battery_count = (prim_info[6] >> 16) & 0xff;
  487. pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
  488. if (pmu_battery_count > 1)
  489. pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
  490. }
  491. of_node_put(prim);
  492. }
  493. #endif /* CONFIG_PPC32 */
  494. /* Create /proc/pmu */
  495. proc_pmu_root = proc_mkdir("pmu", NULL);
  496. if (proc_pmu_root) {
  497. long i;
  498. for (i=0; i<pmu_battery_count; i++) {
  499. char title[16];
  500. sprintf(title, "battery_%ld", i);
  501. proc_pmu_batt[i] = proc_create_single_data(title, 0,
  502. proc_pmu_root, pmu_battery_proc_show,
  503. (void *)i);
  504. }
  505. proc_pmu_info = proc_create_single("info", 0, proc_pmu_root,
  506. pmu_info_proc_show);
  507. proc_pmu_irqstats = proc_create_single("interrupts", 0,
  508. proc_pmu_root, pmu_irqstats_proc_show);
  509. proc_pmu_options = proc_create("options", 0600, proc_pmu_root,
  510. &pmu_options_proc_fops);
  511. }
  512. return 0;
  513. }
  514. device_initcall(via_pmu_dev_init);
  515. static int
  516. init_pmu(void)
  517. {
  518. int timeout;
  519. struct adb_request req;
  520. /* Negate TREQ. Set TACK to input and TREQ to output. */
  521. out_8(&via2[B], in_8(&via2[B]) | TREQ);
  522. out_8(&via2[DIRB], (in_8(&via2[DIRB]) | TREQ) & ~TACK);
  523. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  524. timeout = 100000;
  525. while (!req.complete) {
  526. if (--timeout < 0) {
  527. printk(KERN_ERR "init_pmu: no response from PMU\n");
  528. return 0;
  529. }
  530. udelay(10);
  531. pmu_poll();
  532. }
  533. /* ack all pending interrupts */
  534. timeout = 100000;
  535. interrupt_data[0][0] = 1;
  536. while (interrupt_data[0][0] || pmu_state != idle) {
  537. if (--timeout < 0) {
  538. printk(KERN_ERR "init_pmu: timed out acking intrs\n");
  539. return 0;
  540. }
  541. if (pmu_state == idle)
  542. adb_int_pending = 1;
  543. via_pmu_interrupt(0, NULL);
  544. udelay(10);
  545. }
  546. /* Tell PMU we are ready. */
  547. if (pmu_kind == PMU_KEYLARGO_BASED) {
  548. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  549. while (!req.complete)
  550. pmu_poll();
  551. }
  552. /* Read PMU version */
  553. pmu_request(&req, NULL, 1, PMU_GET_VERSION);
  554. pmu_wait_complete(&req);
  555. if (req.reply_len > 0)
  556. pmu_version = req.reply[0];
  557. /* Read server mode setting */
  558. if (pmu_kind == PMU_KEYLARGO_BASED) {
  559. pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
  560. PMU_PWR_GET_POWERUP_EVENTS);
  561. pmu_wait_complete(&req);
  562. if (req.reply_len == 2) {
  563. if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
  564. option_server_mode = 1;
  565. printk(KERN_INFO "via-pmu: Server Mode is %s\n",
  566. option_server_mode ? "enabled" : "disabled");
  567. }
  568. }
  569. printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
  570. PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
  571. return 1;
  572. }
  573. int
  574. pmu_get_model(void)
  575. {
  576. return pmu_kind;
  577. }
  578. static void pmu_set_server_mode(int server_mode)
  579. {
  580. struct adb_request req;
  581. if (pmu_kind != PMU_KEYLARGO_BASED)
  582. return;
  583. option_server_mode = server_mode;
  584. pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
  585. pmu_wait_complete(&req);
  586. if (req.reply_len < 2)
  587. return;
  588. if (server_mode)
  589. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
  590. PMU_PWR_SET_POWERUP_EVENTS,
  591. req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
  592. else
  593. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
  594. PMU_PWR_CLR_POWERUP_EVENTS,
  595. req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
  596. pmu_wait_complete(&req);
  597. }
  598. /* This new version of the code for 2400/3400/3500 powerbooks
  599. * is inspired from the implementation in gkrellm-pmu
  600. */
  601. static void
  602. done_battery_state_ohare(struct adb_request* req)
  603. {
  604. #ifdef CONFIG_PPC_PMAC
  605. /* format:
  606. * [0] : flags
  607. * 0x01 : AC indicator
  608. * 0x02 : charging
  609. * 0x04 : battery exist
  610. * 0x08 :
  611. * 0x10 :
  612. * 0x20 : full charged
  613. * 0x40 : pcharge reset
  614. * 0x80 : battery exist
  615. *
  616. * [1][2] : battery voltage
  617. * [3] : CPU temperature
  618. * [4] : battery temperature
  619. * [5] : current
  620. * [6][7] : pcharge
  621. * --tkoba
  622. */
  623. unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
  624. long pcharge, charge, vb, vmax, lmax;
  625. long vmax_charging, vmax_charged;
  626. long amperage, voltage, time, max;
  627. int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
  628. NULL, PMAC_MB_INFO_MODEL, 0);
  629. if (req->reply[0] & 0x01)
  630. pmu_power_flags |= PMU_PWR_AC_PRESENT;
  631. else
  632. pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
  633. if (mb == PMAC_TYPE_COMET) {
  634. vmax_charged = 189;
  635. vmax_charging = 213;
  636. lmax = 6500;
  637. } else {
  638. vmax_charged = 330;
  639. vmax_charging = 330;
  640. lmax = 6500;
  641. }
  642. vmax = vmax_charged;
  643. /* If battery installed */
  644. if (req->reply[0] & 0x04) {
  645. bat_flags |= PMU_BATT_PRESENT;
  646. if (req->reply[0] & 0x02)
  647. bat_flags |= PMU_BATT_CHARGING;
  648. vb = (req->reply[1] << 8) | req->reply[2];
  649. voltage = (vb * 265 + 72665) / 10;
  650. amperage = req->reply[5];
  651. if ((req->reply[0] & 0x01) == 0) {
  652. if (amperage > 200)
  653. vb += ((amperage - 200) * 15)/100;
  654. } else if (req->reply[0] & 0x02) {
  655. vb = (vb * 97) / 100;
  656. vmax = vmax_charging;
  657. }
  658. charge = (100 * vb) / vmax;
  659. if (req->reply[0] & 0x40) {
  660. pcharge = (req->reply[6] << 8) + req->reply[7];
  661. if (pcharge > lmax)
  662. pcharge = lmax;
  663. pcharge *= 100;
  664. pcharge = 100 - pcharge / lmax;
  665. if (pcharge < charge)
  666. charge = pcharge;
  667. }
  668. if (amperage > 0)
  669. time = (charge * 16440) / amperage;
  670. else
  671. time = 0;
  672. max = 100;
  673. amperage = -amperage;
  674. } else
  675. charge = max = amperage = voltage = time = 0;
  676. pmu_batteries[pmu_cur_battery].flags = bat_flags;
  677. pmu_batteries[pmu_cur_battery].charge = charge;
  678. pmu_batteries[pmu_cur_battery].max_charge = max;
  679. pmu_batteries[pmu_cur_battery].amperage = amperage;
  680. pmu_batteries[pmu_cur_battery].voltage = voltage;
  681. pmu_batteries[pmu_cur_battery].time_remaining = time;
  682. #endif /* CONFIG_PPC_PMAC */
  683. clear_bit(0, &async_req_locks);
  684. }
  685. static void
  686. done_battery_state_smart(struct adb_request* req)
  687. {
  688. /* format:
  689. * [0] : format of this structure (known: 3,4,5)
  690. * [1] : flags
  691. *
  692. * format 3 & 4:
  693. *
  694. * [2] : charge
  695. * [3] : max charge
  696. * [4] : current
  697. * [5] : voltage
  698. *
  699. * format 5:
  700. *
  701. * [2][3] : charge
  702. * [4][5] : max charge
  703. * [6][7] : current
  704. * [8][9] : voltage
  705. */
  706. unsigned int bat_flags = PMU_BATT_TYPE_SMART;
  707. int amperage;
  708. unsigned int capa, max, voltage;
  709. if (req->reply[1] & 0x01)
  710. pmu_power_flags |= PMU_PWR_AC_PRESENT;
  711. else
  712. pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
  713. capa = max = amperage = voltage = 0;
  714. if (req->reply[1] & 0x04) {
  715. bat_flags |= PMU_BATT_PRESENT;
  716. switch(req->reply[0]) {
  717. case 3:
  718. case 4: capa = req->reply[2];
  719. max = req->reply[3];
  720. amperage = *((signed char *)&req->reply[4]);
  721. voltage = req->reply[5];
  722. break;
  723. case 5: capa = (req->reply[2] << 8) | req->reply[3];
  724. max = (req->reply[4] << 8) | req->reply[5];
  725. amperage = *((signed short *)&req->reply[6]);
  726. voltage = (req->reply[8] << 8) | req->reply[9];
  727. break;
  728. default:
  729. pr_warn("pmu.c: unrecognized battery info, "
  730. "len: %d, %4ph\n", req->reply_len,
  731. req->reply);
  732. break;
  733. }
  734. }
  735. if ((req->reply[1] & 0x01) && (amperage > 0))
  736. bat_flags |= PMU_BATT_CHARGING;
  737. pmu_batteries[pmu_cur_battery].flags = bat_flags;
  738. pmu_batteries[pmu_cur_battery].charge = capa;
  739. pmu_batteries[pmu_cur_battery].max_charge = max;
  740. pmu_batteries[pmu_cur_battery].amperage = amperage;
  741. pmu_batteries[pmu_cur_battery].voltage = voltage;
  742. if (amperage) {
  743. if ((req->reply[1] & 0x01) && (amperage > 0))
  744. pmu_batteries[pmu_cur_battery].time_remaining
  745. = ((max-capa) * 3600) / amperage;
  746. else
  747. pmu_batteries[pmu_cur_battery].time_remaining
  748. = (capa * 3600) / (-amperage);
  749. } else
  750. pmu_batteries[pmu_cur_battery].time_remaining = 0;
  751. pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
  752. clear_bit(0, &async_req_locks);
  753. }
  754. static void
  755. query_battery_state(void)
  756. {
  757. if (test_and_set_bit(0, &async_req_locks))
  758. return;
  759. if (pmu_kind == PMU_OHARE_BASED)
  760. pmu_request(&batt_req, done_battery_state_ohare,
  761. 1, PMU_BATTERY_STATE);
  762. else
  763. pmu_request(&batt_req, done_battery_state_smart,
  764. 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
  765. }
  766. static int pmu_info_proc_show(struct seq_file *m, void *v)
  767. {
  768. seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
  769. seq_printf(m, "PMU firmware version : %02x\n", pmu_version);
  770. seq_printf(m, "AC Power : %d\n",
  771. ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
  772. seq_printf(m, "Battery count : %d\n", pmu_battery_count);
  773. return 0;
  774. }
  775. static int pmu_irqstats_proc_show(struct seq_file *m, void *v)
  776. {
  777. int i;
  778. static const char *irq_names[NUM_IRQ_STATS] = {
  779. "Unknown interrupt (type 0)",
  780. "Unknown interrupt (type 1)",
  781. "PC-Card eject button",
  782. "Sound/Brightness button",
  783. "ADB message",
  784. "Battery state change",
  785. "Environment interrupt",
  786. "Tick timer",
  787. "Ghost interrupt (zero len)",
  788. "Empty interrupt (empty mask)",
  789. "Max irqs in a row",
  790. "Total CB1 triggered events",
  791. "Total GPIO1 triggered events",
  792. };
  793. for (i = 0; i < NUM_IRQ_STATS; i++) {
  794. seq_printf(m, " %2u: %10u (%s)\n",
  795. i, pmu_irq_stats[i], irq_names[i]);
  796. }
  797. return 0;
  798. }
  799. static int pmu_battery_proc_show(struct seq_file *m, void *v)
  800. {
  801. long batnum = (long)m->private;
  802. seq_putc(m, '\n');
  803. seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags);
  804. seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge);
  805. seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge);
  806. seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage);
  807. seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage);
  808. seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining);
  809. return 0;
  810. }
  811. static int pmu_options_proc_show(struct seq_file *m, void *v)
  812. {
  813. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  814. if (pmu_kind == PMU_KEYLARGO_BASED &&
  815. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
  816. seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup);
  817. #endif
  818. if (pmu_kind == PMU_KEYLARGO_BASED)
  819. seq_printf(m, "server_mode=%d\n", option_server_mode);
  820. return 0;
  821. }
  822. static int pmu_options_proc_open(struct inode *inode, struct file *file)
  823. {
  824. return single_open(file, pmu_options_proc_show, NULL);
  825. }
  826. static ssize_t pmu_options_proc_write(struct file *file,
  827. const char __user *buffer, size_t count, loff_t *pos)
  828. {
  829. char tmp[33];
  830. char *label, *val;
  831. size_t fcount = count;
  832. if (!count)
  833. return -EINVAL;
  834. if (count > 32)
  835. count = 32;
  836. if (copy_from_user(tmp, buffer, count))
  837. return -EFAULT;
  838. tmp[count] = 0;
  839. label = tmp;
  840. while(*label == ' ')
  841. label++;
  842. val = label;
  843. while(*val && (*val != '=')) {
  844. if (*val == ' ')
  845. *val = 0;
  846. val++;
  847. }
  848. if ((*val) == 0)
  849. return -EINVAL;
  850. *(val++) = 0;
  851. while(*val == ' ')
  852. val++;
  853. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  854. if (pmu_kind == PMU_KEYLARGO_BASED &&
  855. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
  856. if (!strcmp(label, "lid_wakeup"))
  857. option_lid_wakeup = ((*val) == '1');
  858. #endif
  859. if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
  860. int new_value;
  861. new_value = ((*val) == '1');
  862. if (new_value != option_server_mode)
  863. pmu_set_server_mode(new_value);
  864. }
  865. return fcount;
  866. }
  867. static const struct file_operations pmu_options_proc_fops = {
  868. .owner = THIS_MODULE,
  869. .open = pmu_options_proc_open,
  870. .read = seq_read,
  871. .llseek = seq_lseek,
  872. .release = single_release,
  873. .write = pmu_options_proc_write,
  874. };
  875. #ifdef CONFIG_ADB
  876. /* Send an ADB command */
  877. static int pmu_send_request(struct adb_request *req, int sync)
  878. {
  879. int i, ret;
  880. if (pmu_state == uninitialized || !pmu_fully_inited) {
  881. req->complete = 1;
  882. return -ENXIO;
  883. }
  884. ret = -EINVAL;
  885. switch (req->data[0]) {
  886. case PMU_PACKET:
  887. for (i = 0; i < req->nbytes - 1; ++i)
  888. req->data[i] = req->data[i+1];
  889. --req->nbytes;
  890. if (pmu_data_len[req->data[0]][1] != 0) {
  891. req->reply[0] = ADB_RET_OK;
  892. req->reply_len = 1;
  893. } else
  894. req->reply_len = 0;
  895. ret = pmu_queue_request(req);
  896. break;
  897. case CUDA_PACKET:
  898. switch (req->data[1]) {
  899. case CUDA_GET_TIME:
  900. if (req->nbytes != 2)
  901. break;
  902. req->data[0] = PMU_READ_RTC;
  903. req->nbytes = 1;
  904. req->reply_len = 3;
  905. req->reply[0] = CUDA_PACKET;
  906. req->reply[1] = 0;
  907. req->reply[2] = CUDA_GET_TIME;
  908. ret = pmu_queue_request(req);
  909. break;
  910. case CUDA_SET_TIME:
  911. if (req->nbytes != 6)
  912. break;
  913. req->data[0] = PMU_SET_RTC;
  914. req->nbytes = 5;
  915. for (i = 1; i <= 4; ++i)
  916. req->data[i] = req->data[i+1];
  917. req->reply_len = 3;
  918. req->reply[0] = CUDA_PACKET;
  919. req->reply[1] = 0;
  920. req->reply[2] = CUDA_SET_TIME;
  921. ret = pmu_queue_request(req);
  922. break;
  923. }
  924. break;
  925. case ADB_PACKET:
  926. if (!pmu_has_adb)
  927. return -ENXIO;
  928. for (i = req->nbytes - 1; i > 1; --i)
  929. req->data[i+2] = req->data[i];
  930. req->data[3] = req->nbytes - 2;
  931. req->data[2] = pmu_adb_flags;
  932. /*req->data[1] = req->data[1];*/
  933. req->data[0] = PMU_ADB_CMD;
  934. req->nbytes += 2;
  935. req->reply_expected = 1;
  936. req->reply_len = 0;
  937. ret = pmu_queue_request(req);
  938. break;
  939. }
  940. if (ret) {
  941. req->complete = 1;
  942. return ret;
  943. }
  944. if (sync)
  945. while (!req->complete)
  946. pmu_poll();
  947. return 0;
  948. }
  949. /* Enable/disable autopolling */
  950. static int __pmu_adb_autopoll(int devs)
  951. {
  952. struct adb_request req;
  953. if (devs) {
  954. pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
  955. adb_dev_map >> 8, adb_dev_map);
  956. pmu_adb_flags = 2;
  957. } else {
  958. pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
  959. pmu_adb_flags = 0;
  960. }
  961. while (!req.complete)
  962. pmu_poll();
  963. return 0;
  964. }
  965. static int pmu_adb_autopoll(int devs)
  966. {
  967. if (pmu_state == uninitialized || !pmu_fully_inited || !pmu_has_adb)
  968. return -ENXIO;
  969. adb_dev_map = devs;
  970. return __pmu_adb_autopoll(devs);
  971. }
  972. /* Reset the ADB bus */
  973. static int pmu_adb_reset_bus(void)
  974. {
  975. struct adb_request req;
  976. int save_autopoll = adb_dev_map;
  977. if (pmu_state == uninitialized || !pmu_fully_inited || !pmu_has_adb)
  978. return -ENXIO;
  979. /* anyone got a better idea?? */
  980. __pmu_adb_autopoll(0);
  981. req.nbytes = 4;
  982. req.done = NULL;
  983. req.data[0] = PMU_ADB_CMD;
  984. req.data[1] = ADB_BUSRESET;
  985. req.data[2] = 0;
  986. req.data[3] = 0;
  987. req.data[4] = 0;
  988. req.reply_len = 0;
  989. req.reply_expected = 1;
  990. if (pmu_queue_request(&req) != 0) {
  991. printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
  992. return -EIO;
  993. }
  994. pmu_wait_complete(&req);
  995. if (save_autopoll != 0)
  996. __pmu_adb_autopoll(save_autopoll);
  997. return 0;
  998. }
  999. #endif /* CONFIG_ADB */
  1000. /* Construct and send a pmu request */
  1001. int
  1002. pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
  1003. int nbytes, ...)
  1004. {
  1005. va_list list;
  1006. int i;
  1007. if (pmu_state == uninitialized)
  1008. return -ENXIO;
  1009. if (nbytes < 0 || nbytes > 32) {
  1010. printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
  1011. req->complete = 1;
  1012. return -EINVAL;
  1013. }
  1014. req->nbytes = nbytes;
  1015. req->done = done;
  1016. va_start(list, nbytes);
  1017. for (i = 0; i < nbytes; ++i)
  1018. req->data[i] = va_arg(list, int);
  1019. va_end(list);
  1020. req->reply_len = 0;
  1021. req->reply_expected = 0;
  1022. return pmu_queue_request(req);
  1023. }
  1024. int
  1025. pmu_queue_request(struct adb_request *req)
  1026. {
  1027. unsigned long flags;
  1028. int nsend;
  1029. if (pmu_state == uninitialized) {
  1030. req->complete = 1;
  1031. return -ENXIO;
  1032. }
  1033. if (req->nbytes <= 0) {
  1034. req->complete = 1;
  1035. return 0;
  1036. }
  1037. nsend = pmu_data_len[req->data[0]][0];
  1038. if (nsend >= 0 && req->nbytes != nsend + 1) {
  1039. req->complete = 1;
  1040. return -EINVAL;
  1041. }
  1042. req->next = NULL;
  1043. req->sent = 0;
  1044. req->complete = 0;
  1045. spin_lock_irqsave(&pmu_lock, flags);
  1046. if (current_req) {
  1047. last_req->next = req;
  1048. last_req = req;
  1049. } else {
  1050. current_req = req;
  1051. last_req = req;
  1052. if (pmu_state == idle)
  1053. pmu_start();
  1054. }
  1055. spin_unlock_irqrestore(&pmu_lock, flags);
  1056. return 0;
  1057. }
  1058. static inline void
  1059. wait_for_ack(void)
  1060. {
  1061. /* Sightly increased the delay, I had one occurrence of the message
  1062. * reported
  1063. */
  1064. int timeout = 4000;
  1065. while ((in_8(&via2[B]) & TACK) == 0) {
  1066. if (--timeout < 0) {
  1067. printk(KERN_ERR "PMU not responding (!ack)\n");
  1068. return;
  1069. }
  1070. udelay(10);
  1071. }
  1072. }
  1073. /* New PMU seems to be very sensitive to those timings, so we make sure
  1074. * PCI is flushed immediately */
  1075. static inline void
  1076. send_byte(int x)
  1077. {
  1078. out_8(&via1[ACR], in_8(&via1[ACR]) | SR_OUT | SR_EXT);
  1079. out_8(&via1[SR], x);
  1080. out_8(&via2[B], in_8(&via2[B]) & ~TREQ); /* assert TREQ */
  1081. (void)in_8(&via2[B]);
  1082. }
  1083. static inline void
  1084. recv_byte(void)
  1085. {
  1086. out_8(&via1[ACR], (in_8(&via1[ACR]) & ~SR_OUT) | SR_EXT);
  1087. in_8(&via1[SR]); /* resets SR */
  1088. out_8(&via2[B], in_8(&via2[B]) & ~TREQ);
  1089. (void)in_8(&via2[B]);
  1090. }
  1091. static inline void
  1092. pmu_done(struct adb_request *req)
  1093. {
  1094. void (*done)(struct adb_request *) = req->done;
  1095. mb();
  1096. req->complete = 1;
  1097. /* Here, we assume that if the request has a done member, the
  1098. * struct request will survive to setting req->complete to 1
  1099. */
  1100. if (done)
  1101. (*done)(req);
  1102. }
  1103. static void
  1104. pmu_start(void)
  1105. {
  1106. struct adb_request *req;
  1107. /* assert pmu_state == idle */
  1108. /* get the packet to send */
  1109. req = current_req;
  1110. if (!req || pmu_state != idle
  1111. || (/*req->reply_expected && */req_awaiting_reply))
  1112. return;
  1113. pmu_state = sending;
  1114. data_index = 1;
  1115. data_len = pmu_data_len[req->data[0]][0];
  1116. /* Sounds safer to make sure ACK is high before writing. This helped
  1117. * kill a problem with ADB and some iBooks
  1118. */
  1119. wait_for_ack();
  1120. /* set the shift register to shift out and send a byte */
  1121. send_byte(req->data[0]);
  1122. }
  1123. void
  1124. pmu_poll(void)
  1125. {
  1126. if (pmu_state == uninitialized)
  1127. return;
  1128. if (disable_poll)
  1129. return;
  1130. via_pmu_interrupt(0, NULL);
  1131. }
  1132. void
  1133. pmu_poll_adb(void)
  1134. {
  1135. if (pmu_state == uninitialized)
  1136. return;
  1137. if (disable_poll)
  1138. return;
  1139. /* Kicks ADB read when PMU is suspended */
  1140. adb_int_pending = 1;
  1141. do {
  1142. via_pmu_interrupt(0, NULL);
  1143. } while (pmu_suspended && (adb_int_pending || pmu_state != idle
  1144. || req_awaiting_reply));
  1145. }
  1146. void
  1147. pmu_wait_complete(struct adb_request *req)
  1148. {
  1149. if (pmu_state == uninitialized)
  1150. return;
  1151. while((pmu_state != idle && pmu_state != locked) || !req->complete)
  1152. via_pmu_interrupt(0, NULL);
  1153. }
  1154. /* This function loops until the PMU is idle and prevents it from
  1155. * anwsering to ADB interrupts. pmu_request can still be called.
  1156. * This is done to avoid spurrious shutdowns when we know we'll have
  1157. * interrupts switched off for a long time
  1158. */
  1159. void
  1160. pmu_suspend(void)
  1161. {
  1162. unsigned long flags;
  1163. if (pmu_state == uninitialized)
  1164. return;
  1165. spin_lock_irqsave(&pmu_lock, flags);
  1166. pmu_suspended++;
  1167. if (pmu_suspended > 1) {
  1168. spin_unlock_irqrestore(&pmu_lock, flags);
  1169. return;
  1170. }
  1171. do {
  1172. spin_unlock_irqrestore(&pmu_lock, flags);
  1173. if (req_awaiting_reply)
  1174. adb_int_pending = 1;
  1175. via_pmu_interrupt(0, NULL);
  1176. spin_lock_irqsave(&pmu_lock, flags);
  1177. if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
  1178. if (gpio_irq >= 0)
  1179. disable_irq_nosync(gpio_irq);
  1180. out_8(&via1[IER], CB1_INT | IER_CLR);
  1181. spin_unlock_irqrestore(&pmu_lock, flags);
  1182. break;
  1183. }
  1184. } while (1);
  1185. }
  1186. void
  1187. pmu_resume(void)
  1188. {
  1189. unsigned long flags;
  1190. if (pmu_state == uninitialized || pmu_suspended < 1)
  1191. return;
  1192. spin_lock_irqsave(&pmu_lock, flags);
  1193. pmu_suspended--;
  1194. if (pmu_suspended > 0) {
  1195. spin_unlock_irqrestore(&pmu_lock, flags);
  1196. return;
  1197. }
  1198. adb_int_pending = 1;
  1199. if (gpio_irq >= 0)
  1200. enable_irq(gpio_irq);
  1201. out_8(&via1[IER], CB1_INT | IER_SET);
  1202. spin_unlock_irqrestore(&pmu_lock, flags);
  1203. pmu_poll();
  1204. }
  1205. /* Interrupt data could be the result data from an ADB cmd */
  1206. static void
  1207. pmu_handle_data(unsigned char *data, int len)
  1208. {
  1209. unsigned char ints;
  1210. int idx;
  1211. int i = 0;
  1212. asleep = 0;
  1213. if (drop_interrupts || len < 1) {
  1214. adb_int_pending = 0;
  1215. pmu_irq_stats[8]++;
  1216. return;
  1217. }
  1218. /* Get PMU interrupt mask */
  1219. ints = data[0];
  1220. /* Record zero interrupts for stats */
  1221. if (ints == 0)
  1222. pmu_irq_stats[9]++;
  1223. /* Hack to deal with ADB autopoll flag */
  1224. if (ints & PMU_INT_ADB)
  1225. ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
  1226. next:
  1227. if (ints == 0) {
  1228. if (i > pmu_irq_stats[10])
  1229. pmu_irq_stats[10] = i;
  1230. return;
  1231. }
  1232. i++;
  1233. idx = ffs(ints) - 1;
  1234. ints &= ~BIT(idx);
  1235. pmu_irq_stats[idx]++;
  1236. /* Note: for some reason, we get an interrupt with len=1,
  1237. * data[0]==0 after each normal ADB interrupt, at least
  1238. * on the Pismo. Still investigating... --BenH
  1239. */
  1240. switch (BIT(idx)) {
  1241. case PMU_INT_ADB:
  1242. if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
  1243. struct adb_request *req = req_awaiting_reply;
  1244. if (!req) {
  1245. printk(KERN_ERR "PMU: extra ADB reply\n");
  1246. return;
  1247. }
  1248. req_awaiting_reply = NULL;
  1249. if (len <= 2)
  1250. req->reply_len = 0;
  1251. else {
  1252. memcpy(req->reply, data + 1, len - 1);
  1253. req->reply_len = len - 1;
  1254. }
  1255. pmu_done(req);
  1256. } else {
  1257. #ifdef CONFIG_XMON
  1258. if (len == 4 && data[1] == 0x2c) {
  1259. extern int xmon_wants_key, xmon_adb_keycode;
  1260. if (xmon_wants_key) {
  1261. xmon_adb_keycode = data[2];
  1262. return;
  1263. }
  1264. }
  1265. #endif /* CONFIG_XMON */
  1266. #ifdef CONFIG_ADB
  1267. /*
  1268. * XXX On the [23]400 the PMU gives us an up
  1269. * event for keycodes 0x74 or 0x75 when the PC
  1270. * card eject buttons are released, so we
  1271. * ignore those events.
  1272. */
  1273. if (!(pmu_kind == PMU_OHARE_BASED && len == 4
  1274. && data[1] == 0x2c && data[3] == 0xff
  1275. && (data[2] & ~1) == 0xf4))
  1276. adb_input(data+1, len-1, 1);
  1277. #endif /* CONFIG_ADB */
  1278. }
  1279. break;
  1280. /* Sound/brightness button pressed */
  1281. case PMU_INT_SNDBRT:
  1282. #ifdef CONFIG_PMAC_BACKLIGHT
  1283. if (len == 3)
  1284. pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4);
  1285. #endif
  1286. break;
  1287. /* Tick interrupt */
  1288. case PMU_INT_TICK:
  1289. /* Environment or tick interrupt, query batteries */
  1290. if (pmu_battery_count) {
  1291. if ((--query_batt_timer) == 0) {
  1292. query_battery_state();
  1293. query_batt_timer = BATTERY_POLLING_COUNT;
  1294. }
  1295. }
  1296. break;
  1297. case PMU_INT_ENVIRONMENT:
  1298. if (pmu_battery_count)
  1299. query_battery_state();
  1300. pmu_pass_intr(data, len);
  1301. /* len == 6 is probably a bad check. But how do I
  1302. * know what PMU versions send what events here? */
  1303. if (len == 6) {
  1304. via_pmu_event(PMU_EVT_POWER, !!(data[1]&8));
  1305. via_pmu_event(PMU_EVT_LID, data[1]&1);
  1306. }
  1307. break;
  1308. default:
  1309. pmu_pass_intr(data, len);
  1310. }
  1311. goto next;
  1312. }
  1313. static struct adb_request*
  1314. pmu_sr_intr(void)
  1315. {
  1316. struct adb_request *req;
  1317. int bite = 0;
  1318. if (in_8(&via2[B]) & TREQ) {
  1319. printk(KERN_ERR "PMU: spurious SR intr (%x)\n", in_8(&via2[B]));
  1320. return NULL;
  1321. }
  1322. /* The ack may not yet be low when we get the interrupt */
  1323. while ((in_8(&via2[B]) & TACK) != 0)
  1324. ;
  1325. /* if reading grab the byte, and reset the interrupt */
  1326. if (pmu_state == reading || pmu_state == reading_intr)
  1327. bite = in_8(&via1[SR]);
  1328. /* reset TREQ and wait for TACK to go high */
  1329. out_8(&via2[B], in_8(&via2[B]) | TREQ);
  1330. wait_for_ack();
  1331. switch (pmu_state) {
  1332. case sending:
  1333. req = current_req;
  1334. if (data_len < 0) {
  1335. data_len = req->nbytes - 1;
  1336. send_byte(data_len);
  1337. break;
  1338. }
  1339. if (data_index <= data_len) {
  1340. send_byte(req->data[data_index++]);
  1341. break;
  1342. }
  1343. req->sent = 1;
  1344. data_len = pmu_data_len[req->data[0]][1];
  1345. if (data_len == 0) {
  1346. pmu_state = idle;
  1347. current_req = req->next;
  1348. if (req->reply_expected)
  1349. req_awaiting_reply = req;
  1350. else
  1351. return req;
  1352. } else {
  1353. pmu_state = reading;
  1354. data_index = 0;
  1355. reply_ptr = req->reply + req->reply_len;
  1356. recv_byte();
  1357. }
  1358. break;
  1359. case intack:
  1360. data_index = 0;
  1361. data_len = -1;
  1362. pmu_state = reading_intr;
  1363. reply_ptr = interrupt_data[int_data_last];
  1364. recv_byte();
  1365. if (gpio_irq >= 0 && !gpio_irq_enabled) {
  1366. enable_irq(gpio_irq);
  1367. gpio_irq_enabled = 1;
  1368. }
  1369. break;
  1370. case reading:
  1371. case reading_intr:
  1372. if (data_len == -1) {
  1373. data_len = bite;
  1374. if (bite > 32)
  1375. printk(KERN_ERR "PMU: bad reply len %d\n", bite);
  1376. } else if (data_index < 32) {
  1377. reply_ptr[data_index++] = bite;
  1378. }
  1379. if (data_index < data_len) {
  1380. recv_byte();
  1381. break;
  1382. }
  1383. if (pmu_state == reading_intr) {
  1384. pmu_state = idle;
  1385. int_data_state[int_data_last] = int_data_ready;
  1386. interrupt_data_len[int_data_last] = data_len;
  1387. } else {
  1388. req = current_req;
  1389. /*
  1390. * For PMU sleep and freq change requests, we lock the
  1391. * PMU until it's explicitly unlocked. This avoids any
  1392. * spurrious event polling getting in
  1393. */
  1394. current_req = req->next;
  1395. req->reply_len += data_index;
  1396. if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
  1397. pmu_state = locked;
  1398. else
  1399. pmu_state = idle;
  1400. return req;
  1401. }
  1402. break;
  1403. default:
  1404. printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
  1405. pmu_state);
  1406. }
  1407. return NULL;
  1408. }
  1409. static irqreturn_t
  1410. via_pmu_interrupt(int irq, void *arg)
  1411. {
  1412. unsigned long flags;
  1413. int intr;
  1414. int nloop = 0;
  1415. int int_data = -1;
  1416. struct adb_request *req = NULL;
  1417. int handled = 0;
  1418. /* This is a bit brutal, we can probably do better */
  1419. spin_lock_irqsave(&pmu_lock, flags);
  1420. ++disable_poll;
  1421. for (;;) {
  1422. /* On 68k Macs, VIA interrupts are dispatched individually.
  1423. * Unless we are polling, the relevant IRQ flag has already
  1424. * been cleared.
  1425. */
  1426. intr = 0;
  1427. if (IS_ENABLED(CONFIG_PPC_PMAC) || !irq) {
  1428. intr = in_8(&via1[IFR]) & (SR_INT | CB1_INT);
  1429. out_8(&via1[IFR], intr);
  1430. }
  1431. #ifndef CONFIG_PPC_PMAC
  1432. switch (irq) {
  1433. case IRQ_MAC_ADB_CL:
  1434. intr = CB1_INT;
  1435. break;
  1436. case IRQ_MAC_ADB_SR:
  1437. intr = SR_INT;
  1438. break;
  1439. }
  1440. #endif
  1441. if (intr == 0)
  1442. break;
  1443. handled = 1;
  1444. if (++nloop > 1000) {
  1445. printk(KERN_DEBUG "PMU: stuck in intr loop, "
  1446. "intr=%x, ier=%x pmu_state=%d\n",
  1447. intr, in_8(&via1[IER]), pmu_state);
  1448. break;
  1449. }
  1450. if (intr & CB1_INT) {
  1451. adb_int_pending = 1;
  1452. pmu_irq_stats[11]++;
  1453. }
  1454. if (intr & SR_INT) {
  1455. req = pmu_sr_intr();
  1456. if (req)
  1457. break;
  1458. }
  1459. #ifndef CONFIG_PPC_PMAC
  1460. break;
  1461. #endif
  1462. }
  1463. recheck:
  1464. if (pmu_state == idle) {
  1465. if (adb_int_pending) {
  1466. if (int_data_state[0] == int_data_empty)
  1467. int_data_last = 0;
  1468. else if (int_data_state[1] == int_data_empty)
  1469. int_data_last = 1;
  1470. else
  1471. goto no_free_slot;
  1472. pmu_state = intack;
  1473. int_data_state[int_data_last] = int_data_fill;
  1474. /* Sounds safer to make sure ACK is high before writing.
  1475. * This helped kill a problem with ADB and some iBooks
  1476. */
  1477. wait_for_ack();
  1478. send_byte(PMU_INT_ACK);
  1479. adb_int_pending = 0;
  1480. } else if (current_req)
  1481. pmu_start();
  1482. }
  1483. no_free_slot:
  1484. /* Mark the oldest buffer for flushing */
  1485. if (int_data_state[!int_data_last] == int_data_ready) {
  1486. int_data_state[!int_data_last] = int_data_flush;
  1487. int_data = !int_data_last;
  1488. } else if (int_data_state[int_data_last] == int_data_ready) {
  1489. int_data_state[int_data_last] = int_data_flush;
  1490. int_data = int_data_last;
  1491. }
  1492. --disable_poll;
  1493. spin_unlock_irqrestore(&pmu_lock, flags);
  1494. /* Deal with completed PMU requests outside of the lock */
  1495. if (req) {
  1496. pmu_done(req);
  1497. req = NULL;
  1498. }
  1499. /* Deal with interrupt datas outside of the lock */
  1500. if (int_data >= 0) {
  1501. pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]);
  1502. spin_lock_irqsave(&pmu_lock, flags);
  1503. ++disable_poll;
  1504. int_data_state[int_data] = int_data_empty;
  1505. int_data = -1;
  1506. goto recheck;
  1507. }
  1508. return IRQ_RETVAL(handled);
  1509. }
  1510. void
  1511. pmu_unlock(void)
  1512. {
  1513. unsigned long flags;
  1514. spin_lock_irqsave(&pmu_lock, flags);
  1515. if (pmu_state == locked)
  1516. pmu_state = idle;
  1517. adb_int_pending = 1;
  1518. spin_unlock_irqrestore(&pmu_lock, flags);
  1519. }
  1520. static __maybe_unused irqreturn_t
  1521. gpio1_interrupt(int irq, void *arg)
  1522. {
  1523. unsigned long flags;
  1524. if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
  1525. spin_lock_irqsave(&pmu_lock, flags);
  1526. if (gpio_irq_enabled > 0) {
  1527. disable_irq_nosync(gpio_irq);
  1528. gpio_irq_enabled = 0;
  1529. }
  1530. pmu_irq_stats[12]++;
  1531. adb_int_pending = 1;
  1532. spin_unlock_irqrestore(&pmu_lock, flags);
  1533. via_pmu_interrupt(0, NULL);
  1534. return IRQ_HANDLED;
  1535. }
  1536. return IRQ_NONE;
  1537. }
  1538. void
  1539. pmu_enable_irled(int on)
  1540. {
  1541. struct adb_request req;
  1542. if (pmu_state == uninitialized)
  1543. return ;
  1544. if (pmu_kind == PMU_KEYLARGO_BASED)
  1545. return ;
  1546. pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
  1547. (on ? PMU_POW_ON : PMU_POW_OFF));
  1548. pmu_wait_complete(&req);
  1549. }
  1550. void
  1551. pmu_restart(void)
  1552. {
  1553. struct adb_request req;
  1554. if (pmu_state == uninitialized)
  1555. return;
  1556. local_irq_disable();
  1557. drop_interrupts = 1;
  1558. if (pmu_kind != PMU_KEYLARGO_BASED) {
  1559. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
  1560. PMU_INT_TICK );
  1561. while(!req.complete)
  1562. pmu_poll();
  1563. }
  1564. pmu_request(&req, NULL, 1, PMU_RESET);
  1565. pmu_wait_complete(&req);
  1566. for (;;)
  1567. ;
  1568. }
  1569. void
  1570. pmu_shutdown(void)
  1571. {
  1572. struct adb_request req;
  1573. if (pmu_state == uninitialized)
  1574. return;
  1575. local_irq_disable();
  1576. drop_interrupts = 1;
  1577. if (pmu_kind != PMU_KEYLARGO_BASED) {
  1578. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
  1579. PMU_INT_TICK );
  1580. pmu_wait_complete(&req);
  1581. } else {
  1582. /* Disable server mode on shutdown or we'll just
  1583. * wake up again
  1584. */
  1585. pmu_set_server_mode(0);
  1586. }
  1587. pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
  1588. 'M', 'A', 'T', 'T');
  1589. pmu_wait_complete(&req);
  1590. for (;;)
  1591. ;
  1592. }
  1593. int
  1594. pmu_present(void)
  1595. {
  1596. return pmu_state != uninitialized;
  1597. }
  1598. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  1599. /*
  1600. * Put the powerbook to sleep.
  1601. */
  1602. static u32 save_via[8];
  1603. static void
  1604. save_via_state(void)
  1605. {
  1606. save_via[0] = in_8(&via1[ANH]);
  1607. save_via[1] = in_8(&via1[DIRA]);
  1608. save_via[2] = in_8(&via1[B]);
  1609. save_via[3] = in_8(&via1[DIRB]);
  1610. save_via[4] = in_8(&via1[PCR]);
  1611. save_via[5] = in_8(&via1[ACR]);
  1612. save_via[6] = in_8(&via1[T1CL]);
  1613. save_via[7] = in_8(&via1[T1CH]);
  1614. }
  1615. static void
  1616. restore_via_state(void)
  1617. {
  1618. out_8(&via1[ANH], save_via[0]);
  1619. out_8(&via1[DIRA], save_via[1]);
  1620. out_8(&via1[B], save_via[2]);
  1621. out_8(&via1[DIRB], save_via[3]);
  1622. out_8(&via1[PCR], save_via[4]);
  1623. out_8(&via1[ACR], save_via[5]);
  1624. out_8(&via1[T1CL], save_via[6]);
  1625. out_8(&via1[T1CH], save_via[7]);
  1626. out_8(&via1[IER], IER_CLR | 0x7f); /* disable all intrs */
  1627. out_8(&via1[IFR], 0x7f); /* clear IFR */
  1628. out_8(&via1[IER], IER_SET | SR_INT | CB1_INT);
  1629. }
  1630. #define GRACKLE_PM (1<<7)
  1631. #define GRACKLE_DOZE (1<<5)
  1632. #define GRACKLE_NAP (1<<4)
  1633. #define GRACKLE_SLEEP (1<<3)
  1634. static int powerbook_sleep_grackle(void)
  1635. {
  1636. unsigned long save_l2cr;
  1637. unsigned short pmcr1;
  1638. struct adb_request req;
  1639. struct pci_dev *grackle;
  1640. grackle = pci_get_domain_bus_and_slot(0, 0, 0);
  1641. if (!grackle)
  1642. return -ENODEV;
  1643. /* Turn off various things. Darwin does some retry tests here... */
  1644. pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
  1645. pmu_wait_complete(&req);
  1646. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  1647. PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
  1648. pmu_wait_complete(&req);
  1649. /* For 750, save backside cache setting and disable it */
  1650. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  1651. if (!__fake_sleep) {
  1652. /* Ask the PMU to put us to sleep */
  1653. pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1654. pmu_wait_complete(&req);
  1655. }
  1656. /* The VIA is supposed not to be restored correctly*/
  1657. save_via_state();
  1658. /* We shut down some HW */
  1659. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
  1660. pci_read_config_word(grackle, 0x70, &pmcr1);
  1661. /* Apparently, MacOS uses NAP mode for Grackle ??? */
  1662. pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
  1663. pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
  1664. pci_write_config_word(grackle, 0x70, pmcr1);
  1665. /* Call low-level ASM sleep handler */
  1666. if (__fake_sleep)
  1667. mdelay(5000);
  1668. else
  1669. low_sleep_handler();
  1670. /* We're awake again, stop grackle PM */
  1671. pci_read_config_word(grackle, 0x70, &pmcr1);
  1672. pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
  1673. pci_write_config_word(grackle, 0x70, pmcr1);
  1674. pci_dev_put(grackle);
  1675. /* Make sure the PMU is idle */
  1676. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
  1677. restore_via_state();
  1678. /* Restore L2 cache */
  1679. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  1680. _set_L2CR(save_l2cr);
  1681. /* Restore userland MMU context */
  1682. switch_mmu_context(NULL, current->active_mm, NULL);
  1683. /* Power things up */
  1684. pmu_unlock();
  1685. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  1686. pmu_wait_complete(&req);
  1687. pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
  1688. PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
  1689. pmu_wait_complete(&req);
  1690. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  1691. PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
  1692. pmu_wait_complete(&req);
  1693. return 0;
  1694. }
  1695. static int
  1696. powerbook_sleep_Core99(void)
  1697. {
  1698. unsigned long save_l2cr;
  1699. unsigned long save_l3cr;
  1700. struct adb_request req;
  1701. if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
  1702. printk(KERN_ERR "Sleep mode not supported on this machine\n");
  1703. return -ENOSYS;
  1704. }
  1705. if (num_online_cpus() > 1 || cpu_is_offline(0))
  1706. return -EAGAIN;
  1707. /* Stop environment and ADB interrupts */
  1708. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
  1709. pmu_wait_complete(&req);
  1710. /* Tell PMU what events will wake us up */
  1711. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
  1712. 0xff, 0xff);
  1713. pmu_wait_complete(&req);
  1714. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
  1715. 0, PMU_PWR_WAKEUP_KEY |
  1716. (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
  1717. pmu_wait_complete(&req);
  1718. /* Save the state of the L2 and L3 caches */
  1719. save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
  1720. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  1721. if (!__fake_sleep) {
  1722. /* Ask the PMU to put us to sleep */
  1723. pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1724. pmu_wait_complete(&req);
  1725. }
  1726. /* The VIA is supposed not to be restored correctly*/
  1727. save_via_state();
  1728. /* Shut down various ASICs. There's a chance that we can no longer
  1729. * talk to the PMU after this, so I moved it to _after_ sending the
  1730. * sleep command to it. Still need to be checked.
  1731. */
  1732. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
  1733. /* Call low-level ASM sleep handler */
  1734. if (__fake_sleep)
  1735. mdelay(5000);
  1736. else
  1737. low_sleep_handler();
  1738. /* Restore Apple core ASICs state */
  1739. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
  1740. /* Restore VIA */
  1741. restore_via_state();
  1742. /* tweak LPJ before cpufreq is there */
  1743. loops_per_jiffy *= 2;
  1744. /* Restore video */
  1745. pmac_call_early_video_resume();
  1746. /* Restore L2 cache */
  1747. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  1748. _set_L2CR(save_l2cr);
  1749. /* Restore L3 cache */
  1750. if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
  1751. _set_L3CR(save_l3cr);
  1752. /* Restore userland MMU context */
  1753. switch_mmu_context(NULL, current->active_mm, NULL);
  1754. /* Tell PMU we are ready */
  1755. pmu_unlock();
  1756. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  1757. pmu_wait_complete(&req);
  1758. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  1759. pmu_wait_complete(&req);
  1760. /* Restore LPJ, cpufreq will adjust the cpu frequency */
  1761. loops_per_jiffy /= 2;
  1762. return 0;
  1763. }
  1764. #define PB3400_MEM_CTRL 0xf8000000
  1765. #define PB3400_MEM_CTRL_SLEEP 0x70
  1766. static void __iomem *pb3400_mem_ctrl;
  1767. static void powerbook_sleep_init_3400(void)
  1768. {
  1769. /* map in the memory controller registers */
  1770. pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
  1771. if (pb3400_mem_ctrl == NULL)
  1772. printk(KERN_WARNING "ioremap failed: sleep won't be possible");
  1773. }
  1774. static int powerbook_sleep_3400(void)
  1775. {
  1776. int i, x;
  1777. unsigned int hid0;
  1778. unsigned long msr;
  1779. struct adb_request sleep_req;
  1780. unsigned int __iomem *mem_ctrl_sleep;
  1781. if (pb3400_mem_ctrl == NULL)
  1782. return -ENOMEM;
  1783. mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
  1784. /* Set the memory controller to keep the memory refreshed
  1785. while we're asleep */
  1786. for (i = 0x403f; i >= 0x4000; --i) {
  1787. out_be32(mem_ctrl_sleep, i);
  1788. do {
  1789. x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
  1790. } while (x == 0);
  1791. if (x >= 0x100)
  1792. break;
  1793. }
  1794. /* Ask the PMU to put us to sleep */
  1795. pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1796. pmu_wait_complete(&sleep_req);
  1797. pmu_unlock();
  1798. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
  1799. asleep = 1;
  1800. /* Put the CPU into sleep mode */
  1801. hid0 = mfspr(SPRN_HID0);
  1802. hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
  1803. mtspr(SPRN_HID0, hid0);
  1804. local_irq_enable();
  1805. msr = mfmsr() | MSR_POW;
  1806. while (asleep) {
  1807. mb();
  1808. mtmsr(msr);
  1809. isync();
  1810. }
  1811. local_irq_disable();
  1812. /* OK, we're awake again, start restoring things */
  1813. out_be32(mem_ctrl_sleep, 0x3f);
  1814. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
  1815. return 0;
  1816. }
  1817. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  1818. /*
  1819. * Support for /dev/pmu device
  1820. */
  1821. #define RB_SIZE 0x10
  1822. struct pmu_private {
  1823. struct list_head list;
  1824. int rb_get;
  1825. int rb_put;
  1826. struct rb_entry {
  1827. unsigned short len;
  1828. unsigned char data[16];
  1829. } rb_buf[RB_SIZE];
  1830. wait_queue_head_t wait;
  1831. spinlock_t lock;
  1832. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1833. int backlight_locker;
  1834. #endif
  1835. };
  1836. static LIST_HEAD(all_pmu_pvt);
  1837. static DEFINE_SPINLOCK(all_pvt_lock);
  1838. static void
  1839. pmu_pass_intr(unsigned char *data, int len)
  1840. {
  1841. struct pmu_private *pp;
  1842. struct list_head *list;
  1843. int i;
  1844. unsigned long flags;
  1845. if (len > sizeof(pp->rb_buf[0].data))
  1846. len = sizeof(pp->rb_buf[0].data);
  1847. spin_lock_irqsave(&all_pvt_lock, flags);
  1848. for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
  1849. pp = list_entry(list, struct pmu_private, list);
  1850. spin_lock(&pp->lock);
  1851. i = pp->rb_put + 1;
  1852. if (i >= RB_SIZE)
  1853. i = 0;
  1854. if (i != pp->rb_get) {
  1855. struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
  1856. rp->len = len;
  1857. memcpy(rp->data, data, len);
  1858. pp->rb_put = i;
  1859. wake_up_interruptible(&pp->wait);
  1860. }
  1861. spin_unlock(&pp->lock);
  1862. }
  1863. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1864. }
  1865. static int
  1866. pmu_open(struct inode *inode, struct file *file)
  1867. {
  1868. struct pmu_private *pp;
  1869. unsigned long flags;
  1870. pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
  1871. if (!pp)
  1872. return -ENOMEM;
  1873. pp->rb_get = pp->rb_put = 0;
  1874. spin_lock_init(&pp->lock);
  1875. init_waitqueue_head(&pp->wait);
  1876. mutex_lock(&pmu_info_proc_mutex);
  1877. spin_lock_irqsave(&all_pvt_lock, flags);
  1878. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1879. pp->backlight_locker = 0;
  1880. #endif
  1881. list_add(&pp->list, &all_pmu_pvt);
  1882. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1883. file->private_data = pp;
  1884. mutex_unlock(&pmu_info_proc_mutex);
  1885. return 0;
  1886. }
  1887. static ssize_t
  1888. pmu_read(struct file *file, char __user *buf,
  1889. size_t count, loff_t *ppos)
  1890. {
  1891. struct pmu_private *pp = file->private_data;
  1892. DECLARE_WAITQUEUE(wait, current);
  1893. unsigned long flags;
  1894. int ret = 0;
  1895. if (count < 1 || !pp)
  1896. return -EINVAL;
  1897. if (!access_ok(VERIFY_WRITE, buf, count))
  1898. return -EFAULT;
  1899. spin_lock_irqsave(&pp->lock, flags);
  1900. add_wait_queue(&pp->wait, &wait);
  1901. set_current_state(TASK_INTERRUPTIBLE);
  1902. for (;;) {
  1903. ret = -EAGAIN;
  1904. if (pp->rb_get != pp->rb_put) {
  1905. int i = pp->rb_get;
  1906. struct rb_entry *rp = &pp->rb_buf[i];
  1907. ret = rp->len;
  1908. spin_unlock_irqrestore(&pp->lock, flags);
  1909. if (ret > count)
  1910. ret = count;
  1911. if (ret > 0 && copy_to_user(buf, rp->data, ret))
  1912. ret = -EFAULT;
  1913. if (++i >= RB_SIZE)
  1914. i = 0;
  1915. spin_lock_irqsave(&pp->lock, flags);
  1916. pp->rb_get = i;
  1917. }
  1918. if (ret >= 0)
  1919. break;
  1920. if (file->f_flags & O_NONBLOCK)
  1921. break;
  1922. ret = -ERESTARTSYS;
  1923. if (signal_pending(current))
  1924. break;
  1925. spin_unlock_irqrestore(&pp->lock, flags);
  1926. schedule();
  1927. spin_lock_irqsave(&pp->lock, flags);
  1928. }
  1929. __set_current_state(TASK_RUNNING);
  1930. remove_wait_queue(&pp->wait, &wait);
  1931. spin_unlock_irqrestore(&pp->lock, flags);
  1932. return ret;
  1933. }
  1934. static ssize_t
  1935. pmu_write(struct file *file, const char __user *buf,
  1936. size_t count, loff_t *ppos)
  1937. {
  1938. return 0;
  1939. }
  1940. static __poll_t
  1941. pmu_fpoll(struct file *filp, poll_table *wait)
  1942. {
  1943. struct pmu_private *pp = filp->private_data;
  1944. __poll_t mask = 0;
  1945. unsigned long flags;
  1946. if (!pp)
  1947. return 0;
  1948. poll_wait(filp, &pp->wait, wait);
  1949. spin_lock_irqsave(&pp->lock, flags);
  1950. if (pp->rb_get != pp->rb_put)
  1951. mask |= EPOLLIN;
  1952. spin_unlock_irqrestore(&pp->lock, flags);
  1953. return mask;
  1954. }
  1955. static int
  1956. pmu_release(struct inode *inode, struct file *file)
  1957. {
  1958. struct pmu_private *pp = file->private_data;
  1959. unsigned long flags;
  1960. if (pp) {
  1961. file->private_data = NULL;
  1962. spin_lock_irqsave(&all_pvt_lock, flags);
  1963. list_del(&pp->list);
  1964. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1965. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1966. if (pp->backlight_locker)
  1967. pmac_backlight_enable();
  1968. #endif
  1969. kfree(pp);
  1970. }
  1971. return 0;
  1972. }
  1973. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  1974. static void pmac_suspend_disable_irqs(void)
  1975. {
  1976. /* Call platform functions marked "on sleep" */
  1977. pmac_pfunc_i2c_suspend();
  1978. pmac_pfunc_base_suspend();
  1979. }
  1980. static int powerbook_sleep(suspend_state_t state)
  1981. {
  1982. int error = 0;
  1983. /* Wait for completion of async requests */
  1984. while (!batt_req.complete)
  1985. pmu_poll();
  1986. /* Giveup the lazy FPU & vec so we don't have to back them
  1987. * up from the low level code
  1988. */
  1989. enable_kernel_fp();
  1990. #ifdef CONFIG_ALTIVEC
  1991. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  1992. enable_kernel_altivec();
  1993. #endif /* CONFIG_ALTIVEC */
  1994. switch (pmu_kind) {
  1995. case PMU_OHARE_BASED:
  1996. error = powerbook_sleep_3400();
  1997. break;
  1998. case PMU_HEATHROW_BASED:
  1999. case PMU_PADDINGTON_BASED:
  2000. error = powerbook_sleep_grackle();
  2001. break;
  2002. case PMU_KEYLARGO_BASED:
  2003. error = powerbook_sleep_Core99();
  2004. break;
  2005. default:
  2006. return -ENOSYS;
  2007. }
  2008. if (error)
  2009. return error;
  2010. mdelay(100);
  2011. return 0;
  2012. }
  2013. static void pmac_suspend_enable_irqs(void)
  2014. {
  2015. /* Force a poll of ADB interrupts */
  2016. adb_int_pending = 1;
  2017. via_pmu_interrupt(0, NULL);
  2018. mdelay(10);
  2019. /* Call platform functions marked "on wake" */
  2020. pmac_pfunc_base_resume();
  2021. pmac_pfunc_i2c_resume();
  2022. }
  2023. static int pmu_sleep_valid(suspend_state_t state)
  2024. {
  2025. return state == PM_SUSPEND_MEM
  2026. && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
  2027. }
  2028. static const struct platform_suspend_ops pmu_pm_ops = {
  2029. .enter = powerbook_sleep,
  2030. .valid = pmu_sleep_valid,
  2031. };
  2032. static int register_pmu_pm_ops(void)
  2033. {
  2034. if (pmu_kind == PMU_OHARE_BASED)
  2035. powerbook_sleep_init_3400();
  2036. ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs;
  2037. ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs;
  2038. suspend_set_ops(&pmu_pm_ops);
  2039. return 0;
  2040. }
  2041. device_initcall(register_pmu_pm_ops);
  2042. #endif
  2043. static int pmu_ioctl(struct file *filp,
  2044. u_int cmd, u_long arg)
  2045. {
  2046. __u32 __user *argp = (__u32 __user *)arg;
  2047. int error = -EINVAL;
  2048. switch (cmd) {
  2049. #ifdef CONFIG_PPC_PMAC
  2050. case PMU_IOC_SLEEP:
  2051. if (!capable(CAP_SYS_ADMIN))
  2052. return -EACCES;
  2053. return pm_suspend(PM_SUSPEND_MEM);
  2054. case PMU_IOC_CAN_SLEEP:
  2055. if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
  2056. return put_user(0, argp);
  2057. else
  2058. return put_user(1, argp);
  2059. #endif
  2060. #ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
  2061. /* Compatibility ioctl's for backlight */
  2062. case PMU_IOC_GET_BACKLIGHT:
  2063. {
  2064. int brightness;
  2065. brightness = pmac_backlight_get_legacy_brightness();
  2066. if (brightness < 0)
  2067. return brightness;
  2068. else
  2069. return put_user(brightness, argp);
  2070. }
  2071. case PMU_IOC_SET_BACKLIGHT:
  2072. {
  2073. int brightness;
  2074. error = get_user(brightness, argp);
  2075. if (error)
  2076. return error;
  2077. return pmac_backlight_set_legacy_brightness(brightness);
  2078. }
  2079. #ifdef CONFIG_INPUT_ADBHID
  2080. case PMU_IOC_GRAB_BACKLIGHT: {
  2081. struct pmu_private *pp = filp->private_data;
  2082. if (pp->backlight_locker)
  2083. return 0;
  2084. pp->backlight_locker = 1;
  2085. pmac_backlight_disable();
  2086. return 0;
  2087. }
  2088. #endif /* CONFIG_INPUT_ADBHID */
  2089. #endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */
  2090. case PMU_IOC_GET_MODEL:
  2091. return put_user(pmu_kind, argp);
  2092. case PMU_IOC_HAS_ADB:
  2093. return put_user(pmu_has_adb, argp);
  2094. }
  2095. return error;
  2096. }
  2097. static long pmu_unlocked_ioctl(struct file *filp,
  2098. u_int cmd, u_long arg)
  2099. {
  2100. int ret;
  2101. mutex_lock(&pmu_info_proc_mutex);
  2102. ret = pmu_ioctl(filp, cmd, arg);
  2103. mutex_unlock(&pmu_info_proc_mutex);
  2104. return ret;
  2105. }
  2106. #ifdef CONFIG_COMPAT
  2107. #define PMU_IOC_GET_BACKLIGHT32 _IOR('B', 1, compat_size_t)
  2108. #define PMU_IOC_SET_BACKLIGHT32 _IOW('B', 2, compat_size_t)
  2109. #define PMU_IOC_GET_MODEL32 _IOR('B', 3, compat_size_t)
  2110. #define PMU_IOC_HAS_ADB32 _IOR('B', 4, compat_size_t)
  2111. #define PMU_IOC_CAN_SLEEP32 _IOR('B', 5, compat_size_t)
  2112. #define PMU_IOC_GRAB_BACKLIGHT32 _IOR('B', 6, compat_size_t)
  2113. static long compat_pmu_ioctl (struct file *filp, u_int cmd, u_long arg)
  2114. {
  2115. switch (cmd) {
  2116. case PMU_IOC_SLEEP:
  2117. break;
  2118. case PMU_IOC_GET_BACKLIGHT32:
  2119. cmd = PMU_IOC_GET_BACKLIGHT;
  2120. break;
  2121. case PMU_IOC_SET_BACKLIGHT32:
  2122. cmd = PMU_IOC_SET_BACKLIGHT;
  2123. break;
  2124. case PMU_IOC_GET_MODEL32:
  2125. cmd = PMU_IOC_GET_MODEL;
  2126. break;
  2127. case PMU_IOC_HAS_ADB32:
  2128. cmd = PMU_IOC_HAS_ADB;
  2129. break;
  2130. case PMU_IOC_CAN_SLEEP32:
  2131. cmd = PMU_IOC_CAN_SLEEP;
  2132. break;
  2133. case PMU_IOC_GRAB_BACKLIGHT32:
  2134. cmd = PMU_IOC_GRAB_BACKLIGHT;
  2135. break;
  2136. default:
  2137. return -ENOIOCTLCMD;
  2138. }
  2139. return pmu_unlocked_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
  2140. }
  2141. #endif
  2142. static const struct file_operations pmu_device_fops = {
  2143. .read = pmu_read,
  2144. .write = pmu_write,
  2145. .poll = pmu_fpoll,
  2146. .unlocked_ioctl = pmu_unlocked_ioctl,
  2147. #ifdef CONFIG_COMPAT
  2148. .compat_ioctl = compat_pmu_ioctl,
  2149. #endif
  2150. .open = pmu_open,
  2151. .release = pmu_release,
  2152. .llseek = noop_llseek,
  2153. };
  2154. static struct miscdevice pmu_device = {
  2155. PMU_MINOR, "pmu", &pmu_device_fops
  2156. };
  2157. static int pmu_device_init(void)
  2158. {
  2159. if (pmu_state == uninitialized)
  2160. return 0;
  2161. if (misc_register(&pmu_device) < 0)
  2162. printk(KERN_ERR "via-pmu: cannot register misc device.\n");
  2163. return 0;
  2164. }
  2165. device_initcall(pmu_device_init);
  2166. #ifdef DEBUG_SLEEP
  2167. static inline void
  2168. polled_handshake(void)
  2169. {
  2170. via2[B] &= ~TREQ; eieio();
  2171. while ((via2[B] & TACK) != 0)
  2172. ;
  2173. via2[B] |= TREQ; eieio();
  2174. while ((via2[B] & TACK) == 0)
  2175. ;
  2176. }
  2177. static inline void
  2178. polled_send_byte(int x)
  2179. {
  2180. via1[ACR] |= SR_OUT | SR_EXT; eieio();
  2181. via1[SR] = x; eieio();
  2182. polled_handshake();
  2183. }
  2184. static inline int
  2185. polled_recv_byte(void)
  2186. {
  2187. int x;
  2188. via1[ACR] = (via1[ACR] & ~SR_OUT) | SR_EXT; eieio();
  2189. x = via1[SR]; eieio();
  2190. polled_handshake();
  2191. x = via1[SR]; eieio();
  2192. return x;
  2193. }
  2194. int
  2195. pmu_polled_request(struct adb_request *req)
  2196. {
  2197. unsigned long flags;
  2198. int i, l, c;
  2199. req->complete = 1;
  2200. c = req->data[0];
  2201. l = pmu_data_len[c][0];
  2202. if (l >= 0 && req->nbytes != l + 1)
  2203. return -EINVAL;
  2204. local_irq_save(flags);
  2205. while (pmu_state != idle)
  2206. pmu_poll();
  2207. while ((via2[B] & TACK) == 0)
  2208. ;
  2209. polled_send_byte(c);
  2210. if (l < 0) {
  2211. l = req->nbytes - 1;
  2212. polled_send_byte(l);
  2213. }
  2214. for (i = 1; i <= l; ++i)
  2215. polled_send_byte(req->data[i]);
  2216. l = pmu_data_len[c][1];
  2217. if (l < 0)
  2218. l = polled_recv_byte();
  2219. for (i = 0; i < l; ++i)
  2220. req->reply[i + req->reply_len] = polled_recv_byte();
  2221. if (req->done)
  2222. (*req->done)(req);
  2223. local_irq_restore(flags);
  2224. return 0;
  2225. }
  2226. /* N.B. This doesn't work on the 3400 */
  2227. void pmu_blink(int n)
  2228. {
  2229. struct adb_request req;
  2230. memset(&req, 0, sizeof(req));
  2231. for (; n > 0; --n) {
  2232. req.nbytes = 4;
  2233. req.done = NULL;
  2234. req.data[0] = 0xee;
  2235. req.data[1] = 4;
  2236. req.data[2] = 0;
  2237. req.data[3] = 1;
  2238. req.reply[0] = ADB_RET_OK;
  2239. req.reply_len = 1;
  2240. req.reply_expected = 0;
  2241. pmu_polled_request(&req);
  2242. mdelay(50);
  2243. req.nbytes = 4;
  2244. req.done = NULL;
  2245. req.data[0] = 0xee;
  2246. req.data[1] = 4;
  2247. req.data[2] = 0;
  2248. req.data[3] = 0;
  2249. req.reply[0] = ADB_RET_OK;
  2250. req.reply_len = 1;
  2251. req.reply_expected = 0;
  2252. pmu_polled_request(&req);
  2253. mdelay(50);
  2254. }
  2255. mdelay(50);
  2256. }
  2257. #endif /* DEBUG_SLEEP */
  2258. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  2259. int pmu_sys_suspended;
  2260. static int pmu_syscore_suspend(void)
  2261. {
  2262. /* Suspend PMU event interrupts */
  2263. pmu_suspend();
  2264. pmu_sys_suspended = 1;
  2265. #ifdef CONFIG_PMAC_BACKLIGHT
  2266. /* Tell backlight code not to muck around with the chip anymore */
  2267. pmu_backlight_set_sleep(1);
  2268. #endif
  2269. return 0;
  2270. }
  2271. static void pmu_syscore_resume(void)
  2272. {
  2273. struct adb_request req;
  2274. if (!pmu_sys_suspended)
  2275. return;
  2276. /* Tell PMU we are ready */
  2277. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  2278. pmu_wait_complete(&req);
  2279. #ifdef CONFIG_PMAC_BACKLIGHT
  2280. /* Tell backlight code it can use the chip again */
  2281. pmu_backlight_set_sleep(0);
  2282. #endif
  2283. /* Resume PMU event interrupts */
  2284. pmu_resume();
  2285. pmu_sys_suspended = 0;
  2286. }
  2287. static struct syscore_ops pmu_syscore_ops = {
  2288. .suspend = pmu_syscore_suspend,
  2289. .resume = pmu_syscore_resume,
  2290. };
  2291. static int pmu_syscore_register(void)
  2292. {
  2293. register_syscore_ops(&pmu_syscore_ops);
  2294. return 0;
  2295. }
  2296. subsys_initcall(pmu_syscore_register);
  2297. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  2298. EXPORT_SYMBOL(pmu_request);
  2299. EXPORT_SYMBOL(pmu_queue_request);
  2300. EXPORT_SYMBOL(pmu_poll);
  2301. EXPORT_SYMBOL(pmu_poll_adb);
  2302. EXPORT_SYMBOL(pmu_wait_complete);
  2303. EXPORT_SYMBOL(pmu_suspend);
  2304. EXPORT_SYMBOL(pmu_resume);
  2305. EXPORT_SYMBOL(pmu_unlock);
  2306. #if defined(CONFIG_PPC32)
  2307. EXPORT_SYMBOL(pmu_enable_irled);
  2308. EXPORT_SYMBOL(pmu_battery_count);
  2309. EXPORT_SYMBOL(pmu_batteries);
  2310. EXPORT_SYMBOL(pmu_power_flags);
  2311. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */