fimc-lite.c 44 KB

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  1. /*
  2. * Samsung EXYNOS FIMC-LITE (camera host interface) driver
  3. *
  4. * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd.
  5. * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__
  12. #include <linux/bug.h>
  13. #include <linux/clk.h>
  14. #include <linux/device.h>
  15. #include <linux/errno.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/kernel.h>
  18. #include <linux/list.h>
  19. #include <linux/module.h>
  20. #include <linux/of.h>
  21. #include <linux/types.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/pm_runtime.h>
  24. #include <linux/slab.h>
  25. #include <linux/videodev2.h>
  26. #include <media/v4l2-device.h>
  27. #include <media/v4l2-ioctl.h>
  28. #include <media/v4l2-mem2mem.h>
  29. #include <media/videobuf2-v4l2.h>
  30. #include <media/videobuf2-dma-contig.h>
  31. #include <media/drv-intf/exynos-fimc.h>
  32. #include "common.h"
  33. #include "fimc-core.h"
  34. #include "fimc-lite.h"
  35. #include "fimc-lite-reg.h"
  36. static int debug;
  37. module_param(debug, int, 0644);
  38. static const struct fimc_fmt fimc_lite_formats[] = {
  39. {
  40. .name = "YUV 4:2:2 packed, YCbYCr",
  41. .fourcc = V4L2_PIX_FMT_YUYV,
  42. .colorspace = V4L2_COLORSPACE_JPEG,
  43. .depth = { 16 },
  44. .color = FIMC_FMT_YCBYCR422,
  45. .memplanes = 1,
  46. .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
  47. .flags = FMT_FLAGS_YUV,
  48. }, {
  49. .name = "YUV 4:2:2 packed, CbYCrY",
  50. .fourcc = V4L2_PIX_FMT_UYVY,
  51. .colorspace = V4L2_COLORSPACE_JPEG,
  52. .depth = { 16 },
  53. .color = FIMC_FMT_CBYCRY422,
  54. .memplanes = 1,
  55. .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8,
  56. .flags = FMT_FLAGS_YUV,
  57. }, {
  58. .name = "YUV 4:2:2 packed, CrYCbY",
  59. .fourcc = V4L2_PIX_FMT_VYUY,
  60. .colorspace = V4L2_COLORSPACE_JPEG,
  61. .depth = { 16 },
  62. .color = FIMC_FMT_CRYCBY422,
  63. .memplanes = 1,
  64. .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8,
  65. .flags = FMT_FLAGS_YUV,
  66. }, {
  67. .name = "YUV 4:2:2 packed, YCrYCb",
  68. .fourcc = V4L2_PIX_FMT_YVYU,
  69. .colorspace = V4L2_COLORSPACE_JPEG,
  70. .depth = { 16 },
  71. .color = FIMC_FMT_YCRYCB422,
  72. .memplanes = 1,
  73. .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8,
  74. .flags = FMT_FLAGS_YUV,
  75. }, {
  76. .name = "RAW8 (GRBG)",
  77. .fourcc = V4L2_PIX_FMT_SGRBG8,
  78. .colorspace = V4L2_COLORSPACE_SRGB,
  79. .depth = { 8 },
  80. .color = FIMC_FMT_RAW8,
  81. .memplanes = 1,
  82. .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8,
  83. .flags = FMT_FLAGS_RAW_BAYER,
  84. }, {
  85. .name = "RAW10 (GRBG)",
  86. .fourcc = V4L2_PIX_FMT_SGRBG10,
  87. .colorspace = V4L2_COLORSPACE_SRGB,
  88. .depth = { 16 },
  89. .color = FIMC_FMT_RAW10,
  90. .memplanes = 1,
  91. .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10,
  92. .flags = FMT_FLAGS_RAW_BAYER,
  93. }, {
  94. .name = "RAW12 (GRBG)",
  95. .fourcc = V4L2_PIX_FMT_SGRBG12,
  96. .colorspace = V4L2_COLORSPACE_SRGB,
  97. .depth = { 16 },
  98. .color = FIMC_FMT_RAW12,
  99. .memplanes = 1,
  100. .mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12,
  101. .flags = FMT_FLAGS_RAW_BAYER,
  102. },
  103. };
  104. /**
  105. * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code
  106. * @pixelformat: fourcc to match, ignored if null
  107. * @mbus_code: media bus code to match, ignored if null
  108. * @mask: the color format flags to match
  109. * @index: index to the fimc_lite_formats array, ignored if negative
  110. */
  111. static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat,
  112. const u32 *mbus_code, unsigned int mask, int index)
  113. {
  114. const struct fimc_fmt *fmt, *def_fmt = NULL;
  115. unsigned int i;
  116. int id = 0;
  117. if (index >= (int)ARRAY_SIZE(fimc_lite_formats))
  118. return NULL;
  119. for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) {
  120. fmt = &fimc_lite_formats[i];
  121. if (mask && !(fmt->flags & mask))
  122. continue;
  123. if (pixelformat && fmt->fourcc == *pixelformat)
  124. return fmt;
  125. if (mbus_code && fmt->mbus_code == *mbus_code)
  126. return fmt;
  127. if (index == id)
  128. def_fmt = fmt;
  129. id++;
  130. }
  131. return def_fmt;
  132. }
  133. static int fimc_lite_hw_init(struct fimc_lite *fimc, bool isp_output)
  134. {
  135. struct fimc_source_info *si;
  136. unsigned long flags;
  137. if (fimc->sensor == NULL)
  138. return -ENXIO;
  139. if (fimc->inp_frame.fmt == NULL || fimc->out_frame.fmt == NULL)
  140. return -EINVAL;
  141. /* Get sensor configuration data from the sensor subdev */
  142. si = v4l2_get_subdev_hostdata(fimc->sensor);
  143. if (!si)
  144. return -EINVAL;
  145. spin_lock_irqsave(&fimc->slock, flags);
  146. flite_hw_set_camera_bus(fimc, si);
  147. flite_hw_set_source_format(fimc, &fimc->inp_frame);
  148. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  149. flite_hw_set_dma_buf_mask(fimc, 0);
  150. flite_hw_set_output_dma(fimc, &fimc->out_frame, !isp_output);
  151. flite_hw_set_interrupt_mask(fimc);
  152. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  153. if (debug > 0)
  154. flite_hw_dump_regs(fimc, __func__);
  155. spin_unlock_irqrestore(&fimc->slock, flags);
  156. return 0;
  157. }
  158. /*
  159. * Reinitialize the driver so it is ready to start the streaming again.
  160. * Set fimc->state to indicate stream off and the hardware shut down state.
  161. * If not suspending (@suspend is false), return any buffers to videobuf2.
  162. * Otherwise put any owned buffers onto the pending buffers queue, so they
  163. * can be re-spun when the device is being resumed. Also perform FIMC
  164. * software reset and disable streaming on the whole pipeline if required.
  165. */
  166. static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend)
  167. {
  168. struct flite_buffer *buf;
  169. unsigned long flags;
  170. bool streaming;
  171. spin_lock_irqsave(&fimc->slock, flags);
  172. streaming = fimc->state & (1 << ST_SENSOR_STREAM);
  173. fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF |
  174. 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM);
  175. if (suspend)
  176. fimc->state |= (1 << ST_FLITE_SUSPENDED);
  177. else
  178. fimc->state &= ~(1 << ST_FLITE_PENDING |
  179. 1 << ST_FLITE_SUSPENDED);
  180. /* Release unused buffers */
  181. while (!suspend && !list_empty(&fimc->pending_buf_q)) {
  182. buf = fimc_lite_pending_queue_pop(fimc);
  183. vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
  184. }
  185. /* If suspending put unused buffers onto pending queue */
  186. while (!list_empty(&fimc->active_buf_q)) {
  187. buf = fimc_lite_active_queue_pop(fimc);
  188. if (suspend)
  189. fimc_lite_pending_queue_add(fimc, buf);
  190. else
  191. vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
  192. }
  193. spin_unlock_irqrestore(&fimc->slock, flags);
  194. flite_hw_reset(fimc);
  195. if (!streaming)
  196. return 0;
  197. return fimc_pipeline_call(&fimc->ve, set_stream, 0);
  198. }
  199. static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend)
  200. {
  201. unsigned long flags;
  202. if (!fimc_lite_active(fimc))
  203. return 0;
  204. spin_lock_irqsave(&fimc->slock, flags);
  205. set_bit(ST_FLITE_OFF, &fimc->state);
  206. flite_hw_capture_stop(fimc);
  207. spin_unlock_irqrestore(&fimc->slock, flags);
  208. wait_event_timeout(fimc->irq_queue,
  209. !test_bit(ST_FLITE_OFF, &fimc->state),
  210. (2*HZ/10)); /* 200 ms */
  211. return fimc_lite_reinit(fimc, suspend);
  212. }
  213. /* Must be called with fimc.slock spinlock held. */
  214. static void fimc_lite_config_update(struct fimc_lite *fimc)
  215. {
  216. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  217. flite_hw_set_dma_window(fimc, &fimc->out_frame);
  218. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  219. clear_bit(ST_FLITE_CONFIG, &fimc->state);
  220. }
  221. static irqreturn_t flite_irq_handler(int irq, void *priv)
  222. {
  223. struct fimc_lite *fimc = priv;
  224. struct flite_buffer *vbuf;
  225. unsigned long flags;
  226. u32 intsrc;
  227. spin_lock_irqsave(&fimc->slock, flags);
  228. intsrc = flite_hw_get_interrupt_source(fimc);
  229. flite_hw_clear_pending_irq(fimc);
  230. if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) {
  231. wake_up(&fimc->irq_queue);
  232. goto done;
  233. }
  234. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) {
  235. clear_bit(ST_FLITE_RUN, &fimc->state);
  236. fimc->events.data_overflow++;
  237. }
  238. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) {
  239. flite_hw_clear_last_capture_end(fimc);
  240. clear_bit(ST_FLITE_STREAM, &fimc->state);
  241. wake_up(&fimc->irq_queue);
  242. }
  243. if (atomic_read(&fimc->out_path) != FIMC_IO_DMA)
  244. goto done;
  245. if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) &&
  246. test_bit(ST_FLITE_RUN, &fimc->state) &&
  247. !list_empty(&fimc->pending_buf_q)) {
  248. vbuf = fimc_lite_pending_queue_pop(fimc);
  249. flite_hw_set_dma_buffer(fimc, vbuf);
  250. fimc_lite_active_queue_add(fimc, vbuf);
  251. }
  252. if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMEND) &&
  253. test_bit(ST_FLITE_RUN, &fimc->state) &&
  254. !list_empty(&fimc->active_buf_q)) {
  255. vbuf = fimc_lite_active_queue_pop(fimc);
  256. vbuf->vb.vb2_buf.timestamp = ktime_get_ns();
  257. vbuf->vb.sequence = fimc->frame_count++;
  258. flite_hw_mask_dma_buffer(fimc, vbuf->index);
  259. vb2_buffer_done(&vbuf->vb.vb2_buf, VB2_BUF_STATE_DONE);
  260. }
  261. if (test_bit(ST_FLITE_CONFIG, &fimc->state))
  262. fimc_lite_config_update(fimc);
  263. if (list_empty(&fimc->pending_buf_q)) {
  264. flite_hw_capture_stop(fimc);
  265. clear_bit(ST_FLITE_STREAM, &fimc->state);
  266. }
  267. done:
  268. set_bit(ST_FLITE_RUN, &fimc->state);
  269. spin_unlock_irqrestore(&fimc->slock, flags);
  270. return IRQ_HANDLED;
  271. }
  272. static int start_streaming(struct vb2_queue *q, unsigned int count)
  273. {
  274. struct fimc_lite *fimc = q->drv_priv;
  275. unsigned long flags;
  276. int ret;
  277. spin_lock_irqsave(&fimc->slock, flags);
  278. fimc->buf_index = 0;
  279. fimc->frame_count = 0;
  280. spin_unlock_irqrestore(&fimc->slock, flags);
  281. ret = fimc_lite_hw_init(fimc, false);
  282. if (ret) {
  283. fimc_lite_reinit(fimc, false);
  284. return ret;
  285. }
  286. set_bit(ST_FLITE_PENDING, &fimc->state);
  287. if (!list_empty(&fimc->active_buf_q) &&
  288. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  289. flite_hw_capture_start(fimc);
  290. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  291. fimc_pipeline_call(&fimc->ve, set_stream, 1);
  292. }
  293. if (debug > 0)
  294. flite_hw_dump_regs(fimc, __func__);
  295. return 0;
  296. }
  297. static void stop_streaming(struct vb2_queue *q)
  298. {
  299. struct fimc_lite *fimc = q->drv_priv;
  300. if (!fimc_lite_active(fimc))
  301. return;
  302. fimc_lite_stop_capture(fimc, false);
  303. }
  304. static int queue_setup(struct vb2_queue *vq,
  305. unsigned int *num_buffers, unsigned int *num_planes,
  306. unsigned int sizes[], struct device *alloc_devs[])
  307. {
  308. struct fimc_lite *fimc = vq->drv_priv;
  309. struct flite_frame *frame = &fimc->out_frame;
  310. const struct fimc_fmt *fmt = frame->fmt;
  311. unsigned long wh = frame->f_width * frame->f_height;
  312. int i;
  313. if (fmt == NULL)
  314. return -EINVAL;
  315. if (*num_planes) {
  316. if (*num_planes != fmt->memplanes)
  317. return -EINVAL;
  318. for (i = 0; i < *num_planes; i++)
  319. if (sizes[i] < (wh * fmt->depth[i]) / 8)
  320. return -EINVAL;
  321. return 0;
  322. }
  323. *num_planes = fmt->memplanes;
  324. for (i = 0; i < fmt->memplanes; i++)
  325. sizes[i] = (wh * fmt->depth[i]) / 8;
  326. return 0;
  327. }
  328. static int buffer_prepare(struct vb2_buffer *vb)
  329. {
  330. struct vb2_queue *vq = vb->vb2_queue;
  331. struct fimc_lite *fimc = vq->drv_priv;
  332. int i;
  333. if (fimc->out_frame.fmt == NULL)
  334. return -EINVAL;
  335. for (i = 0; i < fimc->out_frame.fmt->memplanes; i++) {
  336. unsigned long size = fimc->payload[i];
  337. if (vb2_plane_size(vb, i) < size) {
  338. v4l2_err(&fimc->ve.vdev,
  339. "User buffer too small (%ld < %ld)\n",
  340. vb2_plane_size(vb, i), size);
  341. return -EINVAL;
  342. }
  343. vb2_set_plane_payload(vb, i, size);
  344. }
  345. return 0;
  346. }
  347. static void buffer_queue(struct vb2_buffer *vb)
  348. {
  349. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  350. struct flite_buffer *buf
  351. = container_of(vbuf, struct flite_buffer, vb);
  352. struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue);
  353. unsigned long flags;
  354. spin_lock_irqsave(&fimc->slock, flags);
  355. buf->paddr = vb2_dma_contig_plane_dma_addr(vb, 0);
  356. buf->index = fimc->buf_index++;
  357. if (fimc->buf_index >= fimc->reqbufs_count)
  358. fimc->buf_index = 0;
  359. if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) &&
  360. !test_bit(ST_FLITE_STREAM, &fimc->state) &&
  361. list_empty(&fimc->active_buf_q)) {
  362. flite_hw_set_dma_buffer(fimc, buf);
  363. fimc_lite_active_queue_add(fimc, buf);
  364. } else {
  365. fimc_lite_pending_queue_add(fimc, buf);
  366. }
  367. if (vb2_is_streaming(&fimc->vb_queue) &&
  368. !list_empty(&fimc->pending_buf_q) &&
  369. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  370. flite_hw_capture_start(fimc);
  371. spin_unlock_irqrestore(&fimc->slock, flags);
  372. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  373. fimc_pipeline_call(&fimc->ve, set_stream, 1);
  374. return;
  375. }
  376. spin_unlock_irqrestore(&fimc->slock, flags);
  377. }
  378. static const struct vb2_ops fimc_lite_qops = {
  379. .queue_setup = queue_setup,
  380. .buf_prepare = buffer_prepare,
  381. .buf_queue = buffer_queue,
  382. .wait_prepare = vb2_ops_wait_prepare,
  383. .wait_finish = vb2_ops_wait_finish,
  384. .start_streaming = start_streaming,
  385. .stop_streaming = stop_streaming,
  386. };
  387. static void fimc_lite_clear_event_counters(struct fimc_lite *fimc)
  388. {
  389. unsigned long flags;
  390. spin_lock_irqsave(&fimc->slock, flags);
  391. memset(&fimc->events, 0, sizeof(fimc->events));
  392. spin_unlock_irqrestore(&fimc->slock, flags);
  393. }
  394. static int fimc_lite_open(struct file *file)
  395. {
  396. struct fimc_lite *fimc = video_drvdata(file);
  397. struct media_entity *me = &fimc->ve.vdev.entity;
  398. int ret;
  399. mutex_lock(&fimc->lock);
  400. if (atomic_read(&fimc->out_path) != FIMC_IO_DMA) {
  401. ret = -EBUSY;
  402. goto unlock;
  403. }
  404. set_bit(ST_FLITE_IN_USE, &fimc->state);
  405. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  406. if (ret < 0)
  407. goto err_pm;
  408. ret = v4l2_fh_open(file);
  409. if (ret < 0)
  410. goto err_pm;
  411. if (!v4l2_fh_is_singular_file(file) ||
  412. atomic_read(&fimc->out_path) != FIMC_IO_DMA)
  413. goto unlock;
  414. mutex_lock(&me->graph_obj.mdev->graph_mutex);
  415. ret = fimc_pipeline_call(&fimc->ve, open, me, true);
  416. /* Mark video pipeline ending at this video node as in use. */
  417. if (ret == 0)
  418. me->use_count++;
  419. mutex_unlock(&me->graph_obj.mdev->graph_mutex);
  420. if (!ret) {
  421. fimc_lite_clear_event_counters(fimc);
  422. goto unlock;
  423. }
  424. v4l2_fh_release(file);
  425. err_pm:
  426. pm_runtime_put_sync(&fimc->pdev->dev);
  427. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  428. unlock:
  429. mutex_unlock(&fimc->lock);
  430. return ret;
  431. }
  432. static int fimc_lite_release(struct file *file)
  433. {
  434. struct fimc_lite *fimc = video_drvdata(file);
  435. struct media_entity *entity = &fimc->ve.vdev.entity;
  436. mutex_lock(&fimc->lock);
  437. if (v4l2_fh_is_singular_file(file) &&
  438. atomic_read(&fimc->out_path) == FIMC_IO_DMA) {
  439. if (fimc->streaming) {
  440. media_pipeline_stop(entity);
  441. fimc->streaming = false;
  442. }
  443. fimc_lite_stop_capture(fimc, false);
  444. fimc_pipeline_call(&fimc->ve, close);
  445. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  446. mutex_lock(&entity->graph_obj.mdev->graph_mutex);
  447. entity->use_count--;
  448. mutex_unlock(&entity->graph_obj.mdev->graph_mutex);
  449. }
  450. _vb2_fop_release(file, NULL);
  451. pm_runtime_put(&fimc->pdev->dev);
  452. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  453. mutex_unlock(&fimc->lock);
  454. return 0;
  455. }
  456. static const struct v4l2_file_operations fimc_lite_fops = {
  457. .owner = THIS_MODULE,
  458. .open = fimc_lite_open,
  459. .release = fimc_lite_release,
  460. .poll = vb2_fop_poll,
  461. .unlocked_ioctl = video_ioctl2,
  462. .mmap = vb2_fop_mmap,
  463. };
  464. /*
  465. * Format and crop negotiation helpers
  466. */
  467. static const struct fimc_fmt *fimc_lite_subdev_try_fmt(struct fimc_lite *fimc,
  468. struct v4l2_subdev_pad_config *cfg,
  469. struct v4l2_subdev_format *format)
  470. {
  471. struct flite_drvdata *dd = fimc->dd;
  472. struct v4l2_mbus_framefmt *mf = &format->format;
  473. const struct fimc_fmt *fmt = NULL;
  474. if (format->pad == FLITE_SD_PAD_SINK) {
  475. v4l_bound_align_image(&mf->width, 8, dd->max_width,
  476. ffs(dd->out_width_align) - 1,
  477. &mf->height, 0, dd->max_height, 0, 0);
  478. fmt = fimc_lite_find_format(NULL, &mf->code, 0, 0);
  479. if (WARN_ON(!fmt))
  480. return NULL;
  481. mf->colorspace = fmt->colorspace;
  482. mf->code = fmt->mbus_code;
  483. } else {
  484. struct flite_frame *sink = &fimc->inp_frame;
  485. struct v4l2_mbus_framefmt *sink_fmt;
  486. struct v4l2_rect *rect;
  487. if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
  488. sink_fmt = v4l2_subdev_get_try_format(&fimc->subdev, cfg,
  489. FLITE_SD_PAD_SINK);
  490. mf->code = sink_fmt->code;
  491. mf->colorspace = sink_fmt->colorspace;
  492. rect = v4l2_subdev_get_try_crop(&fimc->subdev, cfg,
  493. FLITE_SD_PAD_SINK);
  494. } else {
  495. mf->code = sink->fmt->mbus_code;
  496. mf->colorspace = sink->fmt->colorspace;
  497. rect = &sink->rect;
  498. }
  499. /* Allow changing format only on sink pad */
  500. mf->width = rect->width;
  501. mf->height = rect->height;
  502. }
  503. mf->field = V4L2_FIELD_NONE;
  504. v4l2_dbg(1, debug, &fimc->subdev, "code: %#x (%d), %dx%d\n",
  505. mf->code, mf->colorspace, mf->width, mf->height);
  506. return fmt;
  507. }
  508. static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r)
  509. {
  510. struct flite_frame *frame = &fimc->inp_frame;
  511. v4l_bound_align_image(&r->width, 0, frame->f_width, 0,
  512. &r->height, 0, frame->f_height, 0, 0);
  513. /* Adjust left/top if cropping rectangle got out of bounds */
  514. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  515. r->left = round_down(r->left, fimc->dd->win_hor_offs_align);
  516. r->top = clamp_t(u32, r->top, 0, frame->f_height - r->height);
  517. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d\n",
  518. r->left, r->top, r->width, r->height,
  519. frame->f_width, frame->f_height);
  520. }
  521. static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r)
  522. {
  523. struct flite_frame *frame = &fimc->out_frame;
  524. struct v4l2_rect *crop_rect = &fimc->inp_frame.rect;
  525. /* Scaling is not supported so we enforce compose rectangle size
  526. same as size of the sink crop rectangle. */
  527. r->width = crop_rect->width;
  528. r->height = crop_rect->height;
  529. /* Adjust left/top if the composing rectangle got out of bounds */
  530. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  531. r->left = round_down(r->left, fimc->dd->out_hor_offs_align);
  532. r->top = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height);
  533. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, source fmt: %dx%d\n",
  534. r->left, r->top, r->width, r->height,
  535. frame->f_width, frame->f_height);
  536. }
  537. /*
  538. * Video node ioctl operations
  539. */
  540. static int fimc_lite_querycap(struct file *file, void *priv,
  541. struct v4l2_capability *cap)
  542. {
  543. struct fimc_lite *fimc = video_drvdata(file);
  544. strlcpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver));
  545. strlcpy(cap->card, FIMC_LITE_DRV_NAME, sizeof(cap->card));
  546. snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
  547. dev_name(&fimc->pdev->dev));
  548. cap->device_caps = V4L2_CAP_STREAMING;
  549. cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
  550. return 0;
  551. }
  552. static int fimc_lite_enum_fmt_mplane(struct file *file, void *priv,
  553. struct v4l2_fmtdesc *f)
  554. {
  555. const struct fimc_fmt *fmt;
  556. if (f->index >= ARRAY_SIZE(fimc_lite_formats))
  557. return -EINVAL;
  558. fmt = &fimc_lite_formats[f->index];
  559. strlcpy(f->description, fmt->name, sizeof(f->description));
  560. f->pixelformat = fmt->fourcc;
  561. return 0;
  562. }
  563. static int fimc_lite_g_fmt_mplane(struct file *file, void *fh,
  564. struct v4l2_format *f)
  565. {
  566. struct fimc_lite *fimc = video_drvdata(file);
  567. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  568. struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
  569. struct flite_frame *frame = &fimc->out_frame;
  570. const struct fimc_fmt *fmt = frame->fmt;
  571. plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8;
  572. plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height;
  573. pixm->num_planes = fmt->memplanes;
  574. pixm->pixelformat = fmt->fourcc;
  575. pixm->width = frame->f_width;
  576. pixm->height = frame->f_height;
  577. pixm->field = V4L2_FIELD_NONE;
  578. pixm->colorspace = fmt->colorspace;
  579. return 0;
  580. }
  581. static int fimc_lite_try_fmt(struct fimc_lite *fimc,
  582. struct v4l2_pix_format_mplane *pixm,
  583. const struct fimc_fmt **ffmt)
  584. {
  585. u32 bpl = pixm->plane_fmt[0].bytesperline;
  586. struct flite_drvdata *dd = fimc->dd;
  587. const struct fimc_fmt *inp_fmt = fimc->inp_frame.fmt;
  588. const struct fimc_fmt *fmt;
  589. if (WARN_ON(inp_fmt == NULL))
  590. return -EINVAL;
  591. /*
  592. * We allow some flexibility only for YUV formats. In case of raw
  593. * raw Bayer the FIMC-LITE's output format must match its camera
  594. * interface input format.
  595. */
  596. if (inp_fmt->flags & FMT_FLAGS_YUV)
  597. fmt = fimc_lite_find_format(&pixm->pixelformat, NULL,
  598. inp_fmt->flags, 0);
  599. else
  600. fmt = inp_fmt;
  601. if (WARN_ON(fmt == NULL))
  602. return -EINVAL;
  603. if (ffmt)
  604. *ffmt = fmt;
  605. v4l_bound_align_image(&pixm->width, 8, dd->max_width,
  606. ffs(dd->out_width_align) - 1,
  607. &pixm->height, 0, dd->max_height, 0, 0);
  608. if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width))
  609. pixm->plane_fmt[0].bytesperline = (pixm->width *
  610. fmt->depth[0]) / 8;
  611. if (pixm->plane_fmt[0].sizeimage == 0)
  612. pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height *
  613. fmt->depth[0]) / 8;
  614. pixm->num_planes = fmt->memplanes;
  615. pixm->pixelformat = fmt->fourcc;
  616. pixm->colorspace = fmt->colorspace;
  617. pixm->field = V4L2_FIELD_NONE;
  618. return 0;
  619. }
  620. static int fimc_lite_try_fmt_mplane(struct file *file, void *fh,
  621. struct v4l2_format *f)
  622. {
  623. struct fimc_lite *fimc = video_drvdata(file);
  624. return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL);
  625. }
  626. static int fimc_lite_s_fmt_mplane(struct file *file, void *priv,
  627. struct v4l2_format *f)
  628. {
  629. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  630. struct fimc_lite *fimc = video_drvdata(file);
  631. struct flite_frame *frame = &fimc->out_frame;
  632. const struct fimc_fmt *fmt = NULL;
  633. int ret;
  634. if (vb2_is_busy(&fimc->vb_queue))
  635. return -EBUSY;
  636. ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt);
  637. if (ret < 0)
  638. return ret;
  639. frame->fmt = fmt;
  640. fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8,
  641. pixm->plane_fmt[0].sizeimage);
  642. frame->f_width = pixm->width;
  643. frame->f_height = pixm->height;
  644. return 0;
  645. }
  646. static int fimc_pipeline_validate(struct fimc_lite *fimc)
  647. {
  648. struct v4l2_subdev *sd = &fimc->subdev;
  649. struct v4l2_subdev_format sink_fmt, src_fmt;
  650. struct media_pad *pad;
  651. int ret;
  652. while (1) {
  653. /* Retrieve format at the sink pad */
  654. pad = &sd->entity.pads[0];
  655. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  656. break;
  657. /* Don't call FIMC subdev operation to avoid nested locking */
  658. if (sd == &fimc->subdev) {
  659. struct flite_frame *ff = &fimc->out_frame;
  660. sink_fmt.format.width = ff->f_width;
  661. sink_fmt.format.height = ff->f_height;
  662. sink_fmt.format.code = fimc->inp_frame.fmt->mbus_code;
  663. } else {
  664. sink_fmt.pad = pad->index;
  665. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  666. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL,
  667. &sink_fmt);
  668. if (ret < 0 && ret != -ENOIOCTLCMD)
  669. return -EPIPE;
  670. }
  671. /* Retrieve format at the source pad */
  672. pad = media_entity_remote_pad(pad);
  673. if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
  674. break;
  675. sd = media_entity_to_v4l2_subdev(pad->entity);
  676. src_fmt.pad = pad->index;
  677. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  678. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  679. if (ret < 0 && ret != -ENOIOCTLCMD)
  680. return -EPIPE;
  681. if (src_fmt.format.width != sink_fmt.format.width ||
  682. src_fmt.format.height != sink_fmt.format.height ||
  683. src_fmt.format.code != sink_fmt.format.code)
  684. return -EPIPE;
  685. }
  686. return 0;
  687. }
  688. static int fimc_lite_streamon(struct file *file, void *priv,
  689. enum v4l2_buf_type type)
  690. {
  691. struct fimc_lite *fimc = video_drvdata(file);
  692. struct media_entity *entity = &fimc->ve.vdev.entity;
  693. int ret;
  694. if (fimc_lite_active(fimc))
  695. return -EBUSY;
  696. ret = media_pipeline_start(entity, &fimc->ve.pipe->mp);
  697. if (ret < 0)
  698. return ret;
  699. ret = fimc_pipeline_validate(fimc);
  700. if (ret < 0)
  701. goto err_p_stop;
  702. fimc->sensor = fimc_find_remote_sensor(&fimc->subdev.entity);
  703. ret = vb2_ioctl_streamon(file, priv, type);
  704. if (!ret) {
  705. fimc->streaming = true;
  706. return ret;
  707. }
  708. err_p_stop:
  709. media_pipeline_stop(entity);
  710. return 0;
  711. }
  712. static int fimc_lite_streamoff(struct file *file, void *priv,
  713. enum v4l2_buf_type type)
  714. {
  715. struct fimc_lite *fimc = video_drvdata(file);
  716. int ret;
  717. ret = vb2_ioctl_streamoff(file, priv, type);
  718. if (ret < 0)
  719. return ret;
  720. media_pipeline_stop(&fimc->ve.vdev.entity);
  721. fimc->streaming = false;
  722. return 0;
  723. }
  724. static int fimc_lite_reqbufs(struct file *file, void *priv,
  725. struct v4l2_requestbuffers *reqbufs)
  726. {
  727. struct fimc_lite *fimc = video_drvdata(file);
  728. int ret;
  729. reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count);
  730. ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
  731. if (!ret)
  732. fimc->reqbufs_count = reqbufs->count;
  733. return ret;
  734. }
  735. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  736. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  737. {
  738. if (a->left < b->left || a->top < b->top)
  739. return 0;
  740. if (a->left + a->width > b->left + b->width)
  741. return 0;
  742. if (a->top + a->height > b->top + b->height)
  743. return 0;
  744. return 1;
  745. }
  746. static int fimc_lite_g_selection(struct file *file, void *fh,
  747. struct v4l2_selection *sel)
  748. {
  749. struct fimc_lite *fimc = video_drvdata(file);
  750. struct flite_frame *f = &fimc->out_frame;
  751. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  752. return -EINVAL;
  753. switch (sel->target) {
  754. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  755. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  756. sel->r.left = 0;
  757. sel->r.top = 0;
  758. sel->r.width = f->f_width;
  759. sel->r.height = f->f_height;
  760. return 0;
  761. case V4L2_SEL_TGT_COMPOSE:
  762. sel->r = f->rect;
  763. return 0;
  764. }
  765. return -EINVAL;
  766. }
  767. static int fimc_lite_s_selection(struct file *file, void *fh,
  768. struct v4l2_selection *sel)
  769. {
  770. struct fimc_lite *fimc = video_drvdata(file);
  771. struct flite_frame *f = &fimc->out_frame;
  772. struct v4l2_rect rect = sel->r;
  773. unsigned long flags;
  774. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||
  775. sel->target != V4L2_SEL_TGT_COMPOSE)
  776. return -EINVAL;
  777. fimc_lite_try_compose(fimc, &rect);
  778. if ((sel->flags & V4L2_SEL_FLAG_LE) &&
  779. !enclosed_rectangle(&rect, &sel->r))
  780. return -ERANGE;
  781. if ((sel->flags & V4L2_SEL_FLAG_GE) &&
  782. !enclosed_rectangle(&sel->r, &rect))
  783. return -ERANGE;
  784. sel->r = rect;
  785. spin_lock_irqsave(&fimc->slock, flags);
  786. f->rect = rect;
  787. set_bit(ST_FLITE_CONFIG, &fimc->state);
  788. spin_unlock_irqrestore(&fimc->slock, flags);
  789. return 0;
  790. }
  791. static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = {
  792. .vidioc_querycap = fimc_lite_querycap,
  793. .vidioc_enum_fmt_vid_cap_mplane = fimc_lite_enum_fmt_mplane,
  794. .vidioc_try_fmt_vid_cap_mplane = fimc_lite_try_fmt_mplane,
  795. .vidioc_s_fmt_vid_cap_mplane = fimc_lite_s_fmt_mplane,
  796. .vidioc_g_fmt_vid_cap_mplane = fimc_lite_g_fmt_mplane,
  797. .vidioc_g_selection = fimc_lite_g_selection,
  798. .vidioc_s_selection = fimc_lite_s_selection,
  799. .vidioc_reqbufs = fimc_lite_reqbufs,
  800. .vidioc_querybuf = vb2_ioctl_querybuf,
  801. .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
  802. .vidioc_create_bufs = vb2_ioctl_create_bufs,
  803. .vidioc_qbuf = vb2_ioctl_qbuf,
  804. .vidioc_dqbuf = vb2_ioctl_dqbuf,
  805. .vidioc_streamon = fimc_lite_streamon,
  806. .vidioc_streamoff = fimc_lite_streamoff,
  807. };
  808. /* Capture subdev media entity operations */
  809. static int fimc_lite_link_setup(struct media_entity *entity,
  810. const struct media_pad *local,
  811. const struct media_pad *remote, u32 flags)
  812. {
  813. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  814. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  815. int ret = 0;
  816. if (WARN_ON(fimc == NULL))
  817. return 0;
  818. v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x\n",
  819. __func__, remote->entity->name, local->entity->name,
  820. flags, fimc->source_subdev_grp_id);
  821. switch (local->index) {
  822. case FLITE_SD_PAD_SINK:
  823. if (flags & MEDIA_LNK_FL_ENABLED) {
  824. if (fimc->source_subdev_grp_id == 0)
  825. fimc->source_subdev_grp_id = sd->grp_id;
  826. else
  827. ret = -EBUSY;
  828. } else {
  829. fimc->source_subdev_grp_id = 0;
  830. fimc->sensor = NULL;
  831. }
  832. break;
  833. case FLITE_SD_PAD_SOURCE_DMA:
  834. if (!(flags & MEDIA_LNK_FL_ENABLED))
  835. atomic_set(&fimc->out_path, FIMC_IO_NONE);
  836. else
  837. atomic_set(&fimc->out_path, FIMC_IO_DMA);
  838. break;
  839. case FLITE_SD_PAD_SOURCE_ISP:
  840. if (!(flags & MEDIA_LNK_FL_ENABLED))
  841. atomic_set(&fimc->out_path, FIMC_IO_NONE);
  842. else
  843. atomic_set(&fimc->out_path, FIMC_IO_ISP);
  844. break;
  845. default:
  846. v4l2_err(sd, "Invalid pad index\n");
  847. ret = -EINVAL;
  848. }
  849. mb();
  850. return ret;
  851. }
  852. static const struct media_entity_operations fimc_lite_subdev_media_ops = {
  853. .link_setup = fimc_lite_link_setup,
  854. };
  855. static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  856. struct v4l2_subdev_pad_config *cfg,
  857. struct v4l2_subdev_mbus_code_enum *code)
  858. {
  859. const struct fimc_fmt *fmt;
  860. fmt = fimc_lite_find_format(NULL, NULL, 0, code->index);
  861. if (!fmt)
  862. return -EINVAL;
  863. code->code = fmt->mbus_code;
  864. return 0;
  865. }
  866. static struct v4l2_mbus_framefmt *__fimc_lite_subdev_get_try_fmt(
  867. struct v4l2_subdev *sd,
  868. struct v4l2_subdev_pad_config *cfg, unsigned int pad)
  869. {
  870. if (pad != FLITE_SD_PAD_SINK)
  871. pad = FLITE_SD_PAD_SOURCE_DMA;
  872. return v4l2_subdev_get_try_format(sd, cfg, pad);
  873. }
  874. static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd,
  875. struct v4l2_subdev_pad_config *cfg,
  876. struct v4l2_subdev_format *fmt)
  877. {
  878. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  879. struct v4l2_mbus_framefmt *mf = &fmt->format;
  880. struct flite_frame *f = &fimc->inp_frame;
  881. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  882. mf = __fimc_lite_subdev_get_try_fmt(sd, cfg, fmt->pad);
  883. fmt->format = *mf;
  884. return 0;
  885. }
  886. mutex_lock(&fimc->lock);
  887. mf->colorspace = f->fmt->colorspace;
  888. mf->code = f->fmt->mbus_code;
  889. if (fmt->pad == FLITE_SD_PAD_SINK) {
  890. /* full camera input frame size */
  891. mf->width = f->f_width;
  892. mf->height = f->f_height;
  893. } else {
  894. /* crop size */
  895. mf->width = f->rect.width;
  896. mf->height = f->rect.height;
  897. }
  898. mutex_unlock(&fimc->lock);
  899. return 0;
  900. }
  901. static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd,
  902. struct v4l2_subdev_pad_config *cfg,
  903. struct v4l2_subdev_format *fmt)
  904. {
  905. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  906. struct v4l2_mbus_framefmt *mf = &fmt->format;
  907. struct flite_frame *sink = &fimc->inp_frame;
  908. struct flite_frame *source = &fimc->out_frame;
  909. const struct fimc_fmt *ffmt;
  910. v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d\n",
  911. fmt->pad, mf->code, mf->width, mf->height);
  912. mutex_lock(&fimc->lock);
  913. if ((atomic_read(&fimc->out_path) == FIMC_IO_ISP &&
  914. sd->entity.stream_count > 0) ||
  915. (atomic_read(&fimc->out_path) == FIMC_IO_DMA &&
  916. vb2_is_busy(&fimc->vb_queue))) {
  917. mutex_unlock(&fimc->lock);
  918. return -EBUSY;
  919. }
  920. ffmt = fimc_lite_subdev_try_fmt(fimc, cfg, fmt);
  921. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  922. struct v4l2_mbus_framefmt *src_fmt;
  923. mf = __fimc_lite_subdev_get_try_fmt(sd, cfg, fmt->pad);
  924. *mf = fmt->format;
  925. if (fmt->pad == FLITE_SD_PAD_SINK) {
  926. unsigned int pad = FLITE_SD_PAD_SOURCE_DMA;
  927. src_fmt = __fimc_lite_subdev_get_try_fmt(sd, cfg, pad);
  928. *src_fmt = *mf;
  929. }
  930. mutex_unlock(&fimc->lock);
  931. return 0;
  932. }
  933. if (fmt->pad == FLITE_SD_PAD_SINK) {
  934. sink->f_width = mf->width;
  935. sink->f_height = mf->height;
  936. sink->fmt = ffmt;
  937. /* Set sink crop rectangle */
  938. sink->rect.width = mf->width;
  939. sink->rect.height = mf->height;
  940. sink->rect.left = 0;
  941. sink->rect.top = 0;
  942. /* Reset source format and crop rectangle */
  943. source->rect = sink->rect;
  944. source->f_width = mf->width;
  945. source->f_height = mf->height;
  946. }
  947. mutex_unlock(&fimc->lock);
  948. return 0;
  949. }
  950. static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd,
  951. struct v4l2_subdev_pad_config *cfg,
  952. struct v4l2_subdev_selection *sel)
  953. {
  954. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  955. struct flite_frame *f = &fimc->inp_frame;
  956. if ((sel->target != V4L2_SEL_TGT_CROP &&
  957. sel->target != V4L2_SEL_TGT_CROP_BOUNDS) ||
  958. sel->pad != FLITE_SD_PAD_SINK)
  959. return -EINVAL;
  960. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  961. sel->r = *v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
  962. return 0;
  963. }
  964. mutex_lock(&fimc->lock);
  965. if (sel->target == V4L2_SEL_TGT_CROP) {
  966. sel->r = f->rect;
  967. } else {
  968. sel->r.left = 0;
  969. sel->r.top = 0;
  970. sel->r.width = f->f_width;
  971. sel->r.height = f->f_height;
  972. }
  973. mutex_unlock(&fimc->lock);
  974. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
  975. __func__, f->rect.left, f->rect.top, f->rect.width,
  976. f->rect.height, f->f_width, f->f_height);
  977. return 0;
  978. }
  979. static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd,
  980. struct v4l2_subdev_pad_config *cfg,
  981. struct v4l2_subdev_selection *sel)
  982. {
  983. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  984. struct flite_frame *f = &fimc->inp_frame;
  985. int ret = 0;
  986. if (sel->target != V4L2_SEL_TGT_CROP || sel->pad != FLITE_SD_PAD_SINK)
  987. return -EINVAL;
  988. mutex_lock(&fimc->lock);
  989. fimc_lite_try_crop(fimc, &sel->r);
  990. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  991. *v4l2_subdev_get_try_crop(sd, cfg, sel->pad) = sel->r;
  992. } else {
  993. unsigned long flags;
  994. spin_lock_irqsave(&fimc->slock, flags);
  995. f->rect = sel->r;
  996. /* Same crop rectangle on the source pad */
  997. fimc->out_frame.rect = sel->r;
  998. set_bit(ST_FLITE_CONFIG, &fimc->state);
  999. spin_unlock_irqrestore(&fimc->slock, flags);
  1000. }
  1001. mutex_unlock(&fimc->lock);
  1002. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
  1003. __func__, f->rect.left, f->rect.top, f->rect.width,
  1004. f->rect.height, f->f_width, f->f_height);
  1005. return ret;
  1006. }
  1007. static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on)
  1008. {
  1009. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1010. unsigned long flags;
  1011. int ret;
  1012. /*
  1013. * Find sensor subdev linked to FIMC-LITE directly or through
  1014. * MIPI-CSIS. This is required for configuration where FIMC-LITE
  1015. * is used as a subdev only and feeds data internally to FIMC-IS.
  1016. * The pipeline links are protected through entity.stream_count
  1017. * so there is no need to take the media graph mutex here.
  1018. */
  1019. fimc->sensor = fimc_find_remote_sensor(&sd->entity);
  1020. if (atomic_read(&fimc->out_path) != FIMC_IO_ISP)
  1021. return -ENOIOCTLCMD;
  1022. mutex_lock(&fimc->lock);
  1023. if (on) {
  1024. flite_hw_reset(fimc);
  1025. ret = fimc_lite_hw_init(fimc, true);
  1026. if (!ret) {
  1027. spin_lock_irqsave(&fimc->slock, flags);
  1028. flite_hw_capture_start(fimc);
  1029. spin_unlock_irqrestore(&fimc->slock, flags);
  1030. }
  1031. } else {
  1032. set_bit(ST_FLITE_OFF, &fimc->state);
  1033. spin_lock_irqsave(&fimc->slock, flags);
  1034. flite_hw_capture_stop(fimc);
  1035. spin_unlock_irqrestore(&fimc->slock, flags);
  1036. ret = wait_event_timeout(fimc->irq_queue,
  1037. !test_bit(ST_FLITE_OFF, &fimc->state),
  1038. msecs_to_jiffies(200));
  1039. if (ret == 0)
  1040. v4l2_err(sd, "s_stream(0) timeout\n");
  1041. clear_bit(ST_FLITE_RUN, &fimc->state);
  1042. }
  1043. mutex_unlock(&fimc->lock);
  1044. return ret;
  1045. }
  1046. static int fimc_lite_log_status(struct v4l2_subdev *sd)
  1047. {
  1048. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1049. flite_hw_dump_regs(fimc, __func__);
  1050. return 0;
  1051. }
  1052. static int fimc_lite_subdev_registered(struct v4l2_subdev *sd)
  1053. {
  1054. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1055. struct vb2_queue *q = &fimc->vb_queue;
  1056. struct video_device *vfd = &fimc->ve.vdev;
  1057. int ret;
  1058. memset(vfd, 0, sizeof(*vfd));
  1059. atomic_set(&fimc->out_path, FIMC_IO_DMA);
  1060. snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture",
  1061. fimc->index);
  1062. vfd->fops = &fimc_lite_fops;
  1063. vfd->ioctl_ops = &fimc_lite_ioctl_ops;
  1064. vfd->v4l2_dev = sd->v4l2_dev;
  1065. vfd->minor = -1;
  1066. vfd->release = video_device_release_empty;
  1067. vfd->queue = q;
  1068. fimc->reqbufs_count = 0;
  1069. INIT_LIST_HEAD(&fimc->pending_buf_q);
  1070. INIT_LIST_HEAD(&fimc->active_buf_q);
  1071. memset(q, 0, sizeof(*q));
  1072. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1073. q->io_modes = VB2_MMAP | VB2_USERPTR;
  1074. q->ops = &fimc_lite_qops;
  1075. q->mem_ops = &vb2_dma_contig_memops;
  1076. q->buf_struct_size = sizeof(struct flite_buffer);
  1077. q->drv_priv = fimc;
  1078. q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1079. q->lock = &fimc->lock;
  1080. q->dev = &fimc->pdev->dev;
  1081. ret = vb2_queue_init(q);
  1082. if (ret < 0)
  1083. return ret;
  1084. fimc->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1085. ret = media_entity_pads_init(&vfd->entity, 1, &fimc->vd_pad);
  1086. if (ret < 0)
  1087. return ret;
  1088. video_set_drvdata(vfd, fimc);
  1089. fimc->ve.pipe = v4l2_get_subdev_hostdata(sd);
  1090. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1091. if (ret < 0) {
  1092. media_entity_cleanup(&vfd->entity);
  1093. fimc->ve.pipe = NULL;
  1094. return ret;
  1095. }
  1096. v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
  1097. vfd->name, video_device_node_name(vfd));
  1098. return 0;
  1099. }
  1100. static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd)
  1101. {
  1102. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1103. if (fimc == NULL)
  1104. return;
  1105. mutex_lock(&fimc->lock);
  1106. if (video_is_registered(&fimc->ve.vdev)) {
  1107. video_unregister_device(&fimc->ve.vdev);
  1108. media_entity_cleanup(&fimc->ve.vdev.entity);
  1109. fimc->ve.pipe = NULL;
  1110. }
  1111. mutex_unlock(&fimc->lock);
  1112. }
  1113. static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = {
  1114. .registered = fimc_lite_subdev_registered,
  1115. .unregistered = fimc_lite_subdev_unregistered,
  1116. };
  1117. static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = {
  1118. .enum_mbus_code = fimc_lite_subdev_enum_mbus_code,
  1119. .get_selection = fimc_lite_subdev_get_selection,
  1120. .set_selection = fimc_lite_subdev_set_selection,
  1121. .get_fmt = fimc_lite_subdev_get_fmt,
  1122. .set_fmt = fimc_lite_subdev_set_fmt,
  1123. };
  1124. static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = {
  1125. .s_stream = fimc_lite_subdev_s_stream,
  1126. };
  1127. static const struct v4l2_subdev_core_ops fimc_lite_core_ops = {
  1128. .log_status = fimc_lite_log_status,
  1129. };
  1130. static const struct v4l2_subdev_ops fimc_lite_subdev_ops = {
  1131. .core = &fimc_lite_core_ops,
  1132. .video = &fimc_lite_subdev_video_ops,
  1133. .pad = &fimc_lite_subdev_pad_ops,
  1134. };
  1135. static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl)
  1136. {
  1137. struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite,
  1138. ctrl_handler);
  1139. set_bit(ST_FLITE_CONFIG, &fimc->state);
  1140. return 0;
  1141. }
  1142. static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = {
  1143. .s_ctrl = fimc_lite_s_ctrl,
  1144. };
  1145. static const struct v4l2_ctrl_config fimc_lite_ctrl = {
  1146. .ops = &fimc_lite_ctrl_ops,
  1147. .id = V4L2_CTRL_CLASS_USER | 0x1001,
  1148. .type = V4L2_CTRL_TYPE_BOOLEAN,
  1149. .name = "Test Pattern 640x480",
  1150. .step = 1,
  1151. };
  1152. static void fimc_lite_set_default_config(struct fimc_lite *fimc)
  1153. {
  1154. struct flite_frame *sink = &fimc->inp_frame;
  1155. struct flite_frame *source = &fimc->out_frame;
  1156. sink->fmt = &fimc_lite_formats[0];
  1157. sink->f_width = FLITE_DEFAULT_WIDTH;
  1158. sink->f_height = FLITE_DEFAULT_HEIGHT;
  1159. sink->rect.width = FLITE_DEFAULT_WIDTH;
  1160. sink->rect.height = FLITE_DEFAULT_HEIGHT;
  1161. sink->rect.left = 0;
  1162. sink->rect.top = 0;
  1163. *source = *sink;
  1164. }
  1165. static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc)
  1166. {
  1167. struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler;
  1168. struct v4l2_subdev *sd = &fimc->subdev;
  1169. int ret;
  1170. v4l2_subdev_init(sd, &fimc_lite_subdev_ops);
  1171. sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  1172. snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index);
  1173. fimc->subdev_pads[FLITE_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
  1174. fimc->subdev_pads[FLITE_SD_PAD_SOURCE_DMA].flags = MEDIA_PAD_FL_SOURCE;
  1175. fimc->subdev_pads[FLITE_SD_PAD_SOURCE_ISP].flags = MEDIA_PAD_FL_SOURCE;
  1176. ret = media_entity_pads_init(&sd->entity, FLITE_SD_PADS_NUM,
  1177. fimc->subdev_pads);
  1178. if (ret)
  1179. return ret;
  1180. v4l2_ctrl_handler_init(handler, 1);
  1181. fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl,
  1182. NULL);
  1183. if (handler->error) {
  1184. media_entity_cleanup(&sd->entity);
  1185. return handler->error;
  1186. }
  1187. sd->ctrl_handler = handler;
  1188. sd->internal_ops = &fimc_lite_subdev_internal_ops;
  1189. sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_SCALER;
  1190. sd->entity.ops = &fimc_lite_subdev_media_ops;
  1191. sd->owner = THIS_MODULE;
  1192. v4l2_set_subdevdata(sd, fimc);
  1193. return 0;
  1194. }
  1195. static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc)
  1196. {
  1197. struct v4l2_subdev *sd = &fimc->subdev;
  1198. v4l2_device_unregister_subdev(sd);
  1199. media_entity_cleanup(&sd->entity);
  1200. v4l2_ctrl_handler_free(&fimc->ctrl_handler);
  1201. v4l2_set_subdevdata(sd, NULL);
  1202. }
  1203. static void fimc_lite_clk_put(struct fimc_lite *fimc)
  1204. {
  1205. if (IS_ERR(fimc->clock))
  1206. return;
  1207. clk_put(fimc->clock);
  1208. fimc->clock = ERR_PTR(-EINVAL);
  1209. }
  1210. static int fimc_lite_clk_get(struct fimc_lite *fimc)
  1211. {
  1212. fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME);
  1213. return PTR_ERR_OR_ZERO(fimc->clock);
  1214. }
  1215. static const struct of_device_id flite_of_match[];
  1216. static int fimc_lite_probe(struct platform_device *pdev)
  1217. {
  1218. struct flite_drvdata *drv_data = NULL;
  1219. struct device *dev = &pdev->dev;
  1220. const struct of_device_id *of_id;
  1221. struct fimc_lite *fimc;
  1222. struct resource *res;
  1223. int ret;
  1224. if (!dev->of_node)
  1225. return -ENODEV;
  1226. fimc = devm_kzalloc(dev, sizeof(*fimc), GFP_KERNEL);
  1227. if (!fimc)
  1228. return -ENOMEM;
  1229. of_id = of_match_node(flite_of_match, dev->of_node);
  1230. if (of_id)
  1231. drv_data = (struct flite_drvdata *)of_id->data;
  1232. fimc->index = of_alias_get_id(dev->of_node, "fimc-lite");
  1233. if (!drv_data || fimc->index >= drv_data->num_instances ||
  1234. fimc->index < 0) {
  1235. dev_err(dev, "Wrong %pOF node alias\n", dev->of_node);
  1236. return -EINVAL;
  1237. }
  1238. fimc->dd = drv_data;
  1239. fimc->pdev = pdev;
  1240. init_waitqueue_head(&fimc->irq_queue);
  1241. spin_lock_init(&fimc->slock);
  1242. mutex_init(&fimc->lock);
  1243. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1244. fimc->regs = devm_ioremap_resource(dev, res);
  1245. if (IS_ERR(fimc->regs))
  1246. return PTR_ERR(fimc->regs);
  1247. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  1248. if (res == NULL) {
  1249. dev_err(dev, "Failed to get IRQ resource\n");
  1250. return -ENXIO;
  1251. }
  1252. ret = fimc_lite_clk_get(fimc);
  1253. if (ret)
  1254. return ret;
  1255. ret = devm_request_irq(dev, res->start, flite_irq_handler,
  1256. 0, dev_name(dev), fimc);
  1257. if (ret) {
  1258. dev_err(dev, "Failed to install irq (%d)\n", ret);
  1259. goto err_clk_put;
  1260. }
  1261. /* The video node will be created within the subdev's registered() op */
  1262. ret = fimc_lite_create_capture_subdev(fimc);
  1263. if (ret)
  1264. goto err_clk_put;
  1265. platform_set_drvdata(pdev, fimc);
  1266. pm_runtime_enable(dev);
  1267. if (!pm_runtime_enabled(dev)) {
  1268. ret = clk_prepare_enable(fimc->clock);
  1269. if (ret < 0)
  1270. goto err_sd;
  1271. }
  1272. vb2_dma_contig_set_max_seg_size(dev, DMA_BIT_MASK(32));
  1273. fimc_lite_set_default_config(fimc);
  1274. dev_dbg(dev, "FIMC-LITE.%d registered successfully\n",
  1275. fimc->index);
  1276. return 0;
  1277. err_sd:
  1278. fimc_lite_unregister_capture_subdev(fimc);
  1279. err_clk_put:
  1280. fimc_lite_clk_put(fimc);
  1281. return ret;
  1282. }
  1283. #ifdef CONFIG_PM
  1284. static int fimc_lite_runtime_resume(struct device *dev)
  1285. {
  1286. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1287. clk_prepare_enable(fimc->clock);
  1288. return 0;
  1289. }
  1290. static int fimc_lite_runtime_suspend(struct device *dev)
  1291. {
  1292. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1293. clk_disable_unprepare(fimc->clock);
  1294. return 0;
  1295. }
  1296. #endif
  1297. #ifdef CONFIG_PM_SLEEP
  1298. static int fimc_lite_resume(struct device *dev)
  1299. {
  1300. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1301. struct flite_buffer *buf;
  1302. unsigned long flags;
  1303. int i;
  1304. spin_lock_irqsave(&fimc->slock, flags);
  1305. if (!test_and_clear_bit(ST_LPM, &fimc->state) ||
  1306. !test_bit(ST_FLITE_IN_USE, &fimc->state)) {
  1307. spin_unlock_irqrestore(&fimc->slock, flags);
  1308. return 0;
  1309. }
  1310. flite_hw_reset(fimc);
  1311. spin_unlock_irqrestore(&fimc->slock, flags);
  1312. if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state))
  1313. return 0;
  1314. INIT_LIST_HEAD(&fimc->active_buf_q);
  1315. fimc_pipeline_call(&fimc->ve, open,
  1316. &fimc->ve.vdev.entity, false);
  1317. fimc_lite_hw_init(fimc, atomic_read(&fimc->out_path) == FIMC_IO_ISP);
  1318. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  1319. for (i = 0; i < fimc->reqbufs_count; i++) {
  1320. if (list_empty(&fimc->pending_buf_q))
  1321. break;
  1322. buf = fimc_lite_pending_queue_pop(fimc);
  1323. buffer_queue(&buf->vb.vb2_buf);
  1324. }
  1325. return 0;
  1326. }
  1327. static int fimc_lite_suspend(struct device *dev)
  1328. {
  1329. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1330. bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state);
  1331. int ret;
  1332. if (test_and_set_bit(ST_LPM, &fimc->state))
  1333. return 0;
  1334. ret = fimc_lite_stop_capture(fimc, suspend);
  1335. if (ret < 0 || !fimc_lite_active(fimc))
  1336. return ret;
  1337. return fimc_pipeline_call(&fimc->ve, close);
  1338. }
  1339. #endif /* CONFIG_PM_SLEEP */
  1340. static int fimc_lite_remove(struct platform_device *pdev)
  1341. {
  1342. struct fimc_lite *fimc = platform_get_drvdata(pdev);
  1343. struct device *dev = &pdev->dev;
  1344. pm_runtime_disable(dev);
  1345. pm_runtime_set_suspended(dev);
  1346. fimc_lite_unregister_capture_subdev(fimc);
  1347. vb2_dma_contig_clear_max_seg_size(dev);
  1348. fimc_lite_clk_put(fimc);
  1349. dev_info(dev, "Driver unloaded\n");
  1350. return 0;
  1351. }
  1352. static const struct dev_pm_ops fimc_lite_pm_ops = {
  1353. SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume)
  1354. SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume,
  1355. NULL)
  1356. };
  1357. /* EXYNOS4412 */
  1358. static struct flite_drvdata fimc_lite_drvdata_exynos4 = {
  1359. .max_width = 8192,
  1360. .max_height = 8192,
  1361. .out_width_align = 8,
  1362. .win_hor_offs_align = 2,
  1363. .out_hor_offs_align = 8,
  1364. .max_dma_bufs = 1,
  1365. .num_instances = 2,
  1366. };
  1367. /* EXYNOS5250 */
  1368. static struct flite_drvdata fimc_lite_drvdata_exynos5 = {
  1369. .max_width = 8192,
  1370. .max_height = 8192,
  1371. .out_width_align = 8,
  1372. .win_hor_offs_align = 2,
  1373. .out_hor_offs_align = 8,
  1374. .max_dma_bufs = 32,
  1375. .num_instances = 3,
  1376. };
  1377. static const struct of_device_id flite_of_match[] = {
  1378. {
  1379. .compatible = "samsung,exynos4212-fimc-lite",
  1380. .data = &fimc_lite_drvdata_exynos4,
  1381. },
  1382. {
  1383. .compatible = "samsung,exynos5250-fimc-lite",
  1384. .data = &fimc_lite_drvdata_exynos5,
  1385. },
  1386. { /* sentinel */ },
  1387. };
  1388. MODULE_DEVICE_TABLE(of, flite_of_match);
  1389. static struct platform_driver fimc_lite_driver = {
  1390. .probe = fimc_lite_probe,
  1391. .remove = fimc_lite_remove,
  1392. .driver = {
  1393. .of_match_table = flite_of_match,
  1394. .name = FIMC_LITE_DRV_NAME,
  1395. .pm = &fimc_lite_pm_ops,
  1396. }
  1397. };
  1398. module_platform_driver(fimc_lite_driver);
  1399. MODULE_LICENSE("GPL");
  1400. MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME);