at24.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * at24.c - handle most I2C EEPROMs
  4. *
  5. * Copyright (C) 2005-2007 David Brownell
  6. * Copyright (C) 2008 Wolfram Sang, Pengutronix
  7. */
  8. #include <linux/kernel.h>
  9. #include <linux/init.h>
  10. #include <linux/module.h>
  11. #include <linux/of_device.h>
  12. #include <linux/slab.h>
  13. #include <linux/delay.h>
  14. #include <linux/mutex.h>
  15. #include <linux/mod_devicetable.h>
  16. #include <linux/log2.h>
  17. #include <linux/bitops.h>
  18. #include <linux/jiffies.h>
  19. #include <linux/property.h>
  20. #include <linux/acpi.h>
  21. #include <linux/i2c.h>
  22. #include <linux/nvmem-provider.h>
  23. #include <linux/regmap.h>
  24. #include <linux/platform_data/at24.h>
  25. #include <linux/pm_runtime.h>
  26. #include <linux/gpio/consumer.h>
  27. /*
  28. * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
  29. * Differences between different vendor product lines (like Atmel AT24C or
  30. * MicroChip 24LC, etc) won't much matter for typical read/write access.
  31. * There are also I2C RAM chips, likewise interchangeable. One example
  32. * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
  33. *
  34. * However, misconfiguration can lose data. "Set 16-bit memory address"
  35. * to a part with 8-bit addressing will overwrite data. Writing with too
  36. * big a page size also loses data. And it's not safe to assume that the
  37. * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
  38. * uses 0x51, for just one example.
  39. *
  40. * Accordingly, explicit board-specific configuration data should be used
  41. * in almost all cases. (One partial exception is an SMBus used to access
  42. * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
  43. *
  44. * So this driver uses "new style" I2C driver binding, expecting to be
  45. * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
  46. * similar kernel-resident tables; or, configuration data coming from
  47. * a bootloader.
  48. *
  49. * Other than binding model, current differences from "eeprom" driver are
  50. * that this one handles write access and isn't restricted to 24c02 devices.
  51. * It also handles larger devices (32 kbit and up) with two-byte addresses,
  52. * which won't work on pure SMBus systems.
  53. */
  54. struct at24_client {
  55. struct i2c_client *client;
  56. struct regmap *regmap;
  57. };
  58. struct at24_data {
  59. /*
  60. * Lock protects against activities from other Linux tasks,
  61. * but not from changes by other I2C masters.
  62. */
  63. struct mutex lock;
  64. unsigned int write_max;
  65. unsigned int num_addresses;
  66. unsigned int offset_adj;
  67. u32 byte_len;
  68. u16 page_size;
  69. u8 flags;
  70. struct nvmem_device *nvmem;
  71. struct gpio_desc *wp_gpio;
  72. /*
  73. * Some chips tie up multiple I2C addresses; dummy devices reserve
  74. * them for us, and we'll use them with SMBus calls.
  75. */
  76. struct at24_client client[];
  77. };
  78. /*
  79. * This parameter is to help this driver avoid blocking other drivers out
  80. * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
  81. * clock, one 256 byte read takes about 1/43 second which is excessive;
  82. * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
  83. * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
  84. *
  85. * This value is forced to be a power of two so that writes align on pages.
  86. */
  87. static unsigned int at24_io_limit = 128;
  88. module_param_named(io_limit, at24_io_limit, uint, 0);
  89. MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)");
  90. /*
  91. * Specs often allow 5 msec for a page write, sometimes 20 msec;
  92. * it's important to recover from write timeouts.
  93. */
  94. static unsigned int at24_write_timeout = 25;
  95. module_param_named(write_timeout, at24_write_timeout, uint, 0);
  96. MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)");
  97. struct at24_chip_data {
  98. /*
  99. * these fields mirror their equivalents in
  100. * struct at24_platform_data
  101. */
  102. u32 byte_len;
  103. u8 flags;
  104. };
  105. #define AT24_CHIP_DATA(_name, _len, _flags) \
  106. static const struct at24_chip_data _name = { \
  107. .byte_len = _len, .flags = _flags, \
  108. }
  109. /* needs 8 addresses as A0-A2 are ignored */
  110. AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR);
  111. /* old variants can't be handled with this generic entry! */
  112. AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0);
  113. AT24_CHIP_DATA(at24_data_24cs01, 16,
  114. AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
  115. AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0);
  116. AT24_CHIP_DATA(at24_data_24cs02, 16,
  117. AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
  118. AT24_CHIP_DATA(at24_data_24mac402, 48 / 8,
  119. AT24_FLAG_MAC | AT24_FLAG_READONLY);
  120. AT24_CHIP_DATA(at24_data_24mac602, 64 / 8,
  121. AT24_FLAG_MAC | AT24_FLAG_READONLY);
  122. /* spd is a 24c02 in memory DIMMs */
  123. AT24_CHIP_DATA(at24_data_spd, 2048 / 8,
  124. AT24_FLAG_READONLY | AT24_FLAG_IRUGO);
  125. AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0);
  126. AT24_CHIP_DATA(at24_data_24cs04, 16,
  127. AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
  128. /* 24rf08 quirk is handled at i2c-core */
  129. AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0);
  130. AT24_CHIP_DATA(at24_data_24cs08, 16,
  131. AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
  132. AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0);
  133. AT24_CHIP_DATA(at24_data_24cs16, 16,
  134. AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
  135. AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16);
  136. AT24_CHIP_DATA(at24_data_24cs32, 16,
  137. AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
  138. AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16);
  139. AT24_CHIP_DATA(at24_data_24cs64, 16,
  140. AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
  141. AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16);
  142. AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16);
  143. AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16);
  144. AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16);
  145. AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16);
  146. /* identical to 24c08 ? */
  147. AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0);
  148. static const struct i2c_device_id at24_ids[] = {
  149. { "24c00", (kernel_ulong_t)&at24_data_24c00 },
  150. { "24c01", (kernel_ulong_t)&at24_data_24c01 },
  151. { "24cs01", (kernel_ulong_t)&at24_data_24cs01 },
  152. { "24c02", (kernel_ulong_t)&at24_data_24c02 },
  153. { "24cs02", (kernel_ulong_t)&at24_data_24cs02 },
  154. { "24mac402", (kernel_ulong_t)&at24_data_24mac402 },
  155. { "24mac602", (kernel_ulong_t)&at24_data_24mac602 },
  156. { "spd", (kernel_ulong_t)&at24_data_spd },
  157. { "24c04", (kernel_ulong_t)&at24_data_24c04 },
  158. { "24cs04", (kernel_ulong_t)&at24_data_24cs04 },
  159. { "24c08", (kernel_ulong_t)&at24_data_24c08 },
  160. { "24cs08", (kernel_ulong_t)&at24_data_24cs08 },
  161. { "24c16", (kernel_ulong_t)&at24_data_24c16 },
  162. { "24cs16", (kernel_ulong_t)&at24_data_24cs16 },
  163. { "24c32", (kernel_ulong_t)&at24_data_24c32 },
  164. { "24cs32", (kernel_ulong_t)&at24_data_24cs32 },
  165. { "24c64", (kernel_ulong_t)&at24_data_24c64 },
  166. { "24cs64", (kernel_ulong_t)&at24_data_24cs64 },
  167. { "24c128", (kernel_ulong_t)&at24_data_24c128 },
  168. { "24c256", (kernel_ulong_t)&at24_data_24c256 },
  169. { "24c512", (kernel_ulong_t)&at24_data_24c512 },
  170. { "24c1024", (kernel_ulong_t)&at24_data_24c1024 },
  171. { "24c2048", (kernel_ulong_t)&at24_data_24c2048 },
  172. { "at24", 0 },
  173. { /* END OF LIST */ }
  174. };
  175. MODULE_DEVICE_TABLE(i2c, at24_ids);
  176. static const struct of_device_id at24_of_match[] = {
  177. { .compatible = "atmel,24c00", .data = &at24_data_24c00 },
  178. { .compatible = "atmel,24c01", .data = &at24_data_24c01 },
  179. { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 },
  180. { .compatible = "atmel,24c02", .data = &at24_data_24c02 },
  181. { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 },
  182. { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 },
  183. { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 },
  184. { .compatible = "atmel,spd", .data = &at24_data_spd },
  185. { .compatible = "atmel,24c04", .data = &at24_data_24c04 },
  186. { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 },
  187. { .compatible = "atmel,24c08", .data = &at24_data_24c08 },
  188. { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 },
  189. { .compatible = "atmel,24c16", .data = &at24_data_24c16 },
  190. { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 },
  191. { .compatible = "atmel,24c32", .data = &at24_data_24c32 },
  192. { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 },
  193. { .compatible = "atmel,24c64", .data = &at24_data_24c64 },
  194. { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 },
  195. { .compatible = "atmel,24c128", .data = &at24_data_24c128 },
  196. { .compatible = "atmel,24c256", .data = &at24_data_24c256 },
  197. { .compatible = "atmel,24c512", .data = &at24_data_24c512 },
  198. { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 },
  199. { .compatible = "atmel,24c2048", .data = &at24_data_24c2048 },
  200. { /* END OF LIST */ },
  201. };
  202. MODULE_DEVICE_TABLE(of, at24_of_match);
  203. static const struct acpi_device_id at24_acpi_ids[] = {
  204. { "INT3499", (kernel_ulong_t)&at24_data_INT3499 },
  205. { /* END OF LIST */ }
  206. };
  207. MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
  208. /*
  209. * This routine supports chips which consume multiple I2C addresses. It
  210. * computes the addressing information to be used for a given r/w request.
  211. * Assumes that sanity checks for offset happened at sysfs-layer.
  212. *
  213. * Slave address and byte offset derive from the offset. Always
  214. * set the byte address; on a multi-master board, another master
  215. * may have changed the chip's "current" address pointer.
  216. */
  217. static struct at24_client *at24_translate_offset(struct at24_data *at24,
  218. unsigned int *offset)
  219. {
  220. unsigned int i;
  221. if (at24->flags & AT24_FLAG_ADDR16) {
  222. i = *offset >> 16;
  223. *offset &= 0xffff;
  224. } else {
  225. i = *offset >> 8;
  226. *offset &= 0xff;
  227. }
  228. return &at24->client[i];
  229. }
  230. static struct device *at24_base_client_dev(struct at24_data *at24)
  231. {
  232. return &at24->client[0].client->dev;
  233. }
  234. static size_t at24_adjust_read_count(struct at24_data *at24,
  235. unsigned int offset, size_t count)
  236. {
  237. unsigned int bits;
  238. size_t remainder;
  239. /*
  240. * In case of multi-address chips that don't rollover reads to
  241. * the next slave address: truncate the count to the slave boundary,
  242. * so that the read never straddles slaves.
  243. */
  244. if (at24->flags & AT24_FLAG_NO_RDROL) {
  245. bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8;
  246. remainder = BIT(bits) - offset;
  247. if (count > remainder)
  248. count = remainder;
  249. }
  250. if (count > at24_io_limit)
  251. count = at24_io_limit;
  252. return count;
  253. }
  254. static ssize_t at24_regmap_read(struct at24_data *at24, char *buf,
  255. unsigned int offset, size_t count)
  256. {
  257. unsigned long timeout, read_time;
  258. struct at24_client *at24_client;
  259. struct i2c_client *client;
  260. struct regmap *regmap;
  261. int ret;
  262. at24_client = at24_translate_offset(at24, &offset);
  263. regmap = at24_client->regmap;
  264. client = at24_client->client;
  265. count = at24_adjust_read_count(at24, offset, count);
  266. /* adjust offset for mac and serial read ops */
  267. offset += at24->offset_adj;
  268. timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
  269. do {
  270. /*
  271. * The timestamp shall be taken before the actual operation
  272. * to avoid a premature timeout in case of high CPU load.
  273. */
  274. read_time = jiffies;
  275. ret = regmap_bulk_read(regmap, offset, buf, count);
  276. dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
  277. count, offset, ret, jiffies);
  278. if (!ret)
  279. return count;
  280. usleep_range(1000, 1500);
  281. } while (time_before(read_time, timeout));
  282. return -ETIMEDOUT;
  283. }
  284. /*
  285. * Note that if the hardware write-protect pin is pulled high, the whole
  286. * chip is normally write protected. But there are plenty of product
  287. * variants here, including OTP fuses and partial chip protect.
  288. *
  289. * We only use page mode writes; the alternative is sloooow. These routines
  290. * write at most one page.
  291. */
  292. static size_t at24_adjust_write_count(struct at24_data *at24,
  293. unsigned int offset, size_t count)
  294. {
  295. unsigned int next_page;
  296. /* write_max is at most a page */
  297. if (count > at24->write_max)
  298. count = at24->write_max;
  299. /* Never roll over backwards, to the start of this page */
  300. next_page = roundup(offset + 1, at24->page_size);
  301. if (offset + count > next_page)
  302. count = next_page - offset;
  303. return count;
  304. }
  305. static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf,
  306. unsigned int offset, size_t count)
  307. {
  308. unsigned long timeout, write_time;
  309. struct at24_client *at24_client;
  310. struct i2c_client *client;
  311. struct regmap *regmap;
  312. int ret;
  313. at24_client = at24_translate_offset(at24, &offset);
  314. regmap = at24_client->regmap;
  315. client = at24_client->client;
  316. count = at24_adjust_write_count(at24, offset, count);
  317. timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
  318. do {
  319. /*
  320. * The timestamp shall be taken before the actual operation
  321. * to avoid a premature timeout in case of high CPU load.
  322. */
  323. write_time = jiffies;
  324. ret = regmap_bulk_write(regmap, offset, buf, count);
  325. dev_dbg(&client->dev, "write %zu@%d --> %d (%ld)\n",
  326. count, offset, ret, jiffies);
  327. if (!ret)
  328. return count;
  329. usleep_range(1000, 1500);
  330. } while (time_before(write_time, timeout));
  331. return -ETIMEDOUT;
  332. }
  333. static int at24_read(void *priv, unsigned int off, void *val, size_t count)
  334. {
  335. struct at24_data *at24;
  336. struct device *dev;
  337. char *buf = val;
  338. int ret;
  339. at24 = priv;
  340. dev = at24_base_client_dev(at24);
  341. if (unlikely(!count))
  342. return count;
  343. if (off + count > at24->byte_len)
  344. return -EINVAL;
  345. ret = pm_runtime_get_sync(dev);
  346. if (ret < 0) {
  347. pm_runtime_put_noidle(dev);
  348. return ret;
  349. }
  350. /*
  351. * Read data from chip, protecting against concurrent updates
  352. * from this host, but not from other I2C masters.
  353. */
  354. mutex_lock(&at24->lock);
  355. while (count) {
  356. ret = at24_regmap_read(at24, buf, off, count);
  357. if (ret < 0) {
  358. mutex_unlock(&at24->lock);
  359. pm_runtime_put(dev);
  360. return ret;
  361. }
  362. buf += ret;
  363. off += ret;
  364. count -= ret;
  365. }
  366. mutex_unlock(&at24->lock);
  367. pm_runtime_put(dev);
  368. return 0;
  369. }
  370. static int at24_write(void *priv, unsigned int off, void *val, size_t count)
  371. {
  372. struct at24_data *at24;
  373. struct device *dev;
  374. char *buf = val;
  375. int ret;
  376. at24 = priv;
  377. dev = at24_base_client_dev(at24);
  378. if (unlikely(!count))
  379. return -EINVAL;
  380. if (off + count > at24->byte_len)
  381. return -EINVAL;
  382. ret = pm_runtime_get_sync(dev);
  383. if (ret < 0) {
  384. pm_runtime_put_noidle(dev);
  385. return ret;
  386. }
  387. /*
  388. * Write data to chip, protecting against concurrent updates
  389. * from this host, but not from other I2C masters.
  390. */
  391. mutex_lock(&at24->lock);
  392. gpiod_set_value_cansleep(at24->wp_gpio, 0);
  393. while (count) {
  394. ret = at24_regmap_write(at24, buf, off, count);
  395. if (ret < 0) {
  396. gpiod_set_value_cansleep(at24->wp_gpio, 1);
  397. mutex_unlock(&at24->lock);
  398. pm_runtime_put(dev);
  399. return ret;
  400. }
  401. buf += ret;
  402. off += ret;
  403. count -= ret;
  404. }
  405. gpiod_set_value_cansleep(at24->wp_gpio, 1);
  406. mutex_unlock(&at24->lock);
  407. pm_runtime_put(dev);
  408. return 0;
  409. }
  410. static void at24_properties_to_pdata(struct device *dev,
  411. struct at24_platform_data *chip)
  412. {
  413. int err;
  414. u32 val;
  415. if (device_property_present(dev, "read-only"))
  416. chip->flags |= AT24_FLAG_READONLY;
  417. if (device_property_present(dev, "no-read-rollover"))
  418. chip->flags |= AT24_FLAG_NO_RDROL;
  419. err = device_property_read_u32(dev, "address-width", &val);
  420. if (!err) {
  421. switch (val) {
  422. case 8:
  423. if (chip->flags & AT24_FLAG_ADDR16)
  424. dev_warn(dev, "Override address width to be 8, while default is 16\n");
  425. chip->flags &= ~AT24_FLAG_ADDR16;
  426. break;
  427. case 16:
  428. chip->flags |= AT24_FLAG_ADDR16;
  429. break;
  430. default:
  431. dev_warn(dev, "Bad \"address-width\" property: %u\n",
  432. val);
  433. }
  434. }
  435. err = device_property_read_u32(dev, "size", &val);
  436. if (!err)
  437. chip->byte_len = val;
  438. err = device_property_read_u32(dev, "pagesize", &val);
  439. if (!err) {
  440. chip->page_size = val;
  441. } else {
  442. /*
  443. * This is slow, but we can't know all eeproms, so we better
  444. * play safe. Specifying custom eeprom-types via platform_data
  445. * is recommended anyhow.
  446. */
  447. chip->page_size = 1;
  448. }
  449. }
  450. static int at24_get_pdata(struct device *dev, struct at24_platform_data *pdata)
  451. {
  452. struct device_node *of_node = dev->of_node;
  453. const struct at24_chip_data *cdata;
  454. const struct i2c_device_id *id;
  455. struct at24_platform_data *pd;
  456. pd = dev_get_platdata(dev);
  457. if (pd) {
  458. memcpy(pdata, pd, sizeof(*pdata));
  459. return 0;
  460. }
  461. id = i2c_match_id(at24_ids, to_i2c_client(dev));
  462. /*
  463. * The I2C core allows OF nodes compatibles to match against the
  464. * I2C device ID table as a fallback, so check not only if an OF
  465. * node is present but also if it matches an OF device ID entry.
  466. */
  467. if (of_node && of_match_device(at24_of_match, dev))
  468. cdata = of_device_get_match_data(dev);
  469. else if (id)
  470. cdata = (void *)id->driver_data;
  471. else
  472. cdata = acpi_device_get_match_data(dev);
  473. if (!cdata)
  474. return -ENODEV;
  475. pdata->byte_len = cdata->byte_len;
  476. pdata->flags = cdata->flags;
  477. at24_properties_to_pdata(dev, pdata);
  478. return 0;
  479. }
  480. static void at24_remove_dummy_clients(struct at24_data *at24)
  481. {
  482. int i;
  483. for (i = 1; i < at24->num_addresses; i++)
  484. i2c_unregister_device(at24->client[i].client);
  485. }
  486. static int at24_make_dummy_client(struct at24_data *at24, unsigned int index,
  487. struct regmap_config *regmap_config)
  488. {
  489. struct i2c_client *base_client, *dummy_client;
  490. unsigned short int addr;
  491. struct regmap *regmap;
  492. struct device *dev;
  493. base_client = at24->client[0].client;
  494. dev = &base_client->dev;
  495. addr = base_client->addr + index;
  496. dummy_client = i2c_new_dummy(base_client->adapter,
  497. base_client->addr + index);
  498. if (!dummy_client) {
  499. dev_err(dev, "address 0x%02x unavailable\n", addr);
  500. return -EADDRINUSE;
  501. }
  502. regmap = devm_regmap_init_i2c(dummy_client, regmap_config);
  503. if (IS_ERR(regmap)) {
  504. i2c_unregister_device(dummy_client);
  505. return PTR_ERR(regmap);
  506. }
  507. at24->client[index].client = dummy_client;
  508. at24->client[index].regmap = regmap;
  509. return 0;
  510. }
  511. static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len)
  512. {
  513. if (flags & AT24_FLAG_MAC) {
  514. /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */
  515. return 0xa0 - byte_len;
  516. } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) {
  517. /*
  518. * For 16 bit address pointers, the word address must contain
  519. * a '10' sequence in bits 11 and 10 regardless of the
  520. * intended position of the address pointer.
  521. */
  522. return 0x0800;
  523. } else if (flags & AT24_FLAG_SERIAL) {
  524. /*
  525. * Otherwise the word address must begin with a '10' sequence,
  526. * regardless of the intended address.
  527. */
  528. return 0x0080;
  529. } else {
  530. return 0;
  531. }
  532. }
  533. static int at24_probe(struct i2c_client *client)
  534. {
  535. struct regmap_config regmap_config = { };
  536. struct nvmem_config nvmem_config = { };
  537. struct at24_platform_data pdata = { };
  538. struct device *dev = &client->dev;
  539. bool i2c_fn_i2c, i2c_fn_block;
  540. unsigned int i, num_addresses;
  541. struct at24_data *at24;
  542. struct regmap *regmap;
  543. size_t at24_size;
  544. bool writable;
  545. u8 test_byte;
  546. int err;
  547. i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C);
  548. i2c_fn_block = i2c_check_functionality(client->adapter,
  549. I2C_FUNC_SMBUS_WRITE_I2C_BLOCK);
  550. err = at24_get_pdata(dev, &pdata);
  551. if (err)
  552. return err;
  553. if (!i2c_fn_i2c && !i2c_fn_block)
  554. pdata.page_size = 1;
  555. if (!pdata.page_size) {
  556. dev_err(dev, "page_size must not be 0!\n");
  557. return -EINVAL;
  558. }
  559. if (!is_power_of_2(pdata.page_size))
  560. dev_warn(dev, "page_size looks suspicious (no power of 2)!\n");
  561. if (pdata.flags & AT24_FLAG_TAKE8ADDR)
  562. num_addresses = 8;
  563. else
  564. num_addresses = DIV_ROUND_UP(pdata.byte_len,
  565. (pdata.flags & AT24_FLAG_ADDR16) ? 65536 : 256);
  566. if ((pdata.flags & AT24_FLAG_SERIAL) && (pdata.flags & AT24_FLAG_MAC)) {
  567. dev_err(dev,
  568. "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
  569. return -EINVAL;
  570. }
  571. regmap_config.val_bits = 8;
  572. regmap_config.reg_bits = (pdata.flags & AT24_FLAG_ADDR16) ? 16 : 8;
  573. regmap_config.disable_locking = true;
  574. regmap = devm_regmap_init_i2c(client, &regmap_config);
  575. if (IS_ERR(regmap))
  576. return PTR_ERR(regmap);
  577. at24_size = sizeof(*at24) + num_addresses * sizeof(struct at24_client);
  578. at24 = devm_kzalloc(dev, at24_size, GFP_KERNEL);
  579. if (!at24)
  580. return -ENOMEM;
  581. mutex_init(&at24->lock);
  582. at24->byte_len = pdata.byte_len;
  583. at24->page_size = pdata.page_size;
  584. at24->flags = pdata.flags;
  585. at24->num_addresses = num_addresses;
  586. at24->offset_adj = at24_get_offset_adj(pdata.flags, pdata.byte_len);
  587. at24->client[0].client = client;
  588. at24->client[0].regmap = regmap;
  589. at24->wp_gpio = devm_gpiod_get_optional(dev, "wp", GPIOD_OUT_HIGH);
  590. if (IS_ERR(at24->wp_gpio))
  591. return PTR_ERR(at24->wp_gpio);
  592. writable = !(pdata.flags & AT24_FLAG_READONLY);
  593. if (writable) {
  594. at24->write_max = min_t(unsigned int,
  595. pdata.page_size, at24_io_limit);
  596. if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX)
  597. at24->write_max = I2C_SMBUS_BLOCK_MAX;
  598. }
  599. /* use dummy devices for multiple-address chips */
  600. for (i = 1; i < num_addresses; i++) {
  601. err = at24_make_dummy_client(at24, i, &regmap_config);
  602. if (err) {
  603. at24_remove_dummy_clients(at24);
  604. return err;
  605. }
  606. }
  607. i2c_set_clientdata(client, at24);
  608. /* enable runtime pm */
  609. pm_runtime_set_active(dev);
  610. pm_runtime_enable(dev);
  611. /*
  612. * Perform a one-byte test read to verify that the
  613. * chip is functional.
  614. */
  615. err = at24_read(at24, 0, &test_byte, 1);
  616. pm_runtime_idle(dev);
  617. if (err) {
  618. err = -ENODEV;
  619. goto err_clients;
  620. }
  621. nvmem_config.name = dev_name(dev);
  622. nvmem_config.dev = dev;
  623. nvmem_config.read_only = !writable;
  624. nvmem_config.root_only = !(pdata.flags & AT24_FLAG_IRUGO);
  625. nvmem_config.owner = THIS_MODULE;
  626. nvmem_config.compat = true;
  627. nvmem_config.base_dev = dev;
  628. nvmem_config.reg_read = at24_read;
  629. nvmem_config.reg_write = at24_write;
  630. nvmem_config.priv = at24;
  631. nvmem_config.stride = 1;
  632. nvmem_config.word_size = 1;
  633. nvmem_config.size = pdata.byte_len;
  634. at24->nvmem = devm_nvmem_register(dev, &nvmem_config);
  635. if (IS_ERR(at24->nvmem)) {
  636. err = PTR_ERR(at24->nvmem);
  637. goto err_clients;
  638. }
  639. dev_info(dev, "%u byte %s EEPROM, %s, %u bytes/write\n",
  640. pdata.byte_len, client->name,
  641. writable ? "writable" : "read-only", at24->write_max);
  642. /* export data to kernel code */
  643. if (pdata.setup)
  644. pdata.setup(at24->nvmem, pdata.context);
  645. return 0;
  646. err_clients:
  647. at24_remove_dummy_clients(at24);
  648. pm_runtime_disable(dev);
  649. return err;
  650. }
  651. static int at24_remove(struct i2c_client *client)
  652. {
  653. struct at24_data *at24;
  654. at24 = i2c_get_clientdata(client);
  655. at24_remove_dummy_clients(at24);
  656. pm_runtime_disable(&client->dev);
  657. pm_runtime_set_suspended(&client->dev);
  658. return 0;
  659. }
  660. static struct i2c_driver at24_driver = {
  661. .driver = {
  662. .name = "at24",
  663. .of_match_table = at24_of_match,
  664. .acpi_match_table = ACPI_PTR(at24_acpi_ids),
  665. },
  666. .probe_new = at24_probe,
  667. .remove = at24_remove,
  668. .id_table = at24_ids,
  669. };
  670. static int __init at24_init(void)
  671. {
  672. if (!at24_io_limit) {
  673. pr_err("at24: at24_io_limit must not be 0!\n");
  674. return -EINVAL;
  675. }
  676. at24_io_limit = rounddown_pow_of_two(at24_io_limit);
  677. return i2c_add_driver(&at24_driver);
  678. }
  679. module_init(at24_init);
  680. static void __exit at24_exit(void)
  681. {
  682. i2c_del_driver(&at24_driver);
  683. }
  684. module_exit(at24_exit);
  685. MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
  686. MODULE_AUTHOR("David Brownell and Wolfram Sang");
  687. MODULE_LICENSE("GPL");