phy.c 5.8 KB

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  1. /*
  2. * Marvell 88e6xxx Ethernet switch PHY and PPU support
  3. *
  4. * Copyright (c) 2008 Marvell Semiconductor
  5. *
  6. * Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. */
  13. #include <linux/mdio.h>
  14. #include <linux/module.h>
  15. #include "chip.h"
  16. #include "phy.h"
  17. int mv88e6165_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
  18. int addr, int reg, u16 *val)
  19. {
  20. return mv88e6xxx_read(chip, addr, reg, val);
  21. }
  22. int mv88e6165_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
  23. int addr, int reg, u16 val)
  24. {
  25. return mv88e6xxx_write(chip, addr, reg, val);
  26. }
  27. int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy, int reg, u16 *val)
  28. {
  29. int addr = phy; /* PHY devices addresses start at 0x0 */
  30. struct mii_bus *bus;
  31. bus = mv88e6xxx_default_mdio_bus(chip);
  32. if (!bus)
  33. return -EOPNOTSUPP;
  34. if (!chip->info->ops->phy_read)
  35. return -EOPNOTSUPP;
  36. return chip->info->ops->phy_read(chip, bus, addr, reg, val);
  37. }
  38. int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy, int reg, u16 val)
  39. {
  40. int addr = phy; /* PHY devices addresses start at 0x0 */
  41. struct mii_bus *bus;
  42. bus = mv88e6xxx_default_mdio_bus(chip);
  43. if (!bus)
  44. return -EOPNOTSUPP;
  45. if (!chip->info->ops->phy_write)
  46. return -EOPNOTSUPP;
  47. return chip->info->ops->phy_write(chip, bus, addr, reg, val);
  48. }
  49. static int mv88e6xxx_phy_page_get(struct mv88e6xxx_chip *chip, int phy, u8 page)
  50. {
  51. return mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page);
  52. }
  53. static void mv88e6xxx_phy_page_put(struct mv88e6xxx_chip *chip, int phy)
  54. {
  55. int err;
  56. /* Restore PHY page Copper 0x0 for access via the registered
  57. * MDIO bus
  58. */
  59. err = mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE,
  60. MV88E6XXX_PHY_PAGE_COPPER);
  61. if (unlikely(err)) {
  62. dev_err(chip->dev,
  63. "failed to restore PHY %d page Copper (%d)\n",
  64. phy, err);
  65. }
  66. }
  67. int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy,
  68. u8 page, int reg, u16 *val)
  69. {
  70. int err;
  71. /* There is no paging for registers 22 */
  72. if (reg == MV88E6XXX_PHY_PAGE)
  73. return -EINVAL;
  74. err = mv88e6xxx_phy_page_get(chip, phy, page);
  75. if (!err) {
  76. err = mv88e6xxx_phy_read(chip, phy, reg, val);
  77. mv88e6xxx_phy_page_put(chip, phy);
  78. }
  79. return err;
  80. }
  81. int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy,
  82. u8 page, int reg, u16 val)
  83. {
  84. int err;
  85. /* There is no paging for registers 22 */
  86. if (reg == MV88E6XXX_PHY_PAGE)
  87. return -EINVAL;
  88. err = mv88e6xxx_phy_page_get(chip, phy, page);
  89. if (!err) {
  90. err = mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page);
  91. if (!err)
  92. err = mv88e6xxx_phy_write(chip, phy, reg, val);
  93. mv88e6xxx_phy_page_put(chip, phy);
  94. }
  95. return err;
  96. }
  97. static int mv88e6xxx_phy_ppu_disable(struct mv88e6xxx_chip *chip)
  98. {
  99. if (!chip->info->ops->ppu_disable)
  100. return 0;
  101. return chip->info->ops->ppu_disable(chip);
  102. }
  103. static int mv88e6xxx_phy_ppu_enable(struct mv88e6xxx_chip *chip)
  104. {
  105. if (!chip->info->ops->ppu_enable)
  106. return 0;
  107. return chip->info->ops->ppu_enable(chip);
  108. }
  109. static void mv88e6xxx_phy_ppu_reenable_work(struct work_struct *ugly)
  110. {
  111. struct mv88e6xxx_chip *chip;
  112. chip = container_of(ugly, struct mv88e6xxx_chip, ppu_work);
  113. mutex_lock(&chip->reg_lock);
  114. if (mutex_trylock(&chip->ppu_mutex)) {
  115. if (mv88e6xxx_phy_ppu_enable(chip) == 0)
  116. chip->ppu_disabled = 0;
  117. mutex_unlock(&chip->ppu_mutex);
  118. }
  119. mutex_unlock(&chip->reg_lock);
  120. }
  121. static void mv88e6xxx_phy_ppu_reenable_timer(struct timer_list *t)
  122. {
  123. struct mv88e6xxx_chip *chip = from_timer(chip, t, ppu_timer);
  124. schedule_work(&chip->ppu_work);
  125. }
  126. static int mv88e6xxx_phy_ppu_access_get(struct mv88e6xxx_chip *chip)
  127. {
  128. int ret;
  129. mutex_lock(&chip->ppu_mutex);
  130. /* If the PHY polling unit is enabled, disable it so that
  131. * we can access the PHY registers. If it was already
  132. * disabled, cancel the timer that is going to re-enable
  133. * it.
  134. */
  135. if (!chip->ppu_disabled) {
  136. ret = mv88e6xxx_phy_ppu_disable(chip);
  137. if (ret < 0) {
  138. mutex_unlock(&chip->ppu_mutex);
  139. return ret;
  140. }
  141. chip->ppu_disabled = 1;
  142. } else {
  143. del_timer(&chip->ppu_timer);
  144. ret = 0;
  145. }
  146. return ret;
  147. }
  148. static void mv88e6xxx_phy_ppu_access_put(struct mv88e6xxx_chip *chip)
  149. {
  150. /* Schedule a timer to re-enable the PHY polling unit. */
  151. mod_timer(&chip->ppu_timer, jiffies + msecs_to_jiffies(10));
  152. mutex_unlock(&chip->ppu_mutex);
  153. }
  154. static void mv88e6xxx_phy_ppu_state_init(struct mv88e6xxx_chip *chip)
  155. {
  156. mutex_init(&chip->ppu_mutex);
  157. INIT_WORK(&chip->ppu_work, mv88e6xxx_phy_ppu_reenable_work);
  158. timer_setup(&chip->ppu_timer, mv88e6xxx_phy_ppu_reenable_timer, 0);
  159. }
  160. static void mv88e6xxx_phy_ppu_state_destroy(struct mv88e6xxx_chip *chip)
  161. {
  162. del_timer_sync(&chip->ppu_timer);
  163. }
  164. int mv88e6185_phy_ppu_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
  165. int addr, int reg, u16 *val)
  166. {
  167. int err;
  168. err = mv88e6xxx_phy_ppu_access_get(chip);
  169. if (!err) {
  170. err = mv88e6xxx_read(chip, addr, reg, val);
  171. mv88e6xxx_phy_ppu_access_put(chip);
  172. }
  173. return err;
  174. }
  175. int mv88e6185_phy_ppu_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
  176. int addr, int reg, u16 val)
  177. {
  178. int err;
  179. err = mv88e6xxx_phy_ppu_access_get(chip);
  180. if (!err) {
  181. err = mv88e6xxx_write(chip, addr, reg, val);
  182. mv88e6xxx_phy_ppu_access_put(chip);
  183. }
  184. return err;
  185. }
  186. void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip)
  187. {
  188. if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
  189. mv88e6xxx_phy_ppu_state_init(chip);
  190. }
  191. void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip)
  192. {
  193. if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
  194. mv88e6xxx_phy_ppu_state_destroy(chip);
  195. }
  196. int mv88e6xxx_phy_setup(struct mv88e6xxx_chip *chip)
  197. {
  198. return mv88e6xxx_phy_ppu_enable(chip);
  199. }