realtek-smi.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /* Realtek Simple Management Interface (SMI) driver
  3. * It can be discussed how "simple" this interface is.
  4. *
  5. * The SMI protocol piggy-backs the MDIO MDC and MDIO signals levels
  6. * but the protocol is not MDIO at all. Instead it is a Realtek
  7. * pecularity that need to bit-bang the lines in a special way to
  8. * communicate with the switch.
  9. *
  10. * ASICs we intend to support with this driver:
  11. *
  12. * RTL8366 - The original version, apparently
  13. * RTL8369 - Similar enough to have the same datsheet as RTL8366
  14. * RTL8366RB - Probably reads out "RTL8366 revision B", has a quite
  15. * different register layout from the other two
  16. * RTL8366S - Is this "RTL8366 super"?
  17. * RTL8367 - Has an OpenWRT driver as well
  18. * RTL8368S - Seems to be an alternative name for RTL8366RB
  19. * RTL8370 - Also uses SMI
  20. *
  21. * Copyright (C) 2017 Linus Walleij <linus.walleij@linaro.org>
  22. * Copyright (C) 2010 Antti Seppälä <a.seppala@gmail.com>
  23. * Copyright (C) 2010 Roman Yeryomin <roman@advem.lv>
  24. * Copyright (C) 2011 Colin Leitner <colin.leitner@googlemail.com>
  25. * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
  26. */
  27. #include <linux/kernel.h>
  28. #include <linux/module.h>
  29. #include <linux/device.h>
  30. #include <linux/spinlock.h>
  31. #include <linux/skbuff.h>
  32. #include <linux/of.h>
  33. #include <linux/of_device.h>
  34. #include <linux/of_mdio.h>
  35. #include <linux/delay.h>
  36. #include <linux/gpio/consumer.h>
  37. #include <linux/platform_device.h>
  38. #include <linux/regmap.h>
  39. #include <linux/bitops.h>
  40. #include <linux/if_bridge.h>
  41. #include "realtek-smi.h"
  42. #define REALTEK_SMI_ACK_RETRY_COUNT 5
  43. #define REALTEK_SMI_HW_STOP_DELAY 25 /* msecs */
  44. #define REALTEK_SMI_HW_START_DELAY 100 /* msecs */
  45. static inline void realtek_smi_clk_delay(struct realtek_smi *smi)
  46. {
  47. ndelay(smi->clk_delay);
  48. }
  49. static void realtek_smi_start(struct realtek_smi *smi)
  50. {
  51. /* Set GPIO pins to output mode, with initial state:
  52. * SCK = 0, SDA = 1
  53. */
  54. gpiod_direction_output(smi->mdc, 0);
  55. gpiod_direction_output(smi->mdio, 1);
  56. realtek_smi_clk_delay(smi);
  57. /* CLK 1: 0 -> 1, 1 -> 0 */
  58. gpiod_set_value(smi->mdc, 1);
  59. realtek_smi_clk_delay(smi);
  60. gpiod_set_value(smi->mdc, 0);
  61. realtek_smi_clk_delay(smi);
  62. /* CLK 2: */
  63. gpiod_set_value(smi->mdc, 1);
  64. realtek_smi_clk_delay(smi);
  65. gpiod_set_value(smi->mdio, 0);
  66. realtek_smi_clk_delay(smi);
  67. gpiod_set_value(smi->mdc, 0);
  68. realtek_smi_clk_delay(smi);
  69. gpiod_set_value(smi->mdio, 1);
  70. }
  71. static void realtek_smi_stop(struct realtek_smi *smi)
  72. {
  73. realtek_smi_clk_delay(smi);
  74. gpiod_set_value(smi->mdio, 0);
  75. gpiod_set_value(smi->mdc, 1);
  76. realtek_smi_clk_delay(smi);
  77. gpiod_set_value(smi->mdio, 1);
  78. realtek_smi_clk_delay(smi);
  79. gpiod_set_value(smi->mdc, 1);
  80. realtek_smi_clk_delay(smi);
  81. gpiod_set_value(smi->mdc, 0);
  82. realtek_smi_clk_delay(smi);
  83. gpiod_set_value(smi->mdc, 1);
  84. /* Add a click */
  85. realtek_smi_clk_delay(smi);
  86. gpiod_set_value(smi->mdc, 0);
  87. realtek_smi_clk_delay(smi);
  88. gpiod_set_value(smi->mdc, 1);
  89. /* Set GPIO pins to input mode */
  90. gpiod_direction_input(smi->mdio);
  91. gpiod_direction_input(smi->mdc);
  92. }
  93. static void realtek_smi_write_bits(struct realtek_smi *smi, u32 data, u32 len)
  94. {
  95. for (; len > 0; len--) {
  96. realtek_smi_clk_delay(smi);
  97. /* Prepare data */
  98. gpiod_set_value(smi->mdio, !!(data & (1 << (len - 1))));
  99. realtek_smi_clk_delay(smi);
  100. /* Clocking */
  101. gpiod_set_value(smi->mdc, 1);
  102. realtek_smi_clk_delay(smi);
  103. gpiod_set_value(smi->mdc, 0);
  104. }
  105. }
  106. static void realtek_smi_read_bits(struct realtek_smi *smi, u32 len, u32 *data)
  107. {
  108. gpiod_direction_input(smi->mdio);
  109. for (*data = 0; len > 0; len--) {
  110. u32 u;
  111. realtek_smi_clk_delay(smi);
  112. /* Clocking */
  113. gpiod_set_value(smi->mdc, 1);
  114. realtek_smi_clk_delay(smi);
  115. u = !!gpiod_get_value(smi->mdio);
  116. gpiod_set_value(smi->mdc, 0);
  117. *data |= (u << (len - 1));
  118. }
  119. gpiod_direction_output(smi->mdio, 0);
  120. }
  121. static int realtek_smi_wait_for_ack(struct realtek_smi *smi)
  122. {
  123. int retry_cnt;
  124. retry_cnt = 0;
  125. do {
  126. u32 ack;
  127. realtek_smi_read_bits(smi, 1, &ack);
  128. if (ack == 0)
  129. break;
  130. if (++retry_cnt > REALTEK_SMI_ACK_RETRY_COUNT) {
  131. dev_err(smi->dev, "ACK timeout\n");
  132. return -ETIMEDOUT;
  133. }
  134. } while (1);
  135. return 0;
  136. }
  137. static int realtek_smi_write_byte(struct realtek_smi *smi, u8 data)
  138. {
  139. realtek_smi_write_bits(smi, data, 8);
  140. return realtek_smi_wait_for_ack(smi);
  141. }
  142. static int realtek_smi_write_byte_noack(struct realtek_smi *smi, u8 data)
  143. {
  144. realtek_smi_write_bits(smi, data, 8);
  145. return 0;
  146. }
  147. static int realtek_smi_read_byte0(struct realtek_smi *smi, u8 *data)
  148. {
  149. u32 t;
  150. /* Read data */
  151. realtek_smi_read_bits(smi, 8, &t);
  152. *data = (t & 0xff);
  153. /* Send an ACK */
  154. realtek_smi_write_bits(smi, 0x00, 1);
  155. return 0;
  156. }
  157. static int realtek_smi_read_byte1(struct realtek_smi *smi, u8 *data)
  158. {
  159. u32 t;
  160. /* Read data */
  161. realtek_smi_read_bits(smi, 8, &t);
  162. *data = (t & 0xff);
  163. /* Send an ACK */
  164. realtek_smi_write_bits(smi, 0x01, 1);
  165. return 0;
  166. }
  167. static int realtek_smi_read_reg(struct realtek_smi *smi, u32 addr, u32 *data)
  168. {
  169. unsigned long flags;
  170. u8 lo = 0;
  171. u8 hi = 0;
  172. int ret;
  173. spin_lock_irqsave(&smi->lock, flags);
  174. realtek_smi_start(smi);
  175. /* Send READ command */
  176. ret = realtek_smi_write_byte(smi, smi->cmd_read);
  177. if (ret)
  178. goto out;
  179. /* Set ADDR[7:0] */
  180. ret = realtek_smi_write_byte(smi, addr & 0xff);
  181. if (ret)
  182. goto out;
  183. /* Set ADDR[15:8] */
  184. ret = realtek_smi_write_byte(smi, addr >> 8);
  185. if (ret)
  186. goto out;
  187. /* Read DATA[7:0] */
  188. realtek_smi_read_byte0(smi, &lo);
  189. /* Read DATA[15:8] */
  190. realtek_smi_read_byte1(smi, &hi);
  191. *data = ((u32)lo) | (((u32)hi) << 8);
  192. ret = 0;
  193. out:
  194. realtek_smi_stop(smi);
  195. spin_unlock_irqrestore(&smi->lock, flags);
  196. return ret;
  197. }
  198. static int realtek_smi_write_reg(struct realtek_smi *smi,
  199. u32 addr, u32 data, bool ack)
  200. {
  201. unsigned long flags;
  202. int ret;
  203. spin_lock_irqsave(&smi->lock, flags);
  204. realtek_smi_start(smi);
  205. /* Send WRITE command */
  206. ret = realtek_smi_write_byte(smi, smi->cmd_write);
  207. if (ret)
  208. goto out;
  209. /* Set ADDR[7:0] */
  210. ret = realtek_smi_write_byte(smi, addr & 0xff);
  211. if (ret)
  212. goto out;
  213. /* Set ADDR[15:8] */
  214. ret = realtek_smi_write_byte(smi, addr >> 8);
  215. if (ret)
  216. goto out;
  217. /* Write DATA[7:0] */
  218. ret = realtek_smi_write_byte(smi, data & 0xff);
  219. if (ret)
  220. goto out;
  221. /* Write DATA[15:8] */
  222. if (ack)
  223. ret = realtek_smi_write_byte(smi, data >> 8);
  224. else
  225. ret = realtek_smi_write_byte_noack(smi, data >> 8);
  226. if (ret)
  227. goto out;
  228. ret = 0;
  229. out:
  230. realtek_smi_stop(smi);
  231. spin_unlock_irqrestore(&smi->lock, flags);
  232. return ret;
  233. }
  234. /* There is one single case when we need to use this accessor and that
  235. * is when issueing soft reset. Since the device reset as soon as we write
  236. * that bit, no ACK will come back for natural reasons.
  237. */
  238. int realtek_smi_write_reg_noack(struct realtek_smi *smi, u32 addr,
  239. u32 data)
  240. {
  241. return realtek_smi_write_reg(smi, addr, data, false);
  242. }
  243. EXPORT_SYMBOL_GPL(realtek_smi_write_reg_noack);
  244. /* Regmap accessors */
  245. static int realtek_smi_write(void *ctx, u32 reg, u32 val)
  246. {
  247. struct realtek_smi *smi = ctx;
  248. return realtek_smi_write_reg(smi, reg, val, true);
  249. }
  250. static int realtek_smi_read(void *ctx, u32 reg, u32 *val)
  251. {
  252. struct realtek_smi *smi = ctx;
  253. return realtek_smi_read_reg(smi, reg, val);
  254. }
  255. static const struct regmap_config realtek_smi_mdio_regmap_config = {
  256. .reg_bits = 10, /* A4..A0 R4..R0 */
  257. .val_bits = 16,
  258. .reg_stride = 1,
  259. /* PHY regs are at 0x8000 */
  260. .max_register = 0xffff,
  261. .reg_format_endian = REGMAP_ENDIAN_BIG,
  262. .reg_read = realtek_smi_read,
  263. .reg_write = realtek_smi_write,
  264. .cache_type = REGCACHE_NONE,
  265. };
  266. static int realtek_smi_mdio_read(struct mii_bus *bus, int addr, int regnum)
  267. {
  268. struct realtek_smi *smi = bus->priv;
  269. return smi->ops->phy_read(smi, addr, regnum);
  270. }
  271. static int realtek_smi_mdio_write(struct mii_bus *bus, int addr, int regnum,
  272. u16 val)
  273. {
  274. struct realtek_smi *smi = bus->priv;
  275. return smi->ops->phy_write(smi, addr, regnum, val);
  276. }
  277. int realtek_smi_setup_mdio(struct realtek_smi *smi)
  278. {
  279. struct device_node *mdio_np;
  280. int ret;
  281. mdio_np = of_get_compatible_child(smi->dev->of_node, "realtek,smi-mdio");
  282. if (!mdio_np) {
  283. dev_err(smi->dev, "no MDIO bus node\n");
  284. return -ENODEV;
  285. }
  286. smi->slave_mii_bus = devm_mdiobus_alloc(smi->dev);
  287. if (!smi->slave_mii_bus) {
  288. ret = -ENOMEM;
  289. goto err_put_node;
  290. }
  291. smi->slave_mii_bus->priv = smi;
  292. smi->slave_mii_bus->name = "SMI slave MII";
  293. smi->slave_mii_bus->read = realtek_smi_mdio_read;
  294. smi->slave_mii_bus->write = realtek_smi_mdio_write;
  295. snprintf(smi->slave_mii_bus->id, MII_BUS_ID_SIZE, "SMI-%d",
  296. smi->ds->index);
  297. smi->slave_mii_bus->dev.of_node = mdio_np;
  298. smi->slave_mii_bus->parent = smi->dev;
  299. smi->ds->slave_mii_bus = smi->slave_mii_bus;
  300. ret = of_mdiobus_register(smi->slave_mii_bus, mdio_np);
  301. if (ret) {
  302. dev_err(smi->dev, "unable to register MDIO bus %s\n",
  303. smi->slave_mii_bus->id);
  304. goto err_put_node;
  305. }
  306. return 0;
  307. err_put_node:
  308. of_node_put(mdio_np);
  309. return ret;
  310. }
  311. static int realtek_smi_probe(struct platform_device *pdev)
  312. {
  313. const struct realtek_smi_variant *var;
  314. struct device *dev = &pdev->dev;
  315. struct realtek_smi *smi;
  316. struct device_node *np;
  317. int ret;
  318. var = of_device_get_match_data(dev);
  319. np = dev->of_node;
  320. smi = devm_kzalloc(dev, sizeof(*smi), GFP_KERNEL);
  321. if (!smi)
  322. return -ENOMEM;
  323. smi->map = devm_regmap_init(dev, NULL, smi,
  324. &realtek_smi_mdio_regmap_config);
  325. if (IS_ERR(smi->map)) {
  326. ret = PTR_ERR(smi->map);
  327. dev_err(dev, "regmap init failed: %d\n", ret);
  328. return ret;
  329. }
  330. /* Link forward and backward */
  331. smi->dev = dev;
  332. smi->clk_delay = var->clk_delay;
  333. smi->cmd_read = var->cmd_read;
  334. smi->cmd_write = var->cmd_write;
  335. smi->ops = var->ops;
  336. dev_set_drvdata(dev, smi);
  337. spin_lock_init(&smi->lock);
  338. /* TODO: if power is software controlled, set up any regulators here */
  339. /* Assert then deassert RESET */
  340. smi->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
  341. if (IS_ERR(smi->reset)) {
  342. dev_err(dev, "failed to get RESET GPIO\n");
  343. return PTR_ERR(smi->reset);
  344. }
  345. msleep(REALTEK_SMI_HW_STOP_DELAY);
  346. gpiod_set_value(smi->reset, 0);
  347. msleep(REALTEK_SMI_HW_START_DELAY);
  348. dev_info(dev, "deasserted RESET\n");
  349. /* Fetch MDIO pins */
  350. smi->mdc = devm_gpiod_get_optional(dev, "mdc", GPIOD_OUT_LOW);
  351. if (IS_ERR(smi->mdc))
  352. return PTR_ERR(smi->mdc);
  353. smi->mdio = devm_gpiod_get_optional(dev, "mdio", GPIOD_OUT_LOW);
  354. if (IS_ERR(smi->mdio))
  355. return PTR_ERR(smi->mdio);
  356. smi->leds_disabled = of_property_read_bool(np, "realtek,disable-leds");
  357. ret = smi->ops->detect(smi);
  358. if (ret) {
  359. dev_err(dev, "unable to detect switch\n");
  360. return ret;
  361. }
  362. smi->ds = dsa_switch_alloc(dev, smi->num_ports);
  363. if (!smi->ds)
  364. return -ENOMEM;
  365. smi->ds->priv = smi;
  366. smi->ds->ops = var->ds_ops;
  367. ret = dsa_register_switch(smi->ds);
  368. if (ret) {
  369. dev_err(dev, "unable to register switch ret = %d\n", ret);
  370. return ret;
  371. }
  372. return 0;
  373. }
  374. static int realtek_smi_remove(struct platform_device *pdev)
  375. {
  376. struct realtek_smi *smi = dev_get_drvdata(&pdev->dev);
  377. dsa_unregister_switch(smi->ds);
  378. if (smi->slave_mii_bus)
  379. of_node_put(smi->slave_mii_bus->dev.of_node);
  380. gpiod_set_value(smi->reset, 1);
  381. return 0;
  382. }
  383. static const struct of_device_id realtek_smi_of_match[] = {
  384. {
  385. .compatible = "realtek,rtl8366rb",
  386. .data = &rtl8366rb_variant,
  387. },
  388. {
  389. /* FIXME: add support for RTL8366S and more */
  390. .compatible = "realtek,rtl8366s",
  391. .data = NULL,
  392. },
  393. { /* sentinel */ },
  394. };
  395. MODULE_DEVICE_TABLE(of, realtek_smi_of_match);
  396. static struct platform_driver realtek_smi_driver = {
  397. .driver = {
  398. .name = "realtek-smi",
  399. .of_match_table = of_match_ptr(realtek_smi_of_match),
  400. },
  401. .probe = realtek_smi_probe,
  402. .remove = realtek_smi_remove,
  403. };
  404. module_platform_driver(realtek_smi_driver);
  405. MODULE_LICENSE("GPL");