ca8210.c 84 KB

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  1. /*
  2. * http://www.cascoda.com/products/ca-821x/
  3. * Copyright (c) 2016, Cascoda, Ltd.
  4. * All rights reserved.
  5. *
  6. * This code is dual-licensed under both GPLv2 and 3-clause BSD. What follows is
  7. * the license notice for both respectively.
  8. *
  9. *******************************************************************************
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. *******************************************************************************
  22. *
  23. * Redistribution and use in source and binary forms, with or without
  24. * modification, are permitted provided that the following conditions are met:
  25. *
  26. * 1. Redistributions of source code must retain the above copyright notice,
  27. * this list of conditions and the following disclaimer.
  28. *
  29. * 2. Redistributions in binary form must reproduce the above copyright notice,
  30. * this list of conditions and the following disclaimer in the documentation
  31. * and/or other materials provided with the distribution.
  32. *
  33. * 3. Neither the name of the copyright holder nor the names of its contributors
  34. * may be used to endorse or promote products derived from this software without
  35. * specific prior written permission.
  36. *
  37. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  38. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  39. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  40. * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
  41. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  42. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  43. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  44. * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  45. * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  46. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  47. * POSSIBILITY OF SUCH DAMAGE.
  48. */
  49. #include <linux/cdev.h>
  50. #include <linux/clk-provider.h>
  51. #include <linux/debugfs.h>
  52. #include <linux/delay.h>
  53. #include <linux/gpio.h>
  54. #include <linux/ieee802154.h>
  55. #include <linux/kfifo.h>
  56. #include <linux/of.h>
  57. #include <linux/of_device.h>
  58. #include <linux/of_gpio.h>
  59. #include <linux/module.h>
  60. #include <linux/mutex.h>
  61. #include <linux/poll.h>
  62. #include <linux/skbuff.h>
  63. #include <linux/slab.h>
  64. #include <linux/spi/spi.h>
  65. #include <linux/spinlock.h>
  66. #include <linux/string.h>
  67. #include <linux/workqueue.h>
  68. #include <linux/interrupt.h>
  69. #include <net/ieee802154_netdev.h>
  70. #include <net/mac802154.h>
  71. #define DRIVER_NAME "ca8210"
  72. /* external clock frequencies */
  73. #define ONE_MHZ 1000000
  74. #define TWO_MHZ (2 * ONE_MHZ)
  75. #define FOUR_MHZ (4 * ONE_MHZ)
  76. #define EIGHT_MHZ (8 * ONE_MHZ)
  77. #define SIXTEEN_MHZ (16 * ONE_MHZ)
  78. /* spi constants */
  79. #define CA8210_SPI_BUF_SIZE 256
  80. #define CA8210_SYNC_TIMEOUT 1000 /* Timeout for synchronous commands [ms] */
  81. /* test interface constants */
  82. #define CA8210_TEST_INT_FILE_NAME "ca8210_test"
  83. #define CA8210_TEST_INT_FIFO_SIZE 256
  84. /* MAC status enumerations */
  85. #define MAC_SUCCESS (0x00)
  86. #define MAC_ERROR (0x01)
  87. #define MAC_CANCELLED (0x02)
  88. #define MAC_READY_FOR_POLL (0x03)
  89. #define MAC_COUNTER_ERROR (0xDB)
  90. #define MAC_IMPROPER_KEY_TYPE (0xDC)
  91. #define MAC_IMPROPER_SECURITY_LEVEL (0xDD)
  92. #define MAC_UNSUPPORTED_LEGACY (0xDE)
  93. #define MAC_UNSUPPORTED_SECURITY (0xDF)
  94. #define MAC_BEACON_LOST (0xE0)
  95. #define MAC_CHANNEL_ACCESS_FAILURE (0xE1)
  96. #define MAC_DENIED (0xE2)
  97. #define MAC_DISABLE_TRX_FAILURE (0xE3)
  98. #define MAC_SECURITY_ERROR (0xE4)
  99. #define MAC_FRAME_TOO_LONG (0xE5)
  100. #define MAC_INVALID_GTS (0xE6)
  101. #define MAC_INVALID_HANDLE (0xE7)
  102. #define MAC_INVALID_PARAMETER (0xE8)
  103. #define MAC_NO_ACK (0xE9)
  104. #define MAC_NO_BEACON (0xEA)
  105. #define MAC_NO_DATA (0xEB)
  106. #define MAC_NO_SHORT_ADDRESS (0xEC)
  107. #define MAC_OUT_OF_CAP (0xED)
  108. #define MAC_PAN_ID_CONFLICT (0xEE)
  109. #define MAC_REALIGNMENT (0xEF)
  110. #define MAC_TRANSACTION_EXPIRED (0xF0)
  111. #define MAC_TRANSACTION_OVERFLOW (0xF1)
  112. #define MAC_TX_ACTIVE (0xF2)
  113. #define MAC_UNAVAILABLE_KEY (0xF3)
  114. #define MAC_UNSUPPORTED_ATTRIBUTE (0xF4)
  115. #define MAC_INVALID_ADDRESS (0xF5)
  116. #define MAC_ON_TIME_TOO_LONG (0xF6)
  117. #define MAC_PAST_TIME (0xF7)
  118. #define MAC_TRACKING_OFF (0xF8)
  119. #define MAC_INVALID_INDEX (0xF9)
  120. #define MAC_LIMIT_REACHED (0xFA)
  121. #define MAC_READ_ONLY (0xFB)
  122. #define MAC_SCAN_IN_PROGRESS (0xFC)
  123. #define MAC_SUPERFRAME_OVERLAP (0xFD)
  124. #define MAC_SYSTEM_ERROR (0xFF)
  125. /* HWME attribute IDs */
  126. #define HWME_EDTHRESHOLD (0x04)
  127. #define HWME_EDVALUE (0x06)
  128. #define HWME_SYSCLKOUT (0x0F)
  129. #define HWME_LQILIMIT (0x11)
  130. /* TDME attribute IDs */
  131. #define TDME_CHANNEL (0x00)
  132. #define TDME_ATM_CONFIG (0x06)
  133. #define MAX_HWME_ATTRIBUTE_SIZE 16
  134. #define MAX_TDME_ATTRIBUTE_SIZE 2
  135. /* PHY/MAC PIB Attribute Enumerations */
  136. #define PHY_CURRENT_CHANNEL (0x00)
  137. #define PHY_TRANSMIT_POWER (0x02)
  138. #define PHY_CCA_MODE (0x03)
  139. #define MAC_ASSOCIATION_PERMIT (0x41)
  140. #define MAC_AUTO_REQUEST (0x42)
  141. #define MAC_BATT_LIFE_EXT (0x43)
  142. #define MAC_BATT_LIFE_EXT_PERIODS (0x44)
  143. #define MAC_BEACON_PAYLOAD (0x45)
  144. #define MAC_BEACON_PAYLOAD_LENGTH (0x46)
  145. #define MAC_BEACON_ORDER (0x47)
  146. #define MAC_GTS_PERMIT (0x4d)
  147. #define MAC_MAX_CSMA_BACKOFFS (0x4e)
  148. #define MAC_MIN_BE (0x4f)
  149. #define MAC_PAN_ID (0x50)
  150. #define MAC_PROMISCUOUS_MODE (0x51)
  151. #define MAC_RX_ON_WHEN_IDLE (0x52)
  152. #define MAC_SHORT_ADDRESS (0x53)
  153. #define MAC_SUPERFRAME_ORDER (0x54)
  154. #define MAC_ASSOCIATED_PAN_COORD (0x56)
  155. #define MAC_MAX_BE (0x57)
  156. #define MAC_MAX_FRAME_RETRIES (0x59)
  157. #define MAC_RESPONSE_WAIT_TIME (0x5A)
  158. #define MAC_SECURITY_ENABLED (0x5D)
  159. #define MAC_AUTO_REQUEST_SECURITY_LEVEL (0x78)
  160. #define MAC_AUTO_REQUEST_KEY_ID_MODE (0x79)
  161. #define NS_IEEE_ADDRESS (0xFF) /* Non-standard IEEE address */
  162. /* MAC Address Mode Definitions */
  163. #define MAC_MODE_NO_ADDR (0x00)
  164. #define MAC_MODE_SHORT_ADDR (0x02)
  165. #define MAC_MODE_LONG_ADDR (0x03)
  166. /* MAC constants */
  167. #define MAX_BEACON_OVERHEAD (75)
  168. #define MAX_BEACON_PAYLOAD_LENGTH (IEEE802154_MTU - MAX_BEACON_OVERHEAD)
  169. #define MAX_ATTRIBUTE_SIZE (122)
  170. #define MAX_DATA_SIZE (114)
  171. #define CA8210_VALID_CHANNELS (0x07FFF800)
  172. /* MAC workarounds for V1.1 and MPW silicon (V0.x) */
  173. #define CA8210_MAC_WORKAROUNDS (0)
  174. #define CA8210_MAC_MPW (0)
  175. /* memory manipulation macros */
  176. #define LS_BYTE(x) ((u8)((x) & 0xFF))
  177. #define MS_BYTE(x) ((u8)(((x) >> 8) & 0xFF))
  178. /* message ID codes in SPI commands */
  179. /* downstream */
  180. #define MCPS_DATA_REQUEST (0x00)
  181. #define MLME_ASSOCIATE_REQUEST (0x02)
  182. #define MLME_ASSOCIATE_RESPONSE (0x03)
  183. #define MLME_DISASSOCIATE_REQUEST (0x04)
  184. #define MLME_GET_REQUEST (0x05)
  185. #define MLME_ORPHAN_RESPONSE (0x06)
  186. #define MLME_RESET_REQUEST (0x07)
  187. #define MLME_RX_ENABLE_REQUEST (0x08)
  188. #define MLME_SCAN_REQUEST (0x09)
  189. #define MLME_SET_REQUEST (0x0A)
  190. #define MLME_START_REQUEST (0x0B)
  191. #define MLME_POLL_REQUEST (0x0D)
  192. #define HWME_SET_REQUEST (0x0E)
  193. #define HWME_GET_REQUEST (0x0F)
  194. #define TDME_SETSFR_REQUEST (0x11)
  195. #define TDME_GETSFR_REQUEST (0x12)
  196. #define TDME_SET_REQUEST (0x14)
  197. /* upstream */
  198. #define MCPS_DATA_INDICATION (0x00)
  199. #define MCPS_DATA_CONFIRM (0x01)
  200. #define MLME_RESET_CONFIRM (0x0A)
  201. #define MLME_SET_CONFIRM (0x0E)
  202. #define MLME_START_CONFIRM (0x0F)
  203. #define HWME_SET_CONFIRM (0x12)
  204. #define HWME_GET_CONFIRM (0x13)
  205. #define HWME_WAKEUP_INDICATION (0x15)
  206. #define TDME_SETSFR_CONFIRM (0x17)
  207. /* SPI command IDs */
  208. /* bit indicating a confirm or indication from slave to master */
  209. #define SPI_S2M (0x20)
  210. /* bit indicating a synchronous message */
  211. #define SPI_SYN (0x40)
  212. /* SPI command definitions */
  213. #define SPI_IDLE (0xFF)
  214. #define SPI_NACK (0xF0)
  215. #define SPI_MCPS_DATA_REQUEST (MCPS_DATA_REQUEST)
  216. #define SPI_MCPS_DATA_INDICATION (MCPS_DATA_INDICATION + SPI_S2M)
  217. #define SPI_MCPS_DATA_CONFIRM (MCPS_DATA_CONFIRM + SPI_S2M)
  218. #define SPI_MLME_ASSOCIATE_REQUEST (MLME_ASSOCIATE_REQUEST)
  219. #define SPI_MLME_RESET_REQUEST (MLME_RESET_REQUEST + SPI_SYN)
  220. #define SPI_MLME_SET_REQUEST (MLME_SET_REQUEST + SPI_SYN)
  221. #define SPI_MLME_START_REQUEST (MLME_START_REQUEST + SPI_SYN)
  222. #define SPI_MLME_RESET_CONFIRM (MLME_RESET_CONFIRM + SPI_S2M + SPI_SYN)
  223. #define SPI_MLME_SET_CONFIRM (MLME_SET_CONFIRM + SPI_S2M + SPI_SYN)
  224. #define SPI_MLME_START_CONFIRM (MLME_START_CONFIRM + SPI_S2M + SPI_SYN)
  225. #define SPI_HWME_SET_REQUEST (HWME_SET_REQUEST + SPI_SYN)
  226. #define SPI_HWME_GET_REQUEST (HWME_GET_REQUEST + SPI_SYN)
  227. #define SPI_HWME_SET_CONFIRM (HWME_SET_CONFIRM + SPI_S2M + SPI_SYN)
  228. #define SPI_HWME_GET_CONFIRM (HWME_GET_CONFIRM + SPI_S2M + SPI_SYN)
  229. #define SPI_HWME_WAKEUP_INDICATION (HWME_WAKEUP_INDICATION + SPI_S2M)
  230. #define SPI_TDME_SETSFR_REQUEST (TDME_SETSFR_REQUEST + SPI_SYN)
  231. #define SPI_TDME_SET_REQUEST (TDME_SET_REQUEST + SPI_SYN)
  232. #define SPI_TDME_SETSFR_CONFIRM (TDME_SETSFR_CONFIRM + SPI_S2M + SPI_SYN)
  233. /* TDME SFR addresses */
  234. /* Page 0 */
  235. #define CA8210_SFR_PACFG (0xB1)
  236. #define CA8210_SFR_MACCON (0xD8)
  237. #define CA8210_SFR_PACFGIB (0xFE)
  238. /* Page 1 */
  239. #define CA8210_SFR_LOTXCAL (0xBF)
  240. #define CA8210_SFR_PTHRH (0xD1)
  241. #define CA8210_SFR_PRECFG (0xD3)
  242. #define CA8210_SFR_LNAGX40 (0xE1)
  243. #define CA8210_SFR_LNAGX41 (0xE2)
  244. #define CA8210_SFR_LNAGX42 (0xE3)
  245. #define CA8210_SFR_LNAGX43 (0xE4)
  246. #define CA8210_SFR_LNAGX44 (0xE5)
  247. #define CA8210_SFR_LNAGX45 (0xE6)
  248. #define CA8210_SFR_LNAGX46 (0xE7)
  249. #define CA8210_SFR_LNAGX47 (0xE9)
  250. #define PACFGIB_DEFAULT_CURRENT (0x3F)
  251. #define PTHRH_DEFAULT_THRESHOLD (0x5A)
  252. #define LNAGX40_DEFAULT_GAIN (0x29) /* 10dB */
  253. #define LNAGX41_DEFAULT_GAIN (0x54) /* 21dB */
  254. #define LNAGX42_DEFAULT_GAIN (0x6C) /* 27dB */
  255. #define LNAGX43_DEFAULT_GAIN (0x7A) /* 30dB */
  256. #define LNAGX44_DEFAULT_GAIN (0x84) /* 33dB */
  257. #define LNAGX45_DEFAULT_GAIN (0x8B) /* 34dB */
  258. #define LNAGX46_DEFAULT_GAIN (0x92) /* 36dB */
  259. #define LNAGX47_DEFAULT_GAIN (0x96) /* 37dB */
  260. #define CA8210_IOCTL_HARD_RESET (0x00)
  261. /* Structs/Enums */
  262. /**
  263. * struct cas_control - spi transfer structure
  264. * @msg: spi_message for each exchange
  265. * @transfer: spi_transfer for each exchange
  266. * @tx_buf: source array for transmission
  267. * @tx_in_buf: array storing bytes received during transmission
  268. * @priv: pointer to private data
  269. *
  270. * This structure stores all the necessary data passed around during a single
  271. * spi exchange.
  272. */
  273. struct cas_control {
  274. struct spi_message msg;
  275. struct spi_transfer transfer;
  276. u8 tx_buf[CA8210_SPI_BUF_SIZE];
  277. u8 tx_in_buf[CA8210_SPI_BUF_SIZE];
  278. struct ca8210_priv *priv;
  279. };
  280. /**
  281. * struct ca8210_test - ca8210 test interface structure
  282. * @ca8210_dfs_spi_int: pointer to the entry in the debug fs for this device
  283. * @up_fifo: fifo for upstream messages
  284. *
  285. * This structure stores all the data pertaining to the debug interface
  286. */
  287. struct ca8210_test {
  288. struct dentry *ca8210_dfs_spi_int;
  289. struct kfifo up_fifo;
  290. wait_queue_head_t readq;
  291. };
  292. /**
  293. * struct ca8210_priv - ca8210 private data structure
  294. * @spi: pointer to the ca8210 spi device object
  295. * @hw: pointer to the ca8210 ieee802154_hw object
  296. * @hw_registered: true if hw has been registered with ieee802154
  297. * @lock: spinlock protecting the private data area
  298. * @mlme_workqueue: workqueue for triggering MLME Reset
  299. * @irq_workqueue: workqueue for irq processing
  300. * @tx_skb: current socket buffer to transmit
  301. * @nextmsduhandle: msdu handle to pass to the 15.4 MAC layer for the
  302. * next transmission
  303. * @clk: external clock provided by the ca8210
  304. * @last_dsn: sequence number of last data packet received, for
  305. * resend detection
  306. * @test: test interface data section for this instance
  307. * @async_tx_pending: true if an asynchronous transmission was started and
  308. * is not complete
  309. * @sync_command_response: pointer to buffer to fill with sync response
  310. * @ca8210_is_awake: nonzero if ca8210 is initialised, ready for comms
  311. * @sync_down: counts number of downstream synchronous commands
  312. * @sync_up: counts number of upstream synchronous commands
  313. * @spi_transfer_complete completion object for a single spi_transfer
  314. * @sync_exchange_complete completion object for a complete synchronous API
  315. * exchange
  316. * @promiscuous whether the ca8210 is in promiscuous mode or not
  317. * @retries: records how many times the current pending spi
  318. * transfer has been retried
  319. */
  320. struct ca8210_priv {
  321. struct spi_device *spi;
  322. struct ieee802154_hw *hw;
  323. bool hw_registered;
  324. spinlock_t lock;
  325. struct workqueue_struct *mlme_workqueue;
  326. struct workqueue_struct *irq_workqueue;
  327. struct sk_buff *tx_skb;
  328. u8 nextmsduhandle;
  329. struct clk *clk;
  330. int last_dsn;
  331. struct ca8210_test test;
  332. bool async_tx_pending;
  333. u8 *sync_command_response;
  334. struct completion ca8210_is_awake;
  335. int sync_down, sync_up;
  336. struct completion spi_transfer_complete, sync_exchange_complete;
  337. bool promiscuous;
  338. int retries;
  339. };
  340. /**
  341. * struct work_priv_container - link between a work object and the relevant
  342. * device's private data
  343. * @work: work object being executed
  344. * @priv: device's private data section
  345. *
  346. */
  347. struct work_priv_container {
  348. struct work_struct work;
  349. struct ca8210_priv *priv;
  350. };
  351. /**
  352. * struct ca8210_platform_data - ca8210 platform data structure
  353. * @extclockenable: true if the external clock is to be enabled
  354. * @extclockfreq: frequency of the external clock
  355. * @extclockgpio: ca8210 output gpio of the external clock
  356. * @gpio_reset: gpio number of ca8210 reset line
  357. * @gpio_irq: gpio number of ca8210 interrupt line
  358. * @irq_id: identifier for the ca8210 irq
  359. *
  360. */
  361. struct ca8210_platform_data {
  362. bool extclockenable;
  363. unsigned int extclockfreq;
  364. unsigned int extclockgpio;
  365. int gpio_reset;
  366. int gpio_irq;
  367. int irq_id;
  368. };
  369. /**
  370. * struct fulladdr - full MAC addressing information structure
  371. * @mode: address mode (none, short, extended)
  372. * @pan_id: 16-bit LE pan id
  373. * @address: LE address, variable length as specified by mode
  374. *
  375. */
  376. struct fulladdr {
  377. u8 mode;
  378. u8 pan_id[2];
  379. u8 address[8];
  380. };
  381. /**
  382. * union macaddr: generic MAC address container
  383. * @short_addr: 16-bit short address
  384. * @ieee_address: 64-bit extended address as LE byte array
  385. *
  386. */
  387. union macaddr {
  388. u16 short_address;
  389. u8 ieee_address[8];
  390. };
  391. /**
  392. * struct secspec: security specification for SAP commands
  393. * @security_level: 0-7, controls level of authentication & encryption
  394. * @key_id_mode: 0-3, specifies how to obtain key
  395. * @key_source: extended key retrieval data
  396. * @key_index: single-byte key identifier
  397. *
  398. */
  399. struct secspec {
  400. u8 security_level;
  401. u8 key_id_mode;
  402. u8 key_source[8];
  403. u8 key_index;
  404. };
  405. /* downlink functions parameter set definitions */
  406. struct mcps_data_request_pset {
  407. u8 src_addr_mode;
  408. struct fulladdr dst;
  409. u8 msdu_length;
  410. u8 msdu_handle;
  411. u8 tx_options;
  412. u8 msdu[MAX_DATA_SIZE];
  413. };
  414. struct mlme_set_request_pset {
  415. u8 pib_attribute;
  416. u8 pib_attribute_index;
  417. u8 pib_attribute_length;
  418. u8 pib_attribute_value[MAX_ATTRIBUTE_SIZE];
  419. };
  420. struct hwme_set_request_pset {
  421. u8 hw_attribute;
  422. u8 hw_attribute_length;
  423. u8 hw_attribute_value[MAX_HWME_ATTRIBUTE_SIZE];
  424. };
  425. struct hwme_get_request_pset {
  426. u8 hw_attribute;
  427. };
  428. struct tdme_setsfr_request_pset {
  429. u8 sfr_page;
  430. u8 sfr_address;
  431. u8 sfr_value;
  432. };
  433. /* uplink functions parameter set definitions */
  434. struct hwme_set_confirm_pset {
  435. u8 status;
  436. u8 hw_attribute;
  437. };
  438. struct hwme_get_confirm_pset {
  439. u8 status;
  440. u8 hw_attribute;
  441. u8 hw_attribute_length;
  442. u8 hw_attribute_value[MAX_HWME_ATTRIBUTE_SIZE];
  443. };
  444. struct tdme_setsfr_confirm_pset {
  445. u8 status;
  446. u8 sfr_page;
  447. u8 sfr_address;
  448. };
  449. struct mac_message {
  450. u8 command_id;
  451. u8 length;
  452. union {
  453. struct mcps_data_request_pset data_req;
  454. struct mlme_set_request_pset set_req;
  455. struct hwme_set_request_pset hwme_set_req;
  456. struct hwme_get_request_pset hwme_get_req;
  457. struct tdme_setsfr_request_pset tdme_set_sfr_req;
  458. struct hwme_set_confirm_pset hwme_set_cnf;
  459. struct hwme_get_confirm_pset hwme_get_cnf;
  460. struct tdme_setsfr_confirm_pset tdme_set_sfr_cnf;
  461. u8 u8param;
  462. u8 status;
  463. u8 payload[148];
  464. } pdata;
  465. };
  466. union pa_cfg_sfr {
  467. struct {
  468. u8 bias_current_trim : 3;
  469. u8 /* reserved */ : 1;
  470. u8 buffer_capacitor_trim : 3;
  471. u8 boost : 1;
  472. };
  473. u8 paib;
  474. };
  475. struct preamble_cfg_sfr {
  476. u8 timeout_symbols : 3;
  477. u8 acquisition_symbols : 3;
  478. u8 search_symbols : 2;
  479. };
  480. static int (*cascoda_api_upstream)(
  481. const u8 *buf,
  482. size_t len,
  483. void *device_ref
  484. );
  485. /**
  486. * link_to_linux_err() - Translates an 802.15.4 return code into the closest
  487. * linux error
  488. * @link_status: 802.15.4 status code
  489. *
  490. * Return: 0 or Linux error code
  491. */
  492. static int link_to_linux_err(int link_status)
  493. {
  494. if (link_status < 0) {
  495. /* status is already a Linux code */
  496. return link_status;
  497. }
  498. switch (link_status) {
  499. case MAC_SUCCESS:
  500. case MAC_REALIGNMENT:
  501. return 0;
  502. case MAC_IMPROPER_KEY_TYPE:
  503. return -EKEYREJECTED;
  504. case MAC_IMPROPER_SECURITY_LEVEL:
  505. case MAC_UNSUPPORTED_LEGACY:
  506. case MAC_DENIED:
  507. return -EACCES;
  508. case MAC_BEACON_LOST:
  509. case MAC_NO_ACK:
  510. case MAC_NO_BEACON:
  511. return -ENETUNREACH;
  512. case MAC_CHANNEL_ACCESS_FAILURE:
  513. case MAC_TX_ACTIVE:
  514. case MAC_SCAN_IN_PROGRESS:
  515. return -EBUSY;
  516. case MAC_DISABLE_TRX_FAILURE:
  517. case MAC_OUT_OF_CAP:
  518. return -EAGAIN;
  519. case MAC_FRAME_TOO_LONG:
  520. return -EMSGSIZE;
  521. case MAC_INVALID_GTS:
  522. case MAC_PAST_TIME:
  523. return -EBADSLT;
  524. case MAC_INVALID_HANDLE:
  525. return -EBADMSG;
  526. case MAC_INVALID_PARAMETER:
  527. case MAC_UNSUPPORTED_ATTRIBUTE:
  528. case MAC_ON_TIME_TOO_LONG:
  529. case MAC_INVALID_INDEX:
  530. return -EINVAL;
  531. case MAC_NO_DATA:
  532. return -ENODATA;
  533. case MAC_NO_SHORT_ADDRESS:
  534. return -EFAULT;
  535. case MAC_PAN_ID_CONFLICT:
  536. return -EADDRINUSE;
  537. case MAC_TRANSACTION_EXPIRED:
  538. return -ETIME;
  539. case MAC_TRANSACTION_OVERFLOW:
  540. return -ENOBUFS;
  541. case MAC_UNAVAILABLE_KEY:
  542. return -ENOKEY;
  543. case MAC_INVALID_ADDRESS:
  544. return -ENXIO;
  545. case MAC_TRACKING_OFF:
  546. case MAC_SUPERFRAME_OVERLAP:
  547. return -EREMOTEIO;
  548. case MAC_LIMIT_REACHED:
  549. return -EDQUOT;
  550. case MAC_READ_ONLY:
  551. return -EROFS;
  552. default:
  553. return -EPROTO;
  554. }
  555. }
  556. /**
  557. * ca8210_test_int_driver_write() - Writes a message to the test interface to be
  558. * read by the userspace
  559. * @buf: Buffer containing upstream message
  560. * @len: length of message to write
  561. * @spi: SPI device of message originator
  562. *
  563. * Return: 0 or linux error code
  564. */
  565. static int ca8210_test_int_driver_write(
  566. const u8 *buf,
  567. size_t len,
  568. void *spi
  569. )
  570. {
  571. struct ca8210_priv *priv = spi_get_drvdata(spi);
  572. struct ca8210_test *test = &priv->test;
  573. char *fifo_buffer;
  574. int i;
  575. dev_dbg(
  576. &priv->spi->dev,
  577. "test_interface: Buffering upstream message:\n"
  578. );
  579. for (i = 0; i < len; i++)
  580. dev_dbg(&priv->spi->dev, "%#03x\n", buf[i]);
  581. fifo_buffer = kmemdup(buf, len, GFP_KERNEL);
  582. if (!fifo_buffer)
  583. return -ENOMEM;
  584. kfifo_in(&test->up_fifo, &fifo_buffer, 4);
  585. wake_up_interruptible(&priv->test.readq);
  586. return 0;
  587. }
  588. /* SPI Operation */
  589. static int ca8210_net_rx(
  590. struct ieee802154_hw *hw,
  591. u8 *command,
  592. size_t len
  593. );
  594. static u8 mlme_reset_request_sync(
  595. u8 set_default_pib,
  596. void *device_ref
  597. );
  598. static int ca8210_spi_transfer(
  599. struct spi_device *spi,
  600. const u8 *buf,
  601. size_t len
  602. );
  603. /**
  604. * ca8210_reset_send() - Hard resets the ca8210 for a given time
  605. * @spi: Pointer to target ca8210 spi device
  606. * @ms: Milliseconds to hold the reset line low for
  607. */
  608. static void ca8210_reset_send(struct spi_device *spi, unsigned int ms)
  609. {
  610. struct ca8210_platform_data *pdata = spi->dev.platform_data;
  611. struct ca8210_priv *priv = spi_get_drvdata(spi);
  612. long status;
  613. gpio_set_value(pdata->gpio_reset, 0);
  614. reinit_completion(&priv->ca8210_is_awake);
  615. msleep(ms);
  616. gpio_set_value(pdata->gpio_reset, 1);
  617. priv->promiscuous = false;
  618. /* Wait until wakeup indication seen */
  619. status = wait_for_completion_interruptible_timeout(
  620. &priv->ca8210_is_awake,
  621. msecs_to_jiffies(CA8210_SYNC_TIMEOUT)
  622. );
  623. if (status == 0) {
  624. dev_crit(
  625. &spi->dev,
  626. "Fatal: No wakeup from ca8210 after reset!\n"
  627. );
  628. }
  629. dev_dbg(&spi->dev, "Reset the device\n");
  630. }
  631. /**
  632. * ca8210_mlme_reset_worker() - Resets the MLME, Called when the MAC OVERFLOW
  633. * condition happens.
  634. * @work: Pointer to work being executed
  635. */
  636. static void ca8210_mlme_reset_worker(struct work_struct *work)
  637. {
  638. struct work_priv_container *wpc = container_of(
  639. work,
  640. struct work_priv_container,
  641. work
  642. );
  643. struct ca8210_priv *priv = wpc->priv;
  644. mlme_reset_request_sync(0, priv->spi);
  645. kfree(wpc);
  646. }
  647. /**
  648. * ca8210_rx_done() - Calls various message dispatches responding to a received
  649. * command
  650. * @arg: Pointer to the cas_control object for the relevant spi transfer
  651. *
  652. * Presents a received SAP command from the ca8210 to the Cascoda EVBME, test
  653. * interface and network driver.
  654. */
  655. static void ca8210_rx_done(struct cas_control *cas_ctl)
  656. {
  657. u8 *buf;
  658. unsigned int len;
  659. struct work_priv_container *mlme_reset_wpc;
  660. struct ca8210_priv *priv = cas_ctl->priv;
  661. buf = cas_ctl->tx_in_buf;
  662. len = buf[1] + 2;
  663. if (len > CA8210_SPI_BUF_SIZE) {
  664. dev_crit(
  665. &priv->spi->dev,
  666. "Received packet len (%u) erroneously long\n",
  667. len
  668. );
  669. goto finish;
  670. }
  671. if (buf[0] & SPI_SYN) {
  672. if (priv->sync_command_response) {
  673. memcpy(priv->sync_command_response, buf, len);
  674. complete(&priv->sync_exchange_complete);
  675. } else {
  676. if (cascoda_api_upstream)
  677. cascoda_api_upstream(buf, len, priv->spi);
  678. priv->sync_up++;
  679. }
  680. } else {
  681. if (cascoda_api_upstream)
  682. cascoda_api_upstream(buf, len, priv->spi);
  683. }
  684. ca8210_net_rx(priv->hw, buf, len);
  685. if (buf[0] == SPI_MCPS_DATA_CONFIRM) {
  686. if (buf[3] == MAC_TRANSACTION_OVERFLOW) {
  687. dev_info(
  688. &priv->spi->dev,
  689. "Waiting for transaction overflow to stabilise...\n");
  690. msleep(2000);
  691. dev_info(
  692. &priv->spi->dev,
  693. "Resetting MAC...\n");
  694. mlme_reset_wpc = kmalloc(sizeof(*mlme_reset_wpc),
  695. GFP_KERNEL);
  696. if (!mlme_reset_wpc)
  697. goto finish;
  698. INIT_WORK(
  699. &mlme_reset_wpc->work,
  700. ca8210_mlme_reset_worker
  701. );
  702. mlme_reset_wpc->priv = priv;
  703. queue_work(priv->mlme_workqueue, &mlme_reset_wpc->work);
  704. }
  705. } else if (buf[0] == SPI_HWME_WAKEUP_INDICATION) {
  706. dev_notice(
  707. &priv->spi->dev,
  708. "Wakeup indication received, reason:\n"
  709. );
  710. switch (buf[2]) {
  711. case 0:
  712. dev_notice(
  713. &priv->spi->dev,
  714. "Transceiver woken up from Power Up / System Reset\n"
  715. );
  716. break;
  717. case 1:
  718. dev_notice(
  719. &priv->spi->dev,
  720. "Watchdog Timer Time-Out\n"
  721. );
  722. break;
  723. case 2:
  724. dev_notice(
  725. &priv->spi->dev,
  726. "Transceiver woken up from Power-Off by Sleep Timer Time-Out\n");
  727. break;
  728. case 3:
  729. dev_notice(
  730. &priv->spi->dev,
  731. "Transceiver woken up from Power-Off by GPIO Activity\n"
  732. );
  733. break;
  734. case 4:
  735. dev_notice(
  736. &priv->spi->dev,
  737. "Transceiver woken up from Standby by Sleep Timer Time-Out\n"
  738. );
  739. break;
  740. case 5:
  741. dev_notice(
  742. &priv->spi->dev,
  743. "Transceiver woken up from Standby by GPIO Activity\n"
  744. );
  745. break;
  746. case 6:
  747. dev_notice(
  748. &priv->spi->dev,
  749. "Sleep-Timer Time-Out in Active Mode\n"
  750. );
  751. break;
  752. default:
  753. dev_warn(&priv->spi->dev, "Wakeup reason unknown\n");
  754. break;
  755. }
  756. complete(&priv->ca8210_is_awake);
  757. }
  758. finish:;
  759. }
  760. static int ca8210_remove(struct spi_device *spi_device);
  761. /**
  762. * ca8210_spi_transfer_complete() - Called when a single spi transfer has
  763. * completed
  764. * @context: Pointer to the cas_control object for the finished transfer
  765. */
  766. static void ca8210_spi_transfer_complete(void *context)
  767. {
  768. struct cas_control *cas_ctl = context;
  769. struct ca8210_priv *priv = cas_ctl->priv;
  770. bool duplex_rx = false;
  771. int i;
  772. u8 retry_buffer[CA8210_SPI_BUF_SIZE];
  773. if (
  774. cas_ctl->tx_in_buf[0] == SPI_NACK ||
  775. (cas_ctl->tx_in_buf[0] == SPI_IDLE &&
  776. cas_ctl->tx_in_buf[1] == SPI_NACK)
  777. ) {
  778. /* ca8210 is busy */
  779. dev_info(&priv->spi->dev, "ca8210 was busy during attempted write\n");
  780. if (cas_ctl->tx_buf[0] == SPI_IDLE) {
  781. dev_warn(
  782. &priv->spi->dev,
  783. "IRQ servicing NACKd, dropping transfer\n"
  784. );
  785. kfree(cas_ctl);
  786. return;
  787. }
  788. if (priv->retries > 3) {
  789. dev_err(&priv->spi->dev, "too many retries!\n");
  790. kfree(cas_ctl);
  791. ca8210_remove(priv->spi);
  792. return;
  793. }
  794. memcpy(retry_buffer, cas_ctl->tx_buf, CA8210_SPI_BUF_SIZE);
  795. kfree(cas_ctl);
  796. ca8210_spi_transfer(
  797. priv->spi,
  798. retry_buffer,
  799. CA8210_SPI_BUF_SIZE
  800. );
  801. priv->retries++;
  802. dev_info(&priv->spi->dev, "retried spi write\n");
  803. return;
  804. } else if (
  805. cas_ctl->tx_in_buf[0] != SPI_IDLE &&
  806. cas_ctl->tx_in_buf[0] != SPI_NACK
  807. ) {
  808. duplex_rx = true;
  809. }
  810. if (duplex_rx) {
  811. dev_dbg(&priv->spi->dev, "READ CMD DURING TX\n");
  812. for (i = 0; i < cas_ctl->tx_in_buf[1] + 2; i++)
  813. dev_dbg(
  814. &priv->spi->dev,
  815. "%#03x\n",
  816. cas_ctl->tx_in_buf[i]
  817. );
  818. ca8210_rx_done(cas_ctl);
  819. }
  820. complete(&priv->spi_transfer_complete);
  821. kfree(cas_ctl);
  822. priv->retries = 0;
  823. }
  824. /**
  825. * ca8210_spi_transfer() - Initiate duplex spi transfer with ca8210
  826. * @spi: Pointer to spi device for transfer
  827. * @buf: Octet array to send
  828. * @len: length of the buffer being sent
  829. *
  830. * Return: 0 or linux error code
  831. */
  832. static int ca8210_spi_transfer(
  833. struct spi_device *spi,
  834. const u8 *buf,
  835. size_t len
  836. )
  837. {
  838. int i, status = 0;
  839. struct ca8210_priv *priv;
  840. struct cas_control *cas_ctl;
  841. if (!spi) {
  842. pr_crit("NULL spi device passed to %s\n", __func__);
  843. return -ENODEV;
  844. }
  845. priv = spi_get_drvdata(spi);
  846. reinit_completion(&priv->spi_transfer_complete);
  847. dev_dbg(&spi->dev, "%s called\n", __func__);
  848. cas_ctl = kmalloc(sizeof(*cas_ctl), GFP_ATOMIC);
  849. if (!cas_ctl)
  850. return -ENOMEM;
  851. cas_ctl->priv = priv;
  852. memset(cas_ctl->tx_buf, SPI_IDLE, CA8210_SPI_BUF_SIZE);
  853. memset(cas_ctl->tx_in_buf, SPI_IDLE, CA8210_SPI_BUF_SIZE);
  854. memcpy(cas_ctl->tx_buf, buf, len);
  855. for (i = 0; i < len; i++)
  856. dev_dbg(&spi->dev, "%#03x\n", cas_ctl->tx_buf[i]);
  857. spi_message_init(&cas_ctl->msg);
  858. cas_ctl->transfer.tx_nbits = 1; /* 1 MOSI line */
  859. cas_ctl->transfer.rx_nbits = 1; /* 1 MISO line */
  860. cas_ctl->transfer.speed_hz = 0; /* Use device setting */
  861. cas_ctl->transfer.bits_per_word = 0; /* Use device setting */
  862. cas_ctl->transfer.tx_buf = cas_ctl->tx_buf;
  863. cas_ctl->transfer.rx_buf = cas_ctl->tx_in_buf;
  864. cas_ctl->transfer.delay_usecs = 0;
  865. cas_ctl->transfer.cs_change = 0;
  866. cas_ctl->transfer.len = sizeof(struct mac_message);
  867. cas_ctl->msg.complete = ca8210_spi_transfer_complete;
  868. cas_ctl->msg.context = cas_ctl;
  869. spi_message_add_tail(
  870. &cas_ctl->transfer,
  871. &cas_ctl->msg
  872. );
  873. status = spi_async(spi, &cas_ctl->msg);
  874. if (status < 0) {
  875. dev_crit(
  876. &spi->dev,
  877. "status %d from spi_sync in write\n",
  878. status
  879. );
  880. }
  881. return status;
  882. }
  883. /**
  884. * ca8210_spi_exchange() - Exchange API/SAP commands with the radio
  885. * @buf: Octet array of command being sent downstream
  886. * @len: length of buf
  887. * @response: buffer for storing synchronous response
  888. * @device_ref: spi_device pointer for ca8210
  889. *
  890. * Effectively calls ca8210_spi_transfer to write buf[] to the spi, then for
  891. * synchronous commands waits for the corresponding response to be read from
  892. * the spi before returning. The response is written to the response parameter.
  893. *
  894. * Return: 0 or linux error code
  895. */
  896. static int ca8210_spi_exchange(
  897. const u8 *buf,
  898. size_t len,
  899. u8 *response,
  900. void *device_ref
  901. )
  902. {
  903. int status = 0;
  904. struct spi_device *spi = device_ref;
  905. struct ca8210_priv *priv = spi->dev.driver_data;
  906. long wait_remaining;
  907. if ((buf[0] & SPI_SYN) && response) { /* if sync wait for confirm */
  908. reinit_completion(&priv->sync_exchange_complete);
  909. priv->sync_command_response = response;
  910. }
  911. do {
  912. reinit_completion(&priv->spi_transfer_complete);
  913. status = ca8210_spi_transfer(priv->spi, buf, len);
  914. if (status) {
  915. dev_warn(
  916. &spi->dev,
  917. "spi write failed, returned %d\n",
  918. status
  919. );
  920. if (status == -EBUSY)
  921. continue;
  922. if (((buf[0] & SPI_SYN) && response))
  923. complete(&priv->sync_exchange_complete);
  924. goto cleanup;
  925. }
  926. wait_remaining = wait_for_completion_interruptible_timeout(
  927. &priv->spi_transfer_complete,
  928. msecs_to_jiffies(1000)
  929. );
  930. if (wait_remaining == -ERESTARTSYS) {
  931. status = -ERESTARTSYS;
  932. } else if (wait_remaining == 0) {
  933. dev_err(
  934. &spi->dev,
  935. "SPI downstream transfer timed out!\n"
  936. );
  937. status = -ETIME;
  938. goto cleanup;
  939. }
  940. } while (status < 0);
  941. if (!((buf[0] & SPI_SYN) && response))
  942. goto cleanup;
  943. wait_remaining = wait_for_completion_interruptible_timeout(
  944. &priv->sync_exchange_complete,
  945. msecs_to_jiffies(CA8210_SYNC_TIMEOUT)
  946. );
  947. if (wait_remaining == -ERESTARTSYS) {
  948. status = -ERESTARTSYS;
  949. } else if (wait_remaining == 0) {
  950. dev_err(
  951. &spi->dev,
  952. "Synchronous confirm timeout\n"
  953. );
  954. status = -ETIME;
  955. }
  956. cleanup:
  957. priv->sync_command_response = NULL;
  958. return status;
  959. }
  960. /**
  961. * ca8210_interrupt_handler() - Called when an irq is received from the ca8210
  962. * @irq: Id of the irq being handled
  963. * @dev_id: Pointer passed by the system, pointing to the ca8210's private data
  964. *
  965. * This function is called when the irq line from the ca8210 is asserted,
  966. * signifying that the ca8210 has a message to send upstream to us. Starts the
  967. * asynchronous spi read.
  968. *
  969. * Return: irq return code
  970. */
  971. static irqreturn_t ca8210_interrupt_handler(int irq, void *dev_id)
  972. {
  973. struct ca8210_priv *priv = dev_id;
  974. int status;
  975. dev_dbg(&priv->spi->dev, "irq: Interrupt occurred\n");
  976. do {
  977. status = ca8210_spi_transfer(priv->spi, NULL, 0);
  978. if (status && (status != -EBUSY)) {
  979. dev_warn(
  980. &priv->spi->dev,
  981. "spi read failed, returned %d\n",
  982. status
  983. );
  984. }
  985. } while (status == -EBUSY);
  986. return IRQ_HANDLED;
  987. }
  988. static int (*cascoda_api_downstream)(
  989. const u8 *buf,
  990. size_t len,
  991. u8 *response,
  992. void *device_ref
  993. ) = ca8210_spi_exchange;
  994. /* Cascoda API / 15.4 SAP Primitives */
  995. /**
  996. * tdme_setsfr_request_sync() - TDME_SETSFR_request/confirm according to API
  997. * @sfr_page: SFR Page
  998. * @sfr_address: SFR Address
  999. * @sfr_value: SFR Value
  1000. * @device_ref: Nondescript pointer to target device
  1001. *
  1002. * Return: 802.15.4 status code of TDME-SETSFR.confirm
  1003. */
  1004. static u8 tdme_setsfr_request_sync(
  1005. u8 sfr_page,
  1006. u8 sfr_address,
  1007. u8 sfr_value,
  1008. void *device_ref
  1009. )
  1010. {
  1011. int ret;
  1012. struct mac_message command, response;
  1013. struct spi_device *spi = device_ref;
  1014. command.command_id = SPI_TDME_SETSFR_REQUEST;
  1015. command.length = 3;
  1016. command.pdata.tdme_set_sfr_req.sfr_page = sfr_page;
  1017. command.pdata.tdme_set_sfr_req.sfr_address = sfr_address;
  1018. command.pdata.tdme_set_sfr_req.sfr_value = sfr_value;
  1019. response.command_id = SPI_IDLE;
  1020. ret = cascoda_api_downstream(
  1021. &command.command_id,
  1022. command.length + 2,
  1023. &response.command_id,
  1024. device_ref
  1025. );
  1026. if (ret) {
  1027. dev_crit(&spi->dev, "cascoda_api_downstream returned %d", ret);
  1028. return MAC_SYSTEM_ERROR;
  1029. }
  1030. if (response.command_id != SPI_TDME_SETSFR_CONFIRM) {
  1031. dev_crit(
  1032. &spi->dev,
  1033. "sync response to SPI_TDME_SETSFR_REQUEST was not SPI_TDME_SETSFR_CONFIRM, it was %d\n",
  1034. response.command_id
  1035. );
  1036. return MAC_SYSTEM_ERROR;
  1037. }
  1038. return response.pdata.tdme_set_sfr_cnf.status;
  1039. }
  1040. /**
  1041. * tdme_chipinit() - TDME Chip Register Default Initialisation Macro
  1042. * @device_ref: Nondescript pointer to target device
  1043. *
  1044. * Return: 802.15.4 status code of API calls
  1045. */
  1046. static u8 tdme_chipinit(void *device_ref)
  1047. {
  1048. u8 status = MAC_SUCCESS;
  1049. u8 sfr_address;
  1050. struct spi_device *spi = device_ref;
  1051. struct preamble_cfg_sfr pre_cfg_value = {
  1052. .timeout_symbols = 3,
  1053. .acquisition_symbols = 3,
  1054. .search_symbols = 1,
  1055. };
  1056. /* LNA Gain Settings */
  1057. status = tdme_setsfr_request_sync(
  1058. 1, (sfr_address = CA8210_SFR_LNAGX40),
  1059. LNAGX40_DEFAULT_GAIN, device_ref);
  1060. if (status)
  1061. goto finish;
  1062. status = tdme_setsfr_request_sync(
  1063. 1, (sfr_address = CA8210_SFR_LNAGX41),
  1064. LNAGX41_DEFAULT_GAIN, device_ref);
  1065. if (status)
  1066. goto finish;
  1067. status = tdme_setsfr_request_sync(
  1068. 1, (sfr_address = CA8210_SFR_LNAGX42),
  1069. LNAGX42_DEFAULT_GAIN, device_ref);
  1070. if (status)
  1071. goto finish;
  1072. status = tdme_setsfr_request_sync(
  1073. 1, (sfr_address = CA8210_SFR_LNAGX43),
  1074. LNAGX43_DEFAULT_GAIN, device_ref);
  1075. if (status)
  1076. goto finish;
  1077. status = tdme_setsfr_request_sync(
  1078. 1, (sfr_address = CA8210_SFR_LNAGX44),
  1079. LNAGX44_DEFAULT_GAIN, device_ref);
  1080. if (status)
  1081. goto finish;
  1082. status = tdme_setsfr_request_sync(
  1083. 1, (sfr_address = CA8210_SFR_LNAGX45),
  1084. LNAGX45_DEFAULT_GAIN, device_ref);
  1085. if (status)
  1086. goto finish;
  1087. status = tdme_setsfr_request_sync(
  1088. 1, (sfr_address = CA8210_SFR_LNAGX46),
  1089. LNAGX46_DEFAULT_GAIN, device_ref);
  1090. if (status)
  1091. goto finish;
  1092. status = tdme_setsfr_request_sync(
  1093. 1, (sfr_address = CA8210_SFR_LNAGX47),
  1094. LNAGX47_DEFAULT_GAIN, device_ref);
  1095. if (status)
  1096. goto finish;
  1097. /* Preamble Timing Config */
  1098. status = tdme_setsfr_request_sync(
  1099. 1, (sfr_address = CA8210_SFR_PRECFG),
  1100. *((u8 *)&pre_cfg_value), device_ref);
  1101. if (status)
  1102. goto finish;
  1103. /* Preamble Threshold High */
  1104. status = tdme_setsfr_request_sync(
  1105. 1, (sfr_address = CA8210_SFR_PTHRH),
  1106. PTHRH_DEFAULT_THRESHOLD, device_ref);
  1107. if (status)
  1108. goto finish;
  1109. /* Tx Output Power 8 dBm */
  1110. status = tdme_setsfr_request_sync(
  1111. 0, (sfr_address = CA8210_SFR_PACFGIB),
  1112. PACFGIB_DEFAULT_CURRENT, device_ref);
  1113. if (status)
  1114. goto finish;
  1115. finish:
  1116. if (status != MAC_SUCCESS) {
  1117. dev_err(
  1118. &spi->dev,
  1119. "failed to set sfr at %#03x, status = %#03x\n",
  1120. sfr_address,
  1121. status
  1122. );
  1123. }
  1124. return status;
  1125. }
  1126. /**
  1127. * tdme_channelinit() - TDME Channel Register Default Initialisation Macro (Tx)
  1128. * @channel: 802.15.4 channel to initialise chip for
  1129. * @device_ref: Nondescript pointer to target device
  1130. *
  1131. * Return: 802.15.4 status code of API calls
  1132. */
  1133. static u8 tdme_channelinit(u8 channel, void *device_ref)
  1134. {
  1135. /* Transceiver front-end local oscillator tx two-point calibration
  1136. * value. Tuned for the hardware.
  1137. */
  1138. u8 txcalval;
  1139. if (channel >= 25)
  1140. txcalval = 0xA7;
  1141. else if (channel >= 23)
  1142. txcalval = 0xA8;
  1143. else if (channel >= 22)
  1144. txcalval = 0xA9;
  1145. else if (channel >= 20)
  1146. txcalval = 0xAA;
  1147. else if (channel >= 17)
  1148. txcalval = 0xAB;
  1149. else if (channel >= 16)
  1150. txcalval = 0xAC;
  1151. else if (channel >= 14)
  1152. txcalval = 0xAD;
  1153. else if (channel >= 12)
  1154. txcalval = 0xAE;
  1155. else
  1156. txcalval = 0xAF;
  1157. return tdme_setsfr_request_sync(
  1158. 1,
  1159. CA8210_SFR_LOTXCAL,
  1160. txcalval,
  1161. device_ref
  1162. ); /* LO Tx Cal */
  1163. }
  1164. /**
  1165. * tdme_checkpibattribute() - Checks Attribute Values that are not checked in
  1166. * MAC
  1167. * @pib_attribute: Attribute Number
  1168. * @pib_attribute_length: Attribute length
  1169. * @pib_attribute_value: Pointer to Attribute Value
  1170. * @device_ref: Nondescript pointer to target device
  1171. *
  1172. * Return: 802.15.4 status code of checks
  1173. */
  1174. static u8 tdme_checkpibattribute(
  1175. u8 pib_attribute,
  1176. u8 pib_attribute_length,
  1177. const void *pib_attribute_value
  1178. )
  1179. {
  1180. u8 status = MAC_SUCCESS;
  1181. u8 value;
  1182. value = *((u8 *)pib_attribute_value);
  1183. switch (pib_attribute) {
  1184. /* PHY */
  1185. case PHY_TRANSMIT_POWER:
  1186. if (value > 0x3F)
  1187. status = MAC_INVALID_PARAMETER;
  1188. break;
  1189. case PHY_CCA_MODE:
  1190. if (value > 0x03)
  1191. status = MAC_INVALID_PARAMETER;
  1192. break;
  1193. /* MAC */
  1194. case MAC_BATT_LIFE_EXT_PERIODS:
  1195. if (value < 6 || value > 41)
  1196. status = MAC_INVALID_PARAMETER;
  1197. break;
  1198. case MAC_BEACON_PAYLOAD:
  1199. if (pib_attribute_length > MAX_BEACON_PAYLOAD_LENGTH)
  1200. status = MAC_INVALID_PARAMETER;
  1201. break;
  1202. case MAC_BEACON_PAYLOAD_LENGTH:
  1203. if (value > MAX_BEACON_PAYLOAD_LENGTH)
  1204. status = MAC_INVALID_PARAMETER;
  1205. break;
  1206. case MAC_BEACON_ORDER:
  1207. if (value > 15)
  1208. status = MAC_INVALID_PARAMETER;
  1209. break;
  1210. case MAC_MAX_BE:
  1211. if (value < 3 || value > 8)
  1212. status = MAC_INVALID_PARAMETER;
  1213. break;
  1214. case MAC_MAX_CSMA_BACKOFFS:
  1215. if (value > 5)
  1216. status = MAC_INVALID_PARAMETER;
  1217. break;
  1218. case MAC_MAX_FRAME_RETRIES:
  1219. if (value > 7)
  1220. status = MAC_INVALID_PARAMETER;
  1221. break;
  1222. case MAC_MIN_BE:
  1223. if (value > 8)
  1224. status = MAC_INVALID_PARAMETER;
  1225. break;
  1226. case MAC_RESPONSE_WAIT_TIME:
  1227. if (value < 2 || value > 64)
  1228. status = MAC_INVALID_PARAMETER;
  1229. break;
  1230. case MAC_SUPERFRAME_ORDER:
  1231. if (value > 15)
  1232. status = MAC_INVALID_PARAMETER;
  1233. break;
  1234. /* boolean */
  1235. case MAC_ASSOCIATED_PAN_COORD:
  1236. case MAC_ASSOCIATION_PERMIT:
  1237. case MAC_AUTO_REQUEST:
  1238. case MAC_BATT_LIFE_EXT:
  1239. case MAC_GTS_PERMIT:
  1240. case MAC_PROMISCUOUS_MODE:
  1241. case MAC_RX_ON_WHEN_IDLE:
  1242. case MAC_SECURITY_ENABLED:
  1243. if (value > 1)
  1244. status = MAC_INVALID_PARAMETER;
  1245. break;
  1246. /* MAC SEC */
  1247. case MAC_AUTO_REQUEST_SECURITY_LEVEL:
  1248. if (value > 7)
  1249. status = MAC_INVALID_PARAMETER;
  1250. break;
  1251. case MAC_AUTO_REQUEST_KEY_ID_MODE:
  1252. if (value > 3)
  1253. status = MAC_INVALID_PARAMETER;
  1254. break;
  1255. default:
  1256. break;
  1257. }
  1258. return status;
  1259. }
  1260. /**
  1261. * tdme_settxpower() - Sets the tx power for MLME_SET phyTransmitPower
  1262. * @txp: Transmit Power
  1263. * @device_ref: Nondescript pointer to target device
  1264. *
  1265. * Normalised to 802.15.4 Definition (6-bit, signed):
  1266. * Bit 7-6: not used
  1267. * Bit 5-0: tx power (-32 - +31 dB)
  1268. *
  1269. * Return: 802.15.4 status code of api calls
  1270. */
  1271. static u8 tdme_settxpower(u8 txp, void *device_ref)
  1272. {
  1273. u8 status;
  1274. s8 txp_val;
  1275. u8 txp_ext;
  1276. union pa_cfg_sfr pa_cfg_val;
  1277. /* extend from 6 to 8 bit */
  1278. txp_ext = 0x3F & txp;
  1279. if (txp_ext & 0x20)
  1280. txp_ext += 0xC0;
  1281. txp_val = (s8)txp_ext;
  1282. if (CA8210_MAC_MPW) {
  1283. if (txp_val > 0) {
  1284. /* 8 dBm: ptrim = 5, itrim = +3 => +4 dBm */
  1285. pa_cfg_val.bias_current_trim = 3;
  1286. pa_cfg_val.buffer_capacitor_trim = 5;
  1287. pa_cfg_val.boost = 1;
  1288. } else {
  1289. /* 0 dBm: ptrim = 7, itrim = +3 => -6 dBm */
  1290. pa_cfg_val.bias_current_trim = 3;
  1291. pa_cfg_val.buffer_capacitor_trim = 7;
  1292. pa_cfg_val.boost = 0;
  1293. }
  1294. /* write PACFG */
  1295. status = tdme_setsfr_request_sync(
  1296. 0,
  1297. CA8210_SFR_PACFG,
  1298. pa_cfg_val.paib,
  1299. device_ref
  1300. );
  1301. } else {
  1302. /* Look-Up Table for Setting Current and Frequency Trim values
  1303. * for desired Output Power
  1304. */
  1305. if (txp_val > 8) {
  1306. pa_cfg_val.paib = 0x3F;
  1307. } else if (txp_val == 8) {
  1308. pa_cfg_val.paib = 0x32;
  1309. } else if (txp_val == 7) {
  1310. pa_cfg_val.paib = 0x22;
  1311. } else if (txp_val == 6) {
  1312. pa_cfg_val.paib = 0x18;
  1313. } else if (txp_val == 5) {
  1314. pa_cfg_val.paib = 0x10;
  1315. } else if (txp_val == 4) {
  1316. pa_cfg_val.paib = 0x0C;
  1317. } else if (txp_val == 3) {
  1318. pa_cfg_val.paib = 0x08;
  1319. } else if (txp_val == 2) {
  1320. pa_cfg_val.paib = 0x05;
  1321. } else if (txp_val == 1) {
  1322. pa_cfg_val.paib = 0x03;
  1323. } else if (txp_val == 0) {
  1324. pa_cfg_val.paib = 0x01;
  1325. } else { /* < 0 */
  1326. pa_cfg_val.paib = 0x00;
  1327. }
  1328. /* write PACFGIB */
  1329. status = tdme_setsfr_request_sync(
  1330. 0,
  1331. CA8210_SFR_PACFGIB,
  1332. pa_cfg_val.paib,
  1333. device_ref
  1334. );
  1335. }
  1336. return status;
  1337. }
  1338. /**
  1339. * mcps_data_request() - mcps_data_request (Send Data) according to API Spec
  1340. * @src_addr_mode: Source Addressing Mode
  1341. * @dst_address_mode: Destination Addressing Mode
  1342. * @dst_pan_id: Destination PAN ID
  1343. * @dst_addr: Pointer to Destination Address
  1344. * @msdu_length: length of Data
  1345. * @msdu: Pointer to Data
  1346. * @msdu_handle: Handle of Data
  1347. * @tx_options: Tx Options Bit Field
  1348. * @security: Pointer to Security Structure or NULL
  1349. * @device_ref: Nondescript pointer to target device
  1350. *
  1351. * Return: 802.15.4 status code of action
  1352. */
  1353. static u8 mcps_data_request(
  1354. u8 src_addr_mode,
  1355. u8 dst_address_mode,
  1356. u16 dst_pan_id,
  1357. union macaddr *dst_addr,
  1358. u8 msdu_length,
  1359. u8 *msdu,
  1360. u8 msdu_handle,
  1361. u8 tx_options,
  1362. struct secspec *security,
  1363. void *device_ref
  1364. )
  1365. {
  1366. struct secspec *psec;
  1367. struct mac_message command;
  1368. command.command_id = SPI_MCPS_DATA_REQUEST;
  1369. command.pdata.data_req.src_addr_mode = src_addr_mode;
  1370. command.pdata.data_req.dst.mode = dst_address_mode;
  1371. if (dst_address_mode != MAC_MODE_NO_ADDR) {
  1372. command.pdata.data_req.dst.pan_id[0] = LS_BYTE(dst_pan_id);
  1373. command.pdata.data_req.dst.pan_id[1] = MS_BYTE(dst_pan_id);
  1374. if (dst_address_mode == MAC_MODE_SHORT_ADDR) {
  1375. command.pdata.data_req.dst.address[0] = LS_BYTE(
  1376. dst_addr->short_address
  1377. );
  1378. command.pdata.data_req.dst.address[1] = MS_BYTE(
  1379. dst_addr->short_address
  1380. );
  1381. } else { /* MAC_MODE_LONG_ADDR*/
  1382. memcpy(
  1383. command.pdata.data_req.dst.address,
  1384. dst_addr->ieee_address,
  1385. 8
  1386. );
  1387. }
  1388. }
  1389. command.pdata.data_req.msdu_length = msdu_length;
  1390. command.pdata.data_req.msdu_handle = msdu_handle;
  1391. command.pdata.data_req.tx_options = tx_options;
  1392. memcpy(command.pdata.data_req.msdu, msdu, msdu_length);
  1393. psec = (struct secspec *)(command.pdata.data_req.msdu + msdu_length);
  1394. command.length = sizeof(struct mcps_data_request_pset) -
  1395. MAX_DATA_SIZE + msdu_length;
  1396. if (!security || security->security_level == 0) {
  1397. psec->security_level = 0;
  1398. command.length += 1;
  1399. } else {
  1400. *psec = *security;
  1401. command.length += sizeof(struct secspec);
  1402. }
  1403. if (ca8210_spi_transfer(device_ref, &command.command_id,
  1404. command.length + 2))
  1405. return MAC_SYSTEM_ERROR;
  1406. return MAC_SUCCESS;
  1407. }
  1408. /**
  1409. * mlme_reset_request_sync() - MLME_RESET_request/confirm according to API Spec
  1410. * @set_default_pib: Set defaults in PIB
  1411. * @device_ref: Nondescript pointer to target device
  1412. *
  1413. * Return: 802.15.4 status code of MLME-RESET.confirm
  1414. */
  1415. static u8 mlme_reset_request_sync(
  1416. u8 set_default_pib,
  1417. void *device_ref
  1418. )
  1419. {
  1420. u8 status;
  1421. struct mac_message command, response;
  1422. struct spi_device *spi = device_ref;
  1423. command.command_id = SPI_MLME_RESET_REQUEST;
  1424. command.length = 1;
  1425. command.pdata.u8param = set_default_pib;
  1426. if (cascoda_api_downstream(
  1427. &command.command_id,
  1428. command.length + 2,
  1429. &response.command_id,
  1430. device_ref)) {
  1431. dev_err(&spi->dev, "cascoda_api_downstream failed\n");
  1432. return MAC_SYSTEM_ERROR;
  1433. }
  1434. if (response.command_id != SPI_MLME_RESET_CONFIRM)
  1435. return MAC_SYSTEM_ERROR;
  1436. status = response.pdata.status;
  1437. /* reset COORD Bit for Channel Filtering as Coordinator */
  1438. if (CA8210_MAC_WORKAROUNDS && set_default_pib && !status) {
  1439. status = tdme_setsfr_request_sync(
  1440. 0,
  1441. CA8210_SFR_MACCON,
  1442. 0,
  1443. device_ref
  1444. );
  1445. }
  1446. return status;
  1447. }
  1448. /**
  1449. * mlme_set_request_sync() - MLME_SET_request/confirm according to API Spec
  1450. * @pib_attribute: Attribute Number
  1451. * @pib_attribute_index: Index within Attribute if an Array
  1452. * @pib_attribute_length: Attribute length
  1453. * @pib_attribute_value: Pointer to Attribute Value
  1454. * @device_ref: Nondescript pointer to target device
  1455. *
  1456. * Return: 802.15.4 status code of MLME-SET.confirm
  1457. */
  1458. static u8 mlme_set_request_sync(
  1459. u8 pib_attribute,
  1460. u8 pib_attribute_index,
  1461. u8 pib_attribute_length,
  1462. const void *pib_attribute_value,
  1463. void *device_ref
  1464. )
  1465. {
  1466. u8 status;
  1467. struct mac_message command, response;
  1468. /* pre-check the validity of pib_attribute values that are not checked
  1469. * in MAC
  1470. */
  1471. if (tdme_checkpibattribute(
  1472. pib_attribute, pib_attribute_length, pib_attribute_value)) {
  1473. return MAC_INVALID_PARAMETER;
  1474. }
  1475. if (pib_attribute == PHY_CURRENT_CHANNEL) {
  1476. status = tdme_channelinit(
  1477. *((u8 *)pib_attribute_value),
  1478. device_ref
  1479. );
  1480. if (status)
  1481. return status;
  1482. }
  1483. if (pib_attribute == PHY_TRANSMIT_POWER) {
  1484. return tdme_settxpower(
  1485. *((u8 *)pib_attribute_value),
  1486. device_ref
  1487. );
  1488. }
  1489. command.command_id = SPI_MLME_SET_REQUEST;
  1490. command.length = sizeof(struct mlme_set_request_pset) -
  1491. MAX_ATTRIBUTE_SIZE + pib_attribute_length;
  1492. command.pdata.set_req.pib_attribute = pib_attribute;
  1493. command.pdata.set_req.pib_attribute_index = pib_attribute_index;
  1494. command.pdata.set_req.pib_attribute_length = pib_attribute_length;
  1495. memcpy(
  1496. command.pdata.set_req.pib_attribute_value,
  1497. pib_attribute_value,
  1498. pib_attribute_length
  1499. );
  1500. if (cascoda_api_downstream(
  1501. &command.command_id,
  1502. command.length + 2,
  1503. &response.command_id,
  1504. device_ref)) {
  1505. return MAC_SYSTEM_ERROR;
  1506. }
  1507. if (response.command_id != SPI_MLME_SET_CONFIRM)
  1508. return MAC_SYSTEM_ERROR;
  1509. return response.pdata.status;
  1510. }
  1511. /**
  1512. * hwme_set_request_sync() - HWME_SET_request/confirm according to API Spec
  1513. * @hw_attribute: Attribute Number
  1514. * @hw_attribute_length: Attribute length
  1515. * @hw_attribute_value: Pointer to Attribute Value
  1516. * @device_ref: Nondescript pointer to target device
  1517. *
  1518. * Return: 802.15.4 status code of HWME-SET.confirm
  1519. */
  1520. static u8 hwme_set_request_sync(
  1521. u8 hw_attribute,
  1522. u8 hw_attribute_length,
  1523. u8 *hw_attribute_value,
  1524. void *device_ref
  1525. )
  1526. {
  1527. struct mac_message command, response;
  1528. command.command_id = SPI_HWME_SET_REQUEST;
  1529. command.length = 2 + hw_attribute_length;
  1530. command.pdata.hwme_set_req.hw_attribute = hw_attribute;
  1531. command.pdata.hwme_set_req.hw_attribute_length = hw_attribute_length;
  1532. memcpy(
  1533. command.pdata.hwme_set_req.hw_attribute_value,
  1534. hw_attribute_value,
  1535. hw_attribute_length
  1536. );
  1537. if (cascoda_api_downstream(
  1538. &command.command_id,
  1539. command.length + 2,
  1540. &response.command_id,
  1541. device_ref)) {
  1542. return MAC_SYSTEM_ERROR;
  1543. }
  1544. if (response.command_id != SPI_HWME_SET_CONFIRM)
  1545. return MAC_SYSTEM_ERROR;
  1546. return response.pdata.hwme_set_cnf.status;
  1547. }
  1548. /**
  1549. * hwme_get_request_sync() - HWME_GET_request/confirm according to API Spec
  1550. * @hw_attribute: Attribute Number
  1551. * @hw_attribute_length: Attribute length
  1552. * @hw_attribute_value: Pointer to Attribute Value
  1553. * @device_ref: Nondescript pointer to target device
  1554. *
  1555. * Return: 802.15.4 status code of HWME-GET.confirm
  1556. */
  1557. static u8 hwme_get_request_sync(
  1558. u8 hw_attribute,
  1559. u8 *hw_attribute_length,
  1560. u8 *hw_attribute_value,
  1561. void *device_ref
  1562. )
  1563. {
  1564. struct mac_message command, response;
  1565. command.command_id = SPI_HWME_GET_REQUEST;
  1566. command.length = 1;
  1567. command.pdata.hwme_get_req.hw_attribute = hw_attribute;
  1568. if (cascoda_api_downstream(
  1569. &command.command_id,
  1570. command.length + 2,
  1571. &response.command_id,
  1572. device_ref)) {
  1573. return MAC_SYSTEM_ERROR;
  1574. }
  1575. if (response.command_id != SPI_HWME_GET_CONFIRM)
  1576. return MAC_SYSTEM_ERROR;
  1577. if (response.pdata.hwme_get_cnf.status == MAC_SUCCESS) {
  1578. *hw_attribute_length =
  1579. response.pdata.hwme_get_cnf.hw_attribute_length;
  1580. memcpy(
  1581. hw_attribute_value,
  1582. response.pdata.hwme_get_cnf.hw_attribute_value,
  1583. *hw_attribute_length
  1584. );
  1585. }
  1586. return response.pdata.hwme_get_cnf.status;
  1587. }
  1588. /* Network driver operation */
  1589. /**
  1590. * ca8210_async_xmit_complete() - Called to announce that an asynchronous
  1591. * transmission has finished
  1592. * @hw: ieee802154_hw of ca8210 that has finished exchange
  1593. * @msduhandle: Identifier of transmission that has completed
  1594. * @status: Returned 802.15.4 status code of the transmission
  1595. *
  1596. * Return: 0 or linux error code
  1597. */
  1598. static int ca8210_async_xmit_complete(
  1599. struct ieee802154_hw *hw,
  1600. u8 msduhandle,
  1601. u8 status)
  1602. {
  1603. struct ca8210_priv *priv = hw->priv;
  1604. if (priv->nextmsduhandle != msduhandle) {
  1605. dev_err(
  1606. &priv->spi->dev,
  1607. "Unexpected msdu_handle on data confirm, Expected %d, got %d\n",
  1608. priv->nextmsduhandle,
  1609. msduhandle
  1610. );
  1611. return -EIO;
  1612. }
  1613. priv->async_tx_pending = false;
  1614. priv->nextmsduhandle++;
  1615. if (status) {
  1616. dev_err(
  1617. &priv->spi->dev,
  1618. "Link transmission unsuccessful, status = %d\n",
  1619. status
  1620. );
  1621. if (status != MAC_TRANSACTION_OVERFLOW) {
  1622. ieee802154_wake_queue(priv->hw);
  1623. return 0;
  1624. }
  1625. }
  1626. ieee802154_xmit_complete(priv->hw, priv->tx_skb, true);
  1627. return 0;
  1628. }
  1629. /**
  1630. * ca8210_skb_rx() - Contructs a properly framed socket buffer from a received
  1631. * MCPS_DATA_indication
  1632. * @hw: ieee802154_hw that MCPS_DATA_indication was received by
  1633. * @len: length of MCPS_DATA_indication
  1634. * @data_ind: Octet array of MCPS_DATA_indication
  1635. *
  1636. * Called by the spi driver whenever a SAP command is received, this function
  1637. * will ascertain whether the command is of interest to the network driver and
  1638. * take necessary action.
  1639. *
  1640. * Return: 0 or linux error code
  1641. */
  1642. static int ca8210_skb_rx(
  1643. struct ieee802154_hw *hw,
  1644. size_t len,
  1645. u8 *data_ind
  1646. )
  1647. {
  1648. struct ieee802154_hdr hdr;
  1649. int msdulen;
  1650. int hlen;
  1651. u8 mpdulinkquality = data_ind[23];
  1652. struct sk_buff *skb;
  1653. struct ca8210_priv *priv = hw->priv;
  1654. /* Allocate mtu size buffer for every rx packet */
  1655. skb = dev_alloc_skb(IEEE802154_MTU + sizeof(hdr));
  1656. if (!skb)
  1657. return -ENOMEM;
  1658. skb_reserve(skb, sizeof(hdr));
  1659. msdulen = data_ind[22]; /* msdu_length */
  1660. if (msdulen > IEEE802154_MTU) {
  1661. dev_err(
  1662. &priv->spi->dev,
  1663. "received erroneously large msdu length!\n"
  1664. );
  1665. kfree_skb(skb);
  1666. return -EMSGSIZE;
  1667. }
  1668. dev_dbg(&priv->spi->dev, "skb buffer length = %d\n", msdulen);
  1669. if (priv->promiscuous)
  1670. goto copy_payload;
  1671. /* Populate hdr */
  1672. hdr.sec.level = data_ind[29 + msdulen];
  1673. dev_dbg(&priv->spi->dev, "security level: %#03x\n", hdr.sec.level);
  1674. if (hdr.sec.level > 0) {
  1675. hdr.sec.key_id_mode = data_ind[30 + msdulen];
  1676. memcpy(&hdr.sec.extended_src, &data_ind[31 + msdulen], 8);
  1677. hdr.sec.key_id = data_ind[39 + msdulen];
  1678. }
  1679. hdr.source.mode = data_ind[0];
  1680. dev_dbg(&priv->spi->dev, "srcAddrMode: %#03x\n", hdr.source.mode);
  1681. hdr.source.pan_id = *(u16 *)&data_ind[1];
  1682. dev_dbg(&priv->spi->dev, "srcPanId: %#06x\n", hdr.source.pan_id);
  1683. memcpy(&hdr.source.extended_addr, &data_ind[3], 8);
  1684. hdr.dest.mode = data_ind[11];
  1685. dev_dbg(&priv->spi->dev, "dstAddrMode: %#03x\n", hdr.dest.mode);
  1686. hdr.dest.pan_id = *(u16 *)&data_ind[12];
  1687. dev_dbg(&priv->spi->dev, "dstPanId: %#06x\n", hdr.dest.pan_id);
  1688. memcpy(&hdr.dest.extended_addr, &data_ind[14], 8);
  1689. /* Fill in FC implicitly */
  1690. hdr.fc.type = 1; /* Data frame */
  1691. if (hdr.sec.level)
  1692. hdr.fc.security_enabled = 1;
  1693. else
  1694. hdr.fc.security_enabled = 0;
  1695. if (data_ind[1] != data_ind[12] || data_ind[2] != data_ind[13])
  1696. hdr.fc.intra_pan = 1;
  1697. else
  1698. hdr.fc.intra_pan = 0;
  1699. hdr.fc.dest_addr_mode = hdr.dest.mode;
  1700. hdr.fc.source_addr_mode = hdr.source.mode;
  1701. /* Add hdr to front of buffer */
  1702. hlen = ieee802154_hdr_push(skb, &hdr);
  1703. if (hlen < 0) {
  1704. dev_crit(&priv->spi->dev, "failed to push mac hdr onto skb!\n");
  1705. kfree_skb(skb);
  1706. return hlen;
  1707. }
  1708. skb_reset_mac_header(skb);
  1709. skb->mac_len = hlen;
  1710. copy_payload:
  1711. /* Add <msdulen> bytes of space to the back of the buffer */
  1712. /* Copy msdu to skb */
  1713. skb_put_data(skb, &data_ind[29], msdulen);
  1714. ieee802154_rx_irqsafe(hw, skb, mpdulinkquality);
  1715. return 0;
  1716. }
  1717. /**
  1718. * ca8210_net_rx() - Acts upon received SAP commands relevant to the network
  1719. * driver
  1720. * @hw: ieee802154_hw that command was received by
  1721. * @command: Octet array of received command
  1722. * @len: length of the received command
  1723. *
  1724. * Called by the spi driver whenever a SAP command is received, this function
  1725. * will ascertain whether the command is of interest to the network driver and
  1726. * take necessary action.
  1727. *
  1728. * Return: 0 or linux error code
  1729. */
  1730. static int ca8210_net_rx(struct ieee802154_hw *hw, u8 *command, size_t len)
  1731. {
  1732. struct ca8210_priv *priv = hw->priv;
  1733. unsigned long flags;
  1734. u8 status;
  1735. dev_dbg(&priv->spi->dev, "%s: CmdID = %d\n", __func__, command[0]);
  1736. if (command[0] == SPI_MCPS_DATA_INDICATION) {
  1737. /* Received data */
  1738. spin_lock_irqsave(&priv->lock, flags);
  1739. if (command[26] == priv->last_dsn) {
  1740. dev_dbg(
  1741. &priv->spi->dev,
  1742. "DSN %d resend received, ignoring...\n",
  1743. command[26]
  1744. );
  1745. spin_unlock_irqrestore(&priv->lock, flags);
  1746. return 0;
  1747. }
  1748. priv->last_dsn = command[26];
  1749. spin_unlock_irqrestore(&priv->lock, flags);
  1750. return ca8210_skb_rx(hw, len - 2, command + 2);
  1751. } else if (command[0] == SPI_MCPS_DATA_CONFIRM) {
  1752. status = command[3];
  1753. if (priv->async_tx_pending) {
  1754. return ca8210_async_xmit_complete(
  1755. hw,
  1756. command[2],
  1757. status
  1758. );
  1759. }
  1760. }
  1761. return 0;
  1762. }
  1763. /**
  1764. * ca8210_skb_tx() - Transmits a given socket buffer using the ca8210
  1765. * @skb: Socket buffer to transmit
  1766. * @msduhandle: Data identifier to pass to the 802.15.4 MAC
  1767. * @priv: Pointer to private data section of target ca8210
  1768. *
  1769. * Return: 0 or linux error code
  1770. */
  1771. static int ca8210_skb_tx(
  1772. struct sk_buff *skb,
  1773. u8 msduhandle,
  1774. struct ca8210_priv *priv
  1775. )
  1776. {
  1777. int status;
  1778. struct ieee802154_hdr header = { };
  1779. struct secspec secspec;
  1780. unsigned int mac_len;
  1781. dev_dbg(&priv->spi->dev, "%s called\n", __func__);
  1782. /* Get addressing info from skb - ieee802154 layer creates a full
  1783. * packet
  1784. */
  1785. mac_len = ieee802154_hdr_peek_addrs(skb, &header);
  1786. secspec.security_level = header.sec.level;
  1787. secspec.key_id_mode = header.sec.key_id_mode;
  1788. if (secspec.key_id_mode == 2)
  1789. memcpy(secspec.key_source, &header.sec.short_src, 4);
  1790. else if (secspec.key_id_mode == 3)
  1791. memcpy(secspec.key_source, &header.sec.extended_src, 8);
  1792. secspec.key_index = header.sec.key_id;
  1793. /* Pass to Cascoda API */
  1794. status = mcps_data_request(
  1795. header.source.mode,
  1796. header.dest.mode,
  1797. header.dest.pan_id,
  1798. (union macaddr *)&header.dest.extended_addr,
  1799. skb->len - mac_len,
  1800. &skb->data[mac_len],
  1801. msduhandle,
  1802. header.fc.ack_request,
  1803. &secspec,
  1804. priv->spi
  1805. );
  1806. return link_to_linux_err(status);
  1807. }
  1808. /**
  1809. * ca8210_start() - Starts the network driver
  1810. * @hw: ieee802154_hw of ca8210 being started
  1811. *
  1812. * Return: 0 or linux error code
  1813. */
  1814. static int ca8210_start(struct ieee802154_hw *hw)
  1815. {
  1816. int status;
  1817. u8 rx_on_when_idle;
  1818. u8 lqi_threshold = 0;
  1819. struct ca8210_priv *priv = hw->priv;
  1820. priv->last_dsn = -1;
  1821. /* Turn receiver on when idle for now just to test rx */
  1822. rx_on_when_idle = 1;
  1823. status = mlme_set_request_sync(
  1824. MAC_RX_ON_WHEN_IDLE,
  1825. 0,
  1826. 1,
  1827. &rx_on_when_idle,
  1828. priv->spi
  1829. );
  1830. if (status) {
  1831. dev_crit(
  1832. &priv->spi->dev,
  1833. "Setting rx_on_when_idle failed, status = %d\n",
  1834. status
  1835. );
  1836. return link_to_linux_err(status);
  1837. }
  1838. status = hwme_set_request_sync(
  1839. HWME_LQILIMIT,
  1840. 1,
  1841. &lqi_threshold,
  1842. priv->spi
  1843. );
  1844. if (status) {
  1845. dev_crit(
  1846. &priv->spi->dev,
  1847. "Setting lqilimit failed, status = %d\n",
  1848. status
  1849. );
  1850. return link_to_linux_err(status);
  1851. }
  1852. return 0;
  1853. }
  1854. /**
  1855. * ca8210_stop() - Stops the network driver
  1856. * @hw: ieee802154_hw of ca8210 being stopped
  1857. *
  1858. * Return: 0 or linux error code
  1859. */
  1860. static void ca8210_stop(struct ieee802154_hw *hw)
  1861. {
  1862. }
  1863. /**
  1864. * ca8210_xmit_async() - Asynchronously transmits a given socket buffer using
  1865. * the ca8210
  1866. * @hw: ieee802154_hw of ca8210 to transmit from
  1867. * @skb: Socket buffer to transmit
  1868. *
  1869. * Return: 0 or linux error code
  1870. */
  1871. static int ca8210_xmit_async(struct ieee802154_hw *hw, struct sk_buff *skb)
  1872. {
  1873. struct ca8210_priv *priv = hw->priv;
  1874. int status;
  1875. dev_dbg(&priv->spi->dev, "calling %s\n", __func__);
  1876. priv->tx_skb = skb;
  1877. priv->async_tx_pending = true;
  1878. status = ca8210_skb_tx(skb, priv->nextmsduhandle, priv);
  1879. return status;
  1880. }
  1881. /**
  1882. * ca8210_get_ed() - Returns the measured energy on the current channel at this
  1883. * instant in time
  1884. * @hw: ieee802154_hw of target ca8210
  1885. * @level: Measured Energy Detect level
  1886. *
  1887. * Return: 0 or linux error code
  1888. */
  1889. static int ca8210_get_ed(struct ieee802154_hw *hw, u8 *level)
  1890. {
  1891. u8 lenvar;
  1892. struct ca8210_priv *priv = hw->priv;
  1893. return link_to_linux_err(
  1894. hwme_get_request_sync(HWME_EDVALUE, &lenvar, level, priv->spi)
  1895. );
  1896. }
  1897. /**
  1898. * ca8210_set_channel() - Sets the current operating 802.15.4 channel of the
  1899. * ca8210
  1900. * @hw: ieee802154_hw of target ca8210
  1901. * @page: Channel page to set
  1902. * @channel: Channel number to set
  1903. *
  1904. * Return: 0 or linux error code
  1905. */
  1906. static int ca8210_set_channel(
  1907. struct ieee802154_hw *hw,
  1908. u8 page,
  1909. u8 channel
  1910. )
  1911. {
  1912. u8 status;
  1913. struct ca8210_priv *priv = hw->priv;
  1914. status = mlme_set_request_sync(
  1915. PHY_CURRENT_CHANNEL,
  1916. 0,
  1917. 1,
  1918. &channel,
  1919. priv->spi
  1920. );
  1921. if (status) {
  1922. dev_err(
  1923. &priv->spi->dev,
  1924. "error setting channel, MLME-SET.confirm status = %d\n",
  1925. status
  1926. );
  1927. }
  1928. return link_to_linux_err(status);
  1929. }
  1930. /**
  1931. * ca8210_set_hw_addr_filt() - Sets the address filtering parameters of the
  1932. * ca8210
  1933. * @hw: ieee802154_hw of target ca8210
  1934. * @filt: Filtering parameters
  1935. * @changed: Bitmap representing which parameters to change
  1936. *
  1937. * Effectively just sets the actual addressing information identifying this node
  1938. * as all filtering is performed by the ca8210 as detailed in the IEEE 802.15.4
  1939. * 2006 specification.
  1940. *
  1941. * Return: 0 or linux error code
  1942. */
  1943. static int ca8210_set_hw_addr_filt(
  1944. struct ieee802154_hw *hw,
  1945. struct ieee802154_hw_addr_filt *filt,
  1946. unsigned long changed
  1947. )
  1948. {
  1949. u8 status = 0;
  1950. struct ca8210_priv *priv = hw->priv;
  1951. if (changed & IEEE802154_AFILT_PANID_CHANGED) {
  1952. status = mlme_set_request_sync(
  1953. MAC_PAN_ID,
  1954. 0,
  1955. 2,
  1956. &filt->pan_id, priv->spi
  1957. );
  1958. if (status) {
  1959. dev_err(
  1960. &priv->spi->dev,
  1961. "error setting pan id, MLME-SET.confirm status = %d",
  1962. status
  1963. );
  1964. return link_to_linux_err(status);
  1965. }
  1966. }
  1967. if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
  1968. status = mlme_set_request_sync(
  1969. MAC_SHORT_ADDRESS,
  1970. 0,
  1971. 2,
  1972. &filt->short_addr, priv->spi
  1973. );
  1974. if (status) {
  1975. dev_err(
  1976. &priv->spi->dev,
  1977. "error setting short address, MLME-SET.confirm status = %d",
  1978. status
  1979. );
  1980. return link_to_linux_err(status);
  1981. }
  1982. }
  1983. if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
  1984. status = mlme_set_request_sync(
  1985. NS_IEEE_ADDRESS,
  1986. 0,
  1987. 8,
  1988. &filt->ieee_addr,
  1989. priv->spi
  1990. );
  1991. if (status) {
  1992. dev_err(
  1993. &priv->spi->dev,
  1994. "error setting ieee address, MLME-SET.confirm status = %d",
  1995. status
  1996. );
  1997. return link_to_linux_err(status);
  1998. }
  1999. }
  2000. /* TODO: Should use MLME_START to set coord bit? */
  2001. return 0;
  2002. }
  2003. /**
  2004. * ca8210_set_tx_power() - Sets the transmit power of the ca8210
  2005. * @hw: ieee802154_hw of target ca8210
  2006. * @mbm: Transmit power in mBm (dBm*100)
  2007. *
  2008. * Return: 0 or linux error code
  2009. */
  2010. static int ca8210_set_tx_power(struct ieee802154_hw *hw, s32 mbm)
  2011. {
  2012. struct ca8210_priv *priv = hw->priv;
  2013. mbm /= 100;
  2014. return link_to_linux_err(
  2015. mlme_set_request_sync(PHY_TRANSMIT_POWER, 0, 1, &mbm, priv->spi)
  2016. );
  2017. }
  2018. /**
  2019. * ca8210_set_cca_mode() - Sets the clear channel assessment mode of the ca8210
  2020. * @hw: ieee802154_hw of target ca8210
  2021. * @cca: CCA mode to set
  2022. *
  2023. * Return: 0 or linux error code
  2024. */
  2025. static int ca8210_set_cca_mode(
  2026. struct ieee802154_hw *hw,
  2027. const struct wpan_phy_cca *cca
  2028. )
  2029. {
  2030. u8 status;
  2031. u8 cca_mode;
  2032. struct ca8210_priv *priv = hw->priv;
  2033. cca_mode = cca->mode & 3;
  2034. if (cca_mode == 3 && cca->opt == NL802154_CCA_OPT_ENERGY_CARRIER_OR) {
  2035. /* cca_mode 0 == CS OR ED, 3 == CS AND ED */
  2036. cca_mode = 0;
  2037. }
  2038. status = mlme_set_request_sync(
  2039. PHY_CCA_MODE,
  2040. 0,
  2041. 1,
  2042. &cca_mode,
  2043. priv->spi
  2044. );
  2045. if (status) {
  2046. dev_err(
  2047. &priv->spi->dev,
  2048. "error setting cca mode, MLME-SET.confirm status = %d",
  2049. status
  2050. );
  2051. }
  2052. return link_to_linux_err(status);
  2053. }
  2054. /**
  2055. * ca8210_set_cca_ed_level() - Sets the CCA ED level of the ca8210
  2056. * @hw: ieee802154_hw of target ca8210
  2057. * @level: ED level to set (in mbm)
  2058. *
  2059. * Sets the minimum threshold of measured energy above which the ca8210 will
  2060. * back off and retry a transmission.
  2061. *
  2062. * Return: 0 or linux error code
  2063. */
  2064. static int ca8210_set_cca_ed_level(struct ieee802154_hw *hw, s32 level)
  2065. {
  2066. u8 status;
  2067. u8 ed_threshold = (level / 100) * 2 + 256;
  2068. struct ca8210_priv *priv = hw->priv;
  2069. status = hwme_set_request_sync(
  2070. HWME_EDTHRESHOLD,
  2071. 1,
  2072. &ed_threshold,
  2073. priv->spi
  2074. );
  2075. if (status) {
  2076. dev_err(
  2077. &priv->spi->dev,
  2078. "error setting ed threshold, HWME-SET.confirm status = %d",
  2079. status
  2080. );
  2081. }
  2082. return link_to_linux_err(status);
  2083. }
  2084. /**
  2085. * ca8210_set_csma_params() - Sets the CSMA parameters of the ca8210
  2086. * @hw: ieee802154_hw of target ca8210
  2087. * @min_be: Minimum backoff exponent when backing off a transmission
  2088. * @max_be: Maximum backoff exponent when backing off a transmission
  2089. * @retries: Number of times to retry after backing off
  2090. *
  2091. * Return: 0 or linux error code
  2092. */
  2093. static int ca8210_set_csma_params(
  2094. struct ieee802154_hw *hw,
  2095. u8 min_be,
  2096. u8 max_be,
  2097. u8 retries
  2098. )
  2099. {
  2100. u8 status;
  2101. struct ca8210_priv *priv = hw->priv;
  2102. status = mlme_set_request_sync(MAC_MIN_BE, 0, 1, &min_be, priv->spi);
  2103. if (status) {
  2104. dev_err(
  2105. &priv->spi->dev,
  2106. "error setting min be, MLME-SET.confirm status = %d",
  2107. status
  2108. );
  2109. return link_to_linux_err(status);
  2110. }
  2111. status = mlme_set_request_sync(MAC_MAX_BE, 0, 1, &max_be, priv->spi);
  2112. if (status) {
  2113. dev_err(
  2114. &priv->spi->dev,
  2115. "error setting max be, MLME-SET.confirm status = %d",
  2116. status
  2117. );
  2118. return link_to_linux_err(status);
  2119. }
  2120. status = mlme_set_request_sync(
  2121. MAC_MAX_CSMA_BACKOFFS,
  2122. 0,
  2123. 1,
  2124. &retries,
  2125. priv->spi
  2126. );
  2127. if (status) {
  2128. dev_err(
  2129. &priv->spi->dev,
  2130. "error setting max csma backoffs, MLME-SET.confirm status = %d",
  2131. status
  2132. );
  2133. }
  2134. return link_to_linux_err(status);
  2135. }
  2136. /**
  2137. * ca8210_set_frame_retries() - Sets the maximum frame retries of the ca8210
  2138. * @hw: ieee802154_hw of target ca8210
  2139. * @retries: Number of retries
  2140. *
  2141. * Sets the number of times to retry a transmission if no acknowledgment was
  2142. * was received from the other end when one was requested.
  2143. *
  2144. * Return: 0 or linux error code
  2145. */
  2146. static int ca8210_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
  2147. {
  2148. u8 status;
  2149. struct ca8210_priv *priv = hw->priv;
  2150. status = mlme_set_request_sync(
  2151. MAC_MAX_FRAME_RETRIES,
  2152. 0,
  2153. 1,
  2154. &retries,
  2155. priv->spi
  2156. );
  2157. if (status) {
  2158. dev_err(
  2159. &priv->spi->dev,
  2160. "error setting frame retries, MLME-SET.confirm status = %d",
  2161. status
  2162. );
  2163. }
  2164. return link_to_linux_err(status);
  2165. }
  2166. static int ca8210_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
  2167. {
  2168. u8 status;
  2169. struct ca8210_priv *priv = hw->priv;
  2170. status = mlme_set_request_sync(
  2171. MAC_PROMISCUOUS_MODE,
  2172. 0,
  2173. 1,
  2174. (const void *)&on,
  2175. priv->spi
  2176. );
  2177. if (status) {
  2178. dev_err(
  2179. &priv->spi->dev,
  2180. "error setting promiscuous mode, MLME-SET.confirm status = %d",
  2181. status
  2182. );
  2183. } else {
  2184. priv->promiscuous = on;
  2185. }
  2186. return link_to_linux_err(status);
  2187. }
  2188. static const struct ieee802154_ops ca8210_phy_ops = {
  2189. .start = ca8210_start,
  2190. .stop = ca8210_stop,
  2191. .xmit_async = ca8210_xmit_async,
  2192. .ed = ca8210_get_ed,
  2193. .set_channel = ca8210_set_channel,
  2194. .set_hw_addr_filt = ca8210_set_hw_addr_filt,
  2195. .set_txpower = ca8210_set_tx_power,
  2196. .set_cca_mode = ca8210_set_cca_mode,
  2197. .set_cca_ed_level = ca8210_set_cca_ed_level,
  2198. .set_csma_params = ca8210_set_csma_params,
  2199. .set_frame_retries = ca8210_set_frame_retries,
  2200. .set_promiscuous_mode = ca8210_set_promiscuous_mode
  2201. };
  2202. /* Test/EVBME Interface */
  2203. /**
  2204. * ca8210_test_int_open() - Opens the test interface to the userspace
  2205. * @inodp: inode representation of file interface
  2206. * @filp: file interface
  2207. *
  2208. * Return: 0 or linux error code
  2209. */
  2210. static int ca8210_test_int_open(struct inode *inodp, struct file *filp)
  2211. {
  2212. struct ca8210_priv *priv = inodp->i_private;
  2213. filp->private_data = priv;
  2214. return 0;
  2215. }
  2216. /**
  2217. * ca8210_test_check_upstream() - Checks a command received from the upstream
  2218. * testing interface for required action
  2219. * @buf: Buffer containing command to check
  2220. * @device_ref: Nondescript pointer to target device
  2221. *
  2222. * Return: 0 or linux error code
  2223. */
  2224. static int ca8210_test_check_upstream(u8 *buf, void *device_ref)
  2225. {
  2226. int ret;
  2227. u8 response[CA8210_SPI_BUF_SIZE];
  2228. if (buf[0] == SPI_MLME_SET_REQUEST) {
  2229. ret = tdme_checkpibattribute(buf[2], buf[4], buf + 5);
  2230. if (ret) {
  2231. response[0] = SPI_MLME_SET_CONFIRM;
  2232. response[1] = 3;
  2233. response[2] = MAC_INVALID_PARAMETER;
  2234. response[3] = buf[2];
  2235. response[4] = buf[3];
  2236. if (cascoda_api_upstream)
  2237. cascoda_api_upstream(response, 5, device_ref);
  2238. return ret;
  2239. }
  2240. }
  2241. if (buf[0] == SPI_MLME_ASSOCIATE_REQUEST) {
  2242. return tdme_channelinit(buf[2], device_ref);
  2243. } else if (buf[0] == SPI_MLME_START_REQUEST) {
  2244. return tdme_channelinit(buf[4], device_ref);
  2245. } else if (
  2246. (buf[0] == SPI_MLME_SET_REQUEST) &&
  2247. (buf[2] == PHY_CURRENT_CHANNEL)
  2248. ) {
  2249. return tdme_channelinit(buf[5], device_ref);
  2250. } else if (
  2251. (buf[0] == SPI_TDME_SET_REQUEST) &&
  2252. (buf[2] == TDME_CHANNEL)
  2253. ) {
  2254. return tdme_channelinit(buf[4], device_ref);
  2255. } else if (
  2256. (CA8210_MAC_WORKAROUNDS) &&
  2257. (buf[0] == SPI_MLME_RESET_REQUEST) &&
  2258. (buf[2] == 1)
  2259. ) {
  2260. /* reset COORD Bit for Channel Filtering as Coordinator */
  2261. return tdme_setsfr_request_sync(
  2262. 0,
  2263. CA8210_SFR_MACCON,
  2264. 0,
  2265. device_ref
  2266. );
  2267. }
  2268. return 0;
  2269. } /* End of EVBMECheckSerialCommand() */
  2270. /**
  2271. * ca8210_test_int_user_write() - Called by a process in userspace to send a
  2272. * message to the ca8210 drivers
  2273. * @filp: file interface
  2274. * @in_buf: Buffer containing message to write
  2275. * @len: length of message
  2276. * @off: file offset
  2277. *
  2278. * Return: 0 or linux error code
  2279. */
  2280. static ssize_t ca8210_test_int_user_write(
  2281. struct file *filp,
  2282. const char __user *in_buf,
  2283. size_t len,
  2284. loff_t *off
  2285. )
  2286. {
  2287. int ret;
  2288. struct ca8210_priv *priv = filp->private_data;
  2289. u8 command[CA8210_SPI_BUF_SIZE];
  2290. memset(command, SPI_IDLE, 6);
  2291. if (len > CA8210_SPI_BUF_SIZE || len < 2) {
  2292. dev_warn(
  2293. &priv->spi->dev,
  2294. "userspace requested erroneous write length (%zu)\n",
  2295. len
  2296. );
  2297. return -EBADE;
  2298. }
  2299. ret = copy_from_user(command, in_buf, len);
  2300. if (ret) {
  2301. dev_err(
  2302. &priv->spi->dev,
  2303. "%d bytes could not be copied from userspace\n",
  2304. ret
  2305. );
  2306. return -EIO;
  2307. }
  2308. if (len != command[1] + 2) {
  2309. dev_err(
  2310. &priv->spi->dev,
  2311. "write len does not match packet length field\n"
  2312. );
  2313. return -EBADE;
  2314. }
  2315. ret = ca8210_test_check_upstream(command, priv->spi);
  2316. if (ret == 0) {
  2317. ret = ca8210_spi_exchange(
  2318. command,
  2319. command[1] + 2,
  2320. NULL,
  2321. priv->spi
  2322. );
  2323. if (ret < 0) {
  2324. /* effectively 0 bytes were written successfully */
  2325. dev_err(
  2326. &priv->spi->dev,
  2327. "spi exchange failed\n"
  2328. );
  2329. return ret;
  2330. }
  2331. if (command[0] & SPI_SYN)
  2332. priv->sync_down++;
  2333. }
  2334. return len;
  2335. }
  2336. /**
  2337. * ca8210_test_int_user_read() - Called by a process in userspace to read a
  2338. * message from the ca8210 drivers
  2339. * @filp: file interface
  2340. * @buf: Buffer to write message to
  2341. * @len: length of message to read (ignored)
  2342. * @offp: file offset
  2343. *
  2344. * If the O_NONBLOCK flag was set when opening the file then this function will
  2345. * not block, i.e. it will return if the fifo is empty. Otherwise the function
  2346. * will block, i.e. wait until new data arrives.
  2347. *
  2348. * Return: number of bytes read
  2349. */
  2350. static ssize_t ca8210_test_int_user_read(
  2351. struct file *filp,
  2352. char __user *buf,
  2353. size_t len,
  2354. loff_t *offp
  2355. )
  2356. {
  2357. int i, cmdlen;
  2358. struct ca8210_priv *priv = filp->private_data;
  2359. unsigned char *fifo_buffer;
  2360. unsigned long bytes_not_copied;
  2361. if (filp->f_flags & O_NONBLOCK) {
  2362. /* Non-blocking mode */
  2363. if (kfifo_is_empty(&priv->test.up_fifo))
  2364. return 0;
  2365. } else {
  2366. /* Blocking mode */
  2367. wait_event_interruptible(
  2368. priv->test.readq,
  2369. !kfifo_is_empty(&priv->test.up_fifo)
  2370. );
  2371. }
  2372. if (kfifo_out(&priv->test.up_fifo, &fifo_buffer, 4) != 4) {
  2373. dev_err(
  2374. &priv->spi->dev,
  2375. "test_interface: Wrong number of elements popped from upstream fifo\n"
  2376. );
  2377. return 0;
  2378. }
  2379. cmdlen = fifo_buffer[1];
  2380. bytes_not_copied = cmdlen + 2;
  2381. bytes_not_copied = copy_to_user(buf, fifo_buffer, bytes_not_copied);
  2382. if (bytes_not_copied > 0) {
  2383. dev_err(
  2384. &priv->spi->dev,
  2385. "%lu bytes could not be copied to user space!\n",
  2386. bytes_not_copied
  2387. );
  2388. }
  2389. dev_dbg(&priv->spi->dev, "test_interface: Cmd len = %d\n", cmdlen);
  2390. dev_dbg(&priv->spi->dev, "test_interface: Read\n");
  2391. for (i = 0; i < cmdlen + 2; i++)
  2392. dev_dbg(&priv->spi->dev, "%#03x\n", fifo_buffer[i]);
  2393. kfree(fifo_buffer);
  2394. return cmdlen + 2;
  2395. }
  2396. /**
  2397. * ca8210_test_int_ioctl() - Called by a process in userspace to enact an
  2398. * arbitrary action
  2399. * @filp: file interface
  2400. * @ioctl_num: which action to enact
  2401. * @ioctl_param: arbitrary parameter for the action
  2402. *
  2403. * Return: status
  2404. */
  2405. static long ca8210_test_int_ioctl(
  2406. struct file *filp,
  2407. unsigned int ioctl_num,
  2408. unsigned long ioctl_param
  2409. )
  2410. {
  2411. struct ca8210_priv *priv = filp->private_data;
  2412. switch (ioctl_num) {
  2413. case CA8210_IOCTL_HARD_RESET:
  2414. ca8210_reset_send(priv->spi, ioctl_param);
  2415. break;
  2416. default:
  2417. break;
  2418. }
  2419. return 0;
  2420. }
  2421. /**
  2422. * ca8210_test_int_poll() - Called by a process in userspace to determine which
  2423. * actions are currently possible for the file
  2424. * @filp: file interface
  2425. * @ptable: poll table
  2426. *
  2427. * Return: set of poll return flags
  2428. */
  2429. static __poll_t ca8210_test_int_poll(
  2430. struct file *filp,
  2431. struct poll_table_struct *ptable
  2432. )
  2433. {
  2434. __poll_t return_flags = 0;
  2435. struct ca8210_priv *priv = filp->private_data;
  2436. poll_wait(filp, &priv->test.readq, ptable);
  2437. if (!kfifo_is_empty(&priv->test.up_fifo))
  2438. return_flags |= (EPOLLIN | EPOLLRDNORM);
  2439. if (wait_event_interruptible(
  2440. priv->test.readq,
  2441. !kfifo_is_empty(&priv->test.up_fifo))) {
  2442. return EPOLLERR;
  2443. }
  2444. return return_flags;
  2445. }
  2446. static const struct file_operations test_int_fops = {
  2447. .read = ca8210_test_int_user_read,
  2448. .write = ca8210_test_int_user_write,
  2449. .open = ca8210_test_int_open,
  2450. .release = NULL,
  2451. .unlocked_ioctl = ca8210_test_int_ioctl,
  2452. .poll = ca8210_test_int_poll
  2453. };
  2454. /* Init/Deinit */
  2455. /**
  2456. * ca8210_get_platform_data() - Populate a ca8210_platform_data object
  2457. * @spi_device: Pointer to ca8210 spi device object to get data for
  2458. * @pdata: Pointer to ca8210_platform_data object to populate
  2459. *
  2460. * Return: 0 or linux error code
  2461. */
  2462. static int ca8210_get_platform_data(
  2463. struct spi_device *spi_device,
  2464. struct ca8210_platform_data *pdata
  2465. )
  2466. {
  2467. int ret = 0;
  2468. if (!spi_device->dev.of_node)
  2469. return -EINVAL;
  2470. pdata->extclockenable = of_property_read_bool(
  2471. spi_device->dev.of_node,
  2472. "extclock-enable"
  2473. );
  2474. if (pdata->extclockenable) {
  2475. ret = of_property_read_u32(
  2476. spi_device->dev.of_node,
  2477. "extclock-freq",
  2478. &pdata->extclockfreq
  2479. );
  2480. if (ret < 0)
  2481. return ret;
  2482. ret = of_property_read_u32(
  2483. spi_device->dev.of_node,
  2484. "extclock-gpio",
  2485. &pdata->extclockgpio
  2486. );
  2487. }
  2488. return ret;
  2489. }
  2490. /**
  2491. * ca8210_config_extern_clk() - Configure the external clock provided by the
  2492. * ca8210
  2493. * @pdata: Pointer to ca8210_platform_data containing clock parameters
  2494. * @spi: Pointer to target ca8210 spi device
  2495. * @on: True to turn the clock on, false to turn off
  2496. *
  2497. * The external clock is configured with a frequency and output pin taken from
  2498. * the platform data.
  2499. *
  2500. * Return: 0 or linux error code
  2501. */
  2502. static int ca8210_config_extern_clk(
  2503. struct ca8210_platform_data *pdata,
  2504. struct spi_device *spi,
  2505. bool on
  2506. )
  2507. {
  2508. u8 clkparam[2];
  2509. if (on) {
  2510. dev_info(&spi->dev, "Switching external clock on\n");
  2511. switch (pdata->extclockfreq) {
  2512. case SIXTEEN_MHZ:
  2513. clkparam[0] = 1;
  2514. break;
  2515. case EIGHT_MHZ:
  2516. clkparam[0] = 2;
  2517. break;
  2518. case FOUR_MHZ:
  2519. clkparam[0] = 3;
  2520. break;
  2521. case TWO_MHZ:
  2522. clkparam[0] = 4;
  2523. break;
  2524. case ONE_MHZ:
  2525. clkparam[0] = 5;
  2526. break;
  2527. default:
  2528. dev_crit(&spi->dev, "Invalid extclock-freq\n");
  2529. return -EINVAL;
  2530. }
  2531. clkparam[1] = pdata->extclockgpio;
  2532. } else {
  2533. dev_info(&spi->dev, "Switching external clock off\n");
  2534. clkparam[0] = 0; /* off */
  2535. clkparam[1] = 0;
  2536. }
  2537. return link_to_linux_err(
  2538. hwme_set_request_sync(HWME_SYSCLKOUT, 2, clkparam, spi)
  2539. );
  2540. }
  2541. /**
  2542. * ca8210_register_ext_clock() - Register ca8210's external clock with kernel
  2543. * @spi: Pointer to target ca8210 spi device
  2544. *
  2545. * Return: 0 or linux error code
  2546. */
  2547. static int ca8210_register_ext_clock(struct spi_device *spi)
  2548. {
  2549. struct device_node *np = spi->dev.of_node;
  2550. struct ca8210_priv *priv = spi_get_drvdata(spi);
  2551. struct ca8210_platform_data *pdata = spi->dev.platform_data;
  2552. int ret = 0;
  2553. if (!np)
  2554. return -EFAULT;
  2555. priv->clk = clk_register_fixed_rate(
  2556. &spi->dev,
  2557. np->name,
  2558. NULL,
  2559. 0,
  2560. pdata->extclockfreq
  2561. );
  2562. if (IS_ERR(priv->clk)) {
  2563. dev_crit(&spi->dev, "Failed to register external clk\n");
  2564. return PTR_ERR(priv->clk);
  2565. }
  2566. ret = of_clk_add_provider(np, of_clk_src_simple_get, priv->clk);
  2567. if (ret) {
  2568. clk_unregister(priv->clk);
  2569. dev_crit(
  2570. &spi->dev,
  2571. "Failed to register external clock as clock provider\n"
  2572. );
  2573. } else {
  2574. dev_info(&spi->dev, "External clock set as clock provider\n");
  2575. }
  2576. return ret;
  2577. }
  2578. /**
  2579. * ca8210_unregister_ext_clock() - Unregister ca8210's external clock with
  2580. * kernel
  2581. * @spi: Pointer to target ca8210 spi device
  2582. */
  2583. static void ca8210_unregister_ext_clock(struct spi_device *spi)
  2584. {
  2585. struct ca8210_priv *priv = spi_get_drvdata(spi);
  2586. if (!priv->clk)
  2587. return
  2588. of_clk_del_provider(spi->dev.of_node);
  2589. clk_unregister(priv->clk);
  2590. dev_info(&spi->dev, "External clock unregistered\n");
  2591. }
  2592. /**
  2593. * ca8210_reset_init() - Initialise the reset input to the ca8210
  2594. * @spi: Pointer to target ca8210 spi device
  2595. *
  2596. * Return: 0 or linux error code
  2597. */
  2598. static int ca8210_reset_init(struct spi_device *spi)
  2599. {
  2600. int ret;
  2601. struct ca8210_platform_data *pdata = spi->dev.platform_data;
  2602. pdata->gpio_reset = of_get_named_gpio(
  2603. spi->dev.of_node,
  2604. "reset-gpio",
  2605. 0
  2606. );
  2607. ret = gpio_direction_output(pdata->gpio_reset, 1);
  2608. if (ret < 0) {
  2609. dev_crit(
  2610. &spi->dev,
  2611. "Reset GPIO %d did not set to output mode\n",
  2612. pdata->gpio_reset
  2613. );
  2614. }
  2615. return ret;
  2616. }
  2617. /**
  2618. * ca8210_interrupt_init() - Initialise the irq output from the ca8210
  2619. * @spi: Pointer to target ca8210 spi device
  2620. *
  2621. * Return: 0 or linux error code
  2622. */
  2623. static int ca8210_interrupt_init(struct spi_device *spi)
  2624. {
  2625. int ret;
  2626. struct ca8210_platform_data *pdata = spi->dev.platform_data;
  2627. pdata->gpio_irq = of_get_named_gpio(
  2628. spi->dev.of_node,
  2629. "irq-gpio",
  2630. 0
  2631. );
  2632. pdata->irq_id = gpio_to_irq(pdata->gpio_irq);
  2633. if (pdata->irq_id < 0) {
  2634. dev_crit(
  2635. &spi->dev,
  2636. "Could not get irq for gpio pin %d\n",
  2637. pdata->gpio_irq
  2638. );
  2639. gpio_free(pdata->gpio_irq);
  2640. return pdata->irq_id;
  2641. }
  2642. ret = request_irq(
  2643. pdata->irq_id,
  2644. ca8210_interrupt_handler,
  2645. IRQF_TRIGGER_FALLING,
  2646. "ca8210-irq",
  2647. spi_get_drvdata(spi)
  2648. );
  2649. if (ret) {
  2650. dev_crit(&spi->dev, "request_irq %d failed\n", pdata->irq_id);
  2651. gpio_unexport(pdata->gpio_irq);
  2652. gpio_free(pdata->gpio_irq);
  2653. }
  2654. return ret;
  2655. }
  2656. /**
  2657. * ca8210_dev_com_init() - Initialise the spi communication component
  2658. * @priv: Pointer to private data structure
  2659. *
  2660. * Return: 0 or linux error code
  2661. */
  2662. static int ca8210_dev_com_init(struct ca8210_priv *priv)
  2663. {
  2664. priv->mlme_workqueue = alloc_ordered_workqueue(
  2665. "MLME work queue",
  2666. WQ_UNBOUND
  2667. );
  2668. if (!priv->mlme_workqueue) {
  2669. dev_crit(&priv->spi->dev, "alloc of mlme_workqueue failed!\n");
  2670. return -ENOMEM;
  2671. }
  2672. priv->irq_workqueue = alloc_ordered_workqueue(
  2673. "ca8210 irq worker",
  2674. WQ_UNBOUND
  2675. );
  2676. if (!priv->irq_workqueue) {
  2677. dev_crit(&priv->spi->dev, "alloc of irq_workqueue failed!\n");
  2678. destroy_workqueue(priv->mlme_workqueue);
  2679. return -ENOMEM;
  2680. }
  2681. return 0;
  2682. }
  2683. /**
  2684. * ca8210_dev_com_clear() - Deinitialise the spi communication component
  2685. * @priv: Pointer to private data structure
  2686. */
  2687. static void ca8210_dev_com_clear(struct ca8210_priv *priv)
  2688. {
  2689. flush_workqueue(priv->mlme_workqueue);
  2690. destroy_workqueue(priv->mlme_workqueue);
  2691. flush_workqueue(priv->irq_workqueue);
  2692. destroy_workqueue(priv->irq_workqueue);
  2693. }
  2694. #define CA8210_MAX_TX_POWERS (9)
  2695. static const s32 ca8210_tx_powers[CA8210_MAX_TX_POWERS] = {
  2696. 800, 700, 600, 500, 400, 300, 200, 100, 0
  2697. };
  2698. #define CA8210_MAX_ED_LEVELS (21)
  2699. static const s32 ca8210_ed_levels[CA8210_MAX_ED_LEVELS] = {
  2700. -10300, -10250, -10200, -10150, -10100, -10050, -10000, -9950, -9900,
  2701. -9850, -9800, -9750, -9700, -9650, -9600, -9550, -9500, -9450, -9400,
  2702. -9350, -9300
  2703. };
  2704. /**
  2705. * ca8210_hw_setup() - Populate the ieee802154_hw phy attributes with the
  2706. * ca8210's defaults
  2707. * @ca8210_hw: Pointer to ieee802154_hw to populate
  2708. */
  2709. static void ca8210_hw_setup(struct ieee802154_hw *ca8210_hw)
  2710. {
  2711. /* Support channels 11-26 */
  2712. ca8210_hw->phy->supported.channels[0] = CA8210_VALID_CHANNELS;
  2713. ca8210_hw->phy->supported.tx_powers_size = CA8210_MAX_TX_POWERS;
  2714. ca8210_hw->phy->supported.tx_powers = ca8210_tx_powers;
  2715. ca8210_hw->phy->supported.cca_ed_levels_size = CA8210_MAX_ED_LEVELS;
  2716. ca8210_hw->phy->supported.cca_ed_levels = ca8210_ed_levels;
  2717. ca8210_hw->phy->current_channel = 18;
  2718. ca8210_hw->phy->current_page = 0;
  2719. ca8210_hw->phy->transmit_power = 800;
  2720. ca8210_hw->phy->cca.mode = NL802154_CCA_ENERGY_CARRIER;
  2721. ca8210_hw->phy->cca.opt = NL802154_CCA_OPT_ENERGY_CARRIER_AND;
  2722. ca8210_hw->phy->cca_ed_level = -9800;
  2723. ca8210_hw->phy->symbol_duration = 16;
  2724. ca8210_hw->phy->lifs_period = 40;
  2725. ca8210_hw->phy->sifs_period = 12;
  2726. ca8210_hw->flags =
  2727. IEEE802154_HW_AFILT |
  2728. IEEE802154_HW_OMIT_CKSUM |
  2729. IEEE802154_HW_FRAME_RETRIES |
  2730. IEEE802154_HW_PROMISCUOUS |
  2731. IEEE802154_HW_CSMA_PARAMS;
  2732. ca8210_hw->phy->flags =
  2733. WPAN_PHY_FLAG_TXPOWER |
  2734. WPAN_PHY_FLAG_CCA_ED_LEVEL |
  2735. WPAN_PHY_FLAG_CCA_MODE;
  2736. }
  2737. /**
  2738. * ca8210_test_interface_init() - Initialise the test file interface
  2739. * @priv: Pointer to private data structure
  2740. *
  2741. * Provided as an alternative to the standard linux network interface, the test
  2742. * interface exposes a file in the filesystem (ca8210_test) that allows
  2743. * 802.15.4 SAP Commands and Cascoda EVBME commands to be sent directly to
  2744. * the stack.
  2745. *
  2746. * Return: 0 or linux error code
  2747. */
  2748. static int ca8210_test_interface_init(struct ca8210_priv *priv)
  2749. {
  2750. struct ca8210_test *test = &priv->test;
  2751. char node_name[32];
  2752. snprintf(
  2753. node_name,
  2754. sizeof(node_name),
  2755. "ca8210@%d_%d",
  2756. priv->spi->master->bus_num,
  2757. priv->spi->chip_select
  2758. );
  2759. test->ca8210_dfs_spi_int = debugfs_create_file(
  2760. node_name,
  2761. 0600, /* S_IRUSR | S_IWUSR */
  2762. NULL,
  2763. priv,
  2764. &test_int_fops
  2765. );
  2766. if (IS_ERR(test->ca8210_dfs_spi_int)) {
  2767. dev_err(
  2768. &priv->spi->dev,
  2769. "Error %ld when creating debugfs node\n",
  2770. PTR_ERR(test->ca8210_dfs_spi_int)
  2771. );
  2772. return PTR_ERR(test->ca8210_dfs_spi_int);
  2773. }
  2774. debugfs_create_symlink("ca8210", NULL, node_name);
  2775. init_waitqueue_head(&test->readq);
  2776. return kfifo_alloc(
  2777. &test->up_fifo,
  2778. CA8210_TEST_INT_FIFO_SIZE,
  2779. GFP_KERNEL
  2780. );
  2781. }
  2782. /**
  2783. * ca8210_test_interface_clear() - Deinitialise the test file interface
  2784. * @priv: Pointer to private data structure
  2785. */
  2786. static void ca8210_test_interface_clear(struct ca8210_priv *priv)
  2787. {
  2788. struct ca8210_test *test = &priv->test;
  2789. debugfs_remove(test->ca8210_dfs_spi_int);
  2790. kfifo_free(&test->up_fifo);
  2791. dev_info(&priv->spi->dev, "Test interface removed\n");
  2792. }
  2793. /**
  2794. * ca8210_remove() - Shut down a ca8210 upon being disconnected
  2795. * @priv: Pointer to private data structure
  2796. *
  2797. * Return: 0 or linux error code
  2798. */
  2799. static int ca8210_remove(struct spi_device *spi_device)
  2800. {
  2801. struct ca8210_priv *priv;
  2802. struct ca8210_platform_data *pdata;
  2803. dev_info(&spi_device->dev, "Removing ca8210\n");
  2804. pdata = spi_device->dev.platform_data;
  2805. if (pdata) {
  2806. if (pdata->extclockenable) {
  2807. ca8210_unregister_ext_clock(spi_device);
  2808. ca8210_config_extern_clk(pdata, spi_device, 0);
  2809. }
  2810. free_irq(pdata->irq_id, spi_device->dev.driver_data);
  2811. kfree(pdata);
  2812. spi_device->dev.platform_data = NULL;
  2813. }
  2814. /* get spi_device private data */
  2815. priv = spi_get_drvdata(spi_device);
  2816. if (priv) {
  2817. dev_info(
  2818. &spi_device->dev,
  2819. "sync_down = %d, sync_up = %d\n",
  2820. priv->sync_down,
  2821. priv->sync_up
  2822. );
  2823. ca8210_dev_com_clear(spi_device->dev.driver_data);
  2824. if (priv->hw) {
  2825. if (priv->hw_registered)
  2826. ieee802154_unregister_hw(priv->hw);
  2827. ieee802154_free_hw(priv->hw);
  2828. priv->hw = NULL;
  2829. dev_info(
  2830. &spi_device->dev,
  2831. "Unregistered & freed ieee802154_hw.\n"
  2832. );
  2833. }
  2834. if (IS_ENABLED(CONFIG_IEEE802154_CA8210_DEBUGFS))
  2835. ca8210_test_interface_clear(priv);
  2836. }
  2837. return 0;
  2838. }
  2839. /**
  2840. * ca8210_probe() - Set up a connected ca8210 upon being detected by the system
  2841. * @priv: Pointer to private data structure
  2842. *
  2843. * Return: 0 or linux error code
  2844. */
  2845. static int ca8210_probe(struct spi_device *spi_device)
  2846. {
  2847. struct ca8210_priv *priv;
  2848. struct ieee802154_hw *hw;
  2849. struct ca8210_platform_data *pdata;
  2850. int ret;
  2851. dev_info(&spi_device->dev, "Inserting ca8210\n");
  2852. /* allocate ieee802154_hw and private data */
  2853. hw = ieee802154_alloc_hw(sizeof(struct ca8210_priv), &ca8210_phy_ops);
  2854. if (!hw) {
  2855. dev_crit(&spi_device->dev, "ieee802154_alloc_hw failed\n");
  2856. ret = -ENOMEM;
  2857. goto error;
  2858. }
  2859. priv = hw->priv;
  2860. priv->hw = hw;
  2861. priv->spi = spi_device;
  2862. hw->parent = &spi_device->dev;
  2863. spin_lock_init(&priv->lock);
  2864. priv->async_tx_pending = false;
  2865. priv->hw_registered = false;
  2866. priv->sync_up = 0;
  2867. priv->sync_down = 0;
  2868. priv->promiscuous = false;
  2869. priv->retries = 0;
  2870. init_completion(&priv->ca8210_is_awake);
  2871. init_completion(&priv->spi_transfer_complete);
  2872. init_completion(&priv->sync_exchange_complete);
  2873. spi_set_drvdata(priv->spi, priv);
  2874. if (IS_ENABLED(CONFIG_IEEE802154_CA8210_DEBUGFS)) {
  2875. cascoda_api_upstream = ca8210_test_int_driver_write;
  2876. ca8210_test_interface_init(priv);
  2877. } else {
  2878. cascoda_api_upstream = NULL;
  2879. }
  2880. ca8210_hw_setup(hw);
  2881. ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
  2882. pdata = kmalloc(sizeof(*pdata), GFP_KERNEL);
  2883. if (!pdata) {
  2884. ret = -ENOMEM;
  2885. goto error;
  2886. }
  2887. priv->spi->dev.platform_data = pdata;
  2888. ret = ca8210_get_platform_data(priv->spi, pdata);
  2889. if (ret) {
  2890. dev_crit(&spi_device->dev, "ca8210_get_platform_data failed\n");
  2891. goto error;
  2892. }
  2893. ret = ca8210_dev_com_init(priv);
  2894. if (ret) {
  2895. dev_crit(&spi_device->dev, "ca8210_dev_com_init failed\n");
  2896. goto error;
  2897. }
  2898. ret = ca8210_reset_init(priv->spi);
  2899. if (ret) {
  2900. dev_crit(&spi_device->dev, "ca8210_reset_init failed\n");
  2901. goto error;
  2902. }
  2903. ret = ca8210_interrupt_init(priv->spi);
  2904. if (ret) {
  2905. dev_crit(&spi_device->dev, "ca8210_interrupt_init failed\n");
  2906. goto error;
  2907. }
  2908. msleep(100);
  2909. ca8210_reset_send(priv->spi, 1);
  2910. ret = tdme_chipinit(priv->spi);
  2911. if (ret) {
  2912. dev_crit(&spi_device->dev, "tdme_chipinit failed\n");
  2913. goto error;
  2914. }
  2915. if (pdata->extclockenable) {
  2916. ret = ca8210_config_extern_clk(pdata, priv->spi, 1);
  2917. if (ret) {
  2918. dev_crit(
  2919. &spi_device->dev,
  2920. "ca8210_config_extern_clk failed\n"
  2921. );
  2922. goto error;
  2923. }
  2924. ret = ca8210_register_ext_clock(priv->spi);
  2925. if (ret) {
  2926. dev_crit(
  2927. &spi_device->dev,
  2928. "ca8210_register_ext_clock failed\n"
  2929. );
  2930. goto error;
  2931. }
  2932. }
  2933. ret = ieee802154_register_hw(hw);
  2934. if (ret) {
  2935. dev_crit(&spi_device->dev, "ieee802154_register_hw failed\n");
  2936. goto error;
  2937. }
  2938. priv->hw_registered = true;
  2939. return 0;
  2940. error:
  2941. msleep(100); /* wait for pending spi transfers to complete */
  2942. ca8210_remove(spi_device);
  2943. return link_to_linux_err(ret);
  2944. }
  2945. static const struct of_device_id ca8210_of_ids[] = {
  2946. {.compatible = "cascoda,ca8210", },
  2947. {},
  2948. };
  2949. MODULE_DEVICE_TABLE(of, ca8210_of_ids);
  2950. static struct spi_driver ca8210_spi_driver = {
  2951. .driver = {
  2952. .name = DRIVER_NAME,
  2953. .owner = THIS_MODULE,
  2954. .of_match_table = of_match_ptr(ca8210_of_ids),
  2955. },
  2956. .probe = ca8210_probe,
  2957. .remove = ca8210_remove
  2958. };
  2959. module_spi_driver(ca8210_spi_driver);
  2960. MODULE_AUTHOR("Harry Morris <h.morris@cascoda.com>");
  2961. MODULE_DESCRIPTION("CA-8210 SoftMAC driver");
  2962. MODULE_LICENSE("Dual BSD/GPL");
  2963. MODULE_VERSION("1.0");