pinctrl-aspeed.c 19 KB

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  1. /*
  2. * Copyright (C) 2016 IBM Corp.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. */
  9. #include <linux/mfd/syscon.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/slab.h>
  12. #include <linux/string.h>
  13. #include "../core.h"
  14. #include "pinctrl-aspeed.h"
  15. static const char *const aspeed_pinmux_ips[] = {
  16. [ASPEED_IP_SCU] = "SCU",
  17. [ASPEED_IP_GFX] = "GFX",
  18. [ASPEED_IP_LPC] = "LPC",
  19. };
  20. int aspeed_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
  21. {
  22. struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
  23. return pdata->ngroups;
  24. }
  25. const char *aspeed_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
  26. unsigned int group)
  27. {
  28. struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
  29. return pdata->groups[group].name;
  30. }
  31. int aspeed_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
  32. unsigned int group, const unsigned int **pins,
  33. unsigned int *npins)
  34. {
  35. struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
  36. *pins = &pdata->groups[group].pins[0];
  37. *npins = pdata->groups[group].npins;
  38. return 0;
  39. }
  40. void aspeed_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
  41. struct seq_file *s, unsigned int offset)
  42. {
  43. seq_printf(s, " %s", dev_name(pctldev->dev));
  44. }
  45. int aspeed_pinmux_get_fn_count(struct pinctrl_dev *pctldev)
  46. {
  47. struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
  48. return pdata->nfunctions;
  49. }
  50. const char *aspeed_pinmux_get_fn_name(struct pinctrl_dev *pctldev,
  51. unsigned int function)
  52. {
  53. struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
  54. return pdata->functions[function].name;
  55. }
  56. int aspeed_pinmux_get_fn_groups(struct pinctrl_dev *pctldev,
  57. unsigned int function,
  58. const char * const **groups,
  59. unsigned int * const num_groups)
  60. {
  61. struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
  62. *groups = pdata->functions[function].groups;
  63. *num_groups = pdata->functions[function].ngroups;
  64. return 0;
  65. }
  66. static inline void aspeed_sig_desc_print_val(
  67. const struct aspeed_sig_desc *desc, bool enable, u32 rv)
  68. {
  69. pr_debug("Want %s%X[0x%08X]=0x%X, got 0x%X from 0x%08X\n",
  70. aspeed_pinmux_ips[desc->ip], desc->reg,
  71. desc->mask, enable ? desc->enable : desc->disable,
  72. (rv & desc->mask) >> __ffs(desc->mask), rv);
  73. }
  74. /**
  75. * Query the enabled or disabled state of a signal descriptor
  76. *
  77. * @desc: The signal descriptor of interest
  78. * @enabled: True to query the enabled state, false to query disabled state
  79. * @map: The IP block's regmap instance
  80. *
  81. * Return: 1 if the descriptor's bitfield is configured to the state
  82. * selected by @enabled, 0 if not, and less than zero if an unrecoverable
  83. * failure occurred
  84. *
  85. * Evaluation of descriptor state is non-trivial in that it is not a binary
  86. * outcome: The bitfields can be greater than one bit in size and thus can take
  87. * a value that is neither the enabled nor disabled state recorded in the
  88. * descriptor (typically this means a different function to the one of interest
  89. * is enabled). Thus we must explicitly test for either condition as required.
  90. */
  91. static int aspeed_sig_desc_eval(const struct aspeed_sig_desc *desc,
  92. bool enabled, struct regmap *map)
  93. {
  94. int ret;
  95. unsigned int raw;
  96. u32 want;
  97. if (!map)
  98. return -ENODEV;
  99. ret = regmap_read(map, desc->reg, &raw);
  100. if (ret)
  101. return ret;
  102. aspeed_sig_desc_print_val(desc, enabled, raw);
  103. want = enabled ? desc->enable : desc->disable;
  104. return ((raw & desc->mask) >> __ffs(desc->mask)) == want;
  105. }
  106. /**
  107. * Query the enabled or disabled state for a mux function's signal on a pin
  108. *
  109. * @expr: An expression controlling the signal for a mux function on a pin
  110. * @enabled: True to query the enabled state, false to query disabled state
  111. * @maps: The list of regmap instances
  112. *
  113. * Return: 1 if the expression composed by @enabled evaluates true, 0 if not,
  114. * and less than zero if an unrecoverable failure occurred.
  115. *
  116. * A mux function is enabled or disabled if the function's signal expression
  117. * for each pin in the function's pin group evaluates true for the desired
  118. * state. An signal expression evaluates true if all of its associated signal
  119. * descriptors evaluate true for the desired state.
  120. *
  121. * If an expression's state is described by more than one bit, either through
  122. * multi-bit bitfields in a single signal descriptor or through multiple signal
  123. * descriptors of a single bit then it is possible for the expression to be in
  124. * neither the enabled nor disabled state. Thus we must explicitly test for
  125. * either condition as required.
  126. */
  127. static int aspeed_sig_expr_eval(const struct aspeed_sig_expr *expr,
  128. bool enabled, struct regmap * const *maps)
  129. {
  130. int i;
  131. int ret;
  132. for (i = 0; i < expr->ndescs; i++) {
  133. const struct aspeed_sig_desc *desc = &expr->descs[i];
  134. ret = aspeed_sig_desc_eval(desc, enabled, maps[desc->ip]);
  135. if (ret <= 0)
  136. return ret;
  137. }
  138. return 1;
  139. }
  140. /**
  141. * Configure a pin's signal by applying an expression's descriptor state for
  142. * all descriptors in the expression.
  143. *
  144. * @expr: The expression associated with the function whose signal is to be
  145. * configured
  146. * @enable: true to enable an function's signal through a pin's signal
  147. * expression, false to disable the function's signal
  148. * @maps: The list of regmap instances for pinmux register access.
  149. *
  150. * Return: 0 if the expression is configured as requested and a negative error
  151. * code otherwise
  152. */
  153. static int aspeed_sig_expr_set(const struct aspeed_sig_expr *expr,
  154. bool enable, struct regmap * const *maps)
  155. {
  156. int ret;
  157. int i;
  158. for (i = 0; i < expr->ndescs; i++) {
  159. const struct aspeed_sig_desc *desc = &expr->descs[i];
  160. u32 pattern = enable ? desc->enable : desc->disable;
  161. u32 val = (pattern << __ffs(desc->mask));
  162. if (!maps[desc->ip])
  163. return -ENODEV;
  164. /*
  165. * Strap registers are configured in hardware or by early-boot
  166. * firmware. Treat them as read-only despite that we can write
  167. * them. This may mean that certain functions cannot be
  168. * deconfigured and is the reason we re-evaluate after writing
  169. * all descriptor bits.
  170. *
  171. * Port D and port E GPIO loopback modes are the only exception
  172. * as those are commonly used with front-panel buttons to allow
  173. * normal operation of the host when the BMC is powered off or
  174. * fails to boot. Once the BMC has booted, the loopback mode
  175. * must be disabled for the BMC to control host power-on and
  176. * reset.
  177. */
  178. if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP1 &&
  179. !(desc->mask & (BIT(21) | BIT(22))))
  180. continue;
  181. if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP2)
  182. continue;
  183. /* On AST2500, Set bits in SCU7C are cleared from SCU70 */
  184. if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP1) {
  185. unsigned int rev_id;
  186. ret = regmap_read(maps[ASPEED_IP_SCU],
  187. HW_REVISION_ID, &rev_id);
  188. if (ret < 0)
  189. return ret;
  190. if (0x04 == (rev_id >> 24)) {
  191. u32 value = ~val & desc->mask;
  192. if (value) {
  193. ret = regmap_write(maps[desc->ip],
  194. HW_REVISION_ID, value);
  195. if (ret < 0)
  196. return ret;
  197. }
  198. }
  199. }
  200. ret = regmap_update_bits(maps[desc->ip], desc->reg,
  201. desc->mask, val);
  202. if (ret)
  203. return ret;
  204. }
  205. ret = aspeed_sig_expr_eval(expr, enable, maps);
  206. if (ret < 0)
  207. return ret;
  208. if (!ret)
  209. return -EPERM;
  210. return 0;
  211. }
  212. static int aspeed_sig_expr_enable(const struct aspeed_sig_expr *expr,
  213. struct regmap * const *maps)
  214. {
  215. int ret;
  216. ret = aspeed_sig_expr_eval(expr, true, maps);
  217. if (ret < 0)
  218. return ret;
  219. if (!ret)
  220. return aspeed_sig_expr_set(expr, true, maps);
  221. return 0;
  222. }
  223. static int aspeed_sig_expr_disable(const struct aspeed_sig_expr *expr,
  224. struct regmap * const *maps)
  225. {
  226. int ret;
  227. ret = aspeed_sig_expr_eval(expr, true, maps);
  228. if (ret < 0)
  229. return ret;
  230. if (ret)
  231. return aspeed_sig_expr_set(expr, false, maps);
  232. return 0;
  233. }
  234. /**
  235. * Disable a signal on a pin by disabling all provided signal expressions.
  236. *
  237. * @exprs: The list of signal expressions (from a priority level on a pin)
  238. * @maps: The list of regmap instances for pinmux register access.
  239. *
  240. * Return: 0 if all expressions are disabled, otherwise a negative error code
  241. */
  242. static int aspeed_disable_sig(const struct aspeed_sig_expr **exprs,
  243. struct regmap * const *maps)
  244. {
  245. int ret = 0;
  246. if (!exprs)
  247. return true;
  248. while (*exprs && !ret) {
  249. ret = aspeed_sig_expr_disable(*exprs, maps);
  250. exprs++;
  251. }
  252. return ret;
  253. }
  254. /**
  255. * Search for the signal expression needed to enable the pin's signal for the
  256. * requested function.
  257. *
  258. * @exprs: List of signal expressions (haystack)
  259. * @name: The name of the requested function (needle)
  260. *
  261. * Return: A pointer to the signal expression whose function tag matches the
  262. * provided name, otherwise NULL.
  263. *
  264. */
  265. static const struct aspeed_sig_expr *aspeed_find_expr_by_name(
  266. const struct aspeed_sig_expr **exprs, const char *name)
  267. {
  268. while (*exprs) {
  269. if (strcmp((*exprs)->function, name) == 0)
  270. return *exprs;
  271. exprs++;
  272. }
  273. return NULL;
  274. }
  275. static char *get_defined_attribute(const struct aspeed_pin_desc *pdesc,
  276. const char *(*get)(
  277. const struct aspeed_sig_expr *))
  278. {
  279. char *found = NULL;
  280. size_t len = 0;
  281. const struct aspeed_sig_expr ***prios, **funcs, *expr;
  282. prios = pdesc->prios;
  283. while ((funcs = *prios)) {
  284. while ((expr = *funcs)) {
  285. const char *str = get(expr);
  286. size_t delta = strlen(str) + 2;
  287. char *expanded;
  288. expanded = krealloc(found, len + delta + 1, GFP_KERNEL);
  289. if (!expanded) {
  290. kfree(found);
  291. return expanded;
  292. }
  293. found = expanded;
  294. found[len] = '\0';
  295. len += delta;
  296. strcat(found, str);
  297. strcat(found, ", ");
  298. funcs++;
  299. }
  300. prios++;
  301. }
  302. if (len < 2) {
  303. kfree(found);
  304. return NULL;
  305. }
  306. found[len - 2] = '\0';
  307. return found;
  308. }
  309. static const char *aspeed_sig_expr_function(const struct aspeed_sig_expr *expr)
  310. {
  311. return expr->function;
  312. }
  313. static char *get_defined_functions(const struct aspeed_pin_desc *pdesc)
  314. {
  315. return get_defined_attribute(pdesc, aspeed_sig_expr_function);
  316. }
  317. static const char *aspeed_sig_expr_signal(const struct aspeed_sig_expr *expr)
  318. {
  319. return expr->signal;
  320. }
  321. static char *get_defined_signals(const struct aspeed_pin_desc *pdesc)
  322. {
  323. return get_defined_attribute(pdesc, aspeed_sig_expr_signal);
  324. }
  325. int aspeed_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int function,
  326. unsigned int group)
  327. {
  328. int i;
  329. int ret;
  330. const struct aspeed_pinctrl_data *pdata =
  331. pinctrl_dev_get_drvdata(pctldev);
  332. const struct aspeed_pin_group *pgroup = &pdata->groups[group];
  333. const struct aspeed_pin_function *pfunc =
  334. &pdata->functions[function];
  335. for (i = 0; i < pgroup->npins; i++) {
  336. int pin = pgroup->pins[i];
  337. const struct aspeed_pin_desc *pdesc = pdata->pins[pin].drv_data;
  338. const struct aspeed_sig_expr *expr = NULL;
  339. const struct aspeed_sig_expr **funcs;
  340. const struct aspeed_sig_expr ***prios;
  341. pr_debug("Muxing pin %d for %s\n", pin, pfunc->name);
  342. if (!pdesc)
  343. return -EINVAL;
  344. prios = pdesc->prios;
  345. if (!prios)
  346. continue;
  347. /* Disable functions at a higher priority than that requested */
  348. while ((funcs = *prios)) {
  349. expr = aspeed_find_expr_by_name(funcs, pfunc->name);
  350. if (expr)
  351. break;
  352. ret = aspeed_disable_sig(funcs, pdata->maps);
  353. if (ret)
  354. return ret;
  355. prios++;
  356. }
  357. if (!expr) {
  358. char *functions = get_defined_functions(pdesc);
  359. char *signals = get_defined_signals(pdesc);
  360. pr_warn("No function %s found on pin %s (%d). Found signal(s) %s for function(s) %s\n",
  361. pfunc->name, pdesc->name, pin, signals,
  362. functions);
  363. kfree(signals);
  364. kfree(functions);
  365. return -ENXIO;
  366. }
  367. ret = aspeed_sig_expr_enable(expr, pdata->maps);
  368. if (ret)
  369. return ret;
  370. }
  371. return 0;
  372. }
  373. static bool aspeed_expr_is_gpio(const struct aspeed_sig_expr *expr)
  374. {
  375. /*
  376. * The signal type is GPIO if the signal name has "GPI" as a prefix.
  377. * strncmp (rather than strcmp) is used to implement the prefix
  378. * requirement.
  379. *
  380. * expr->signal might look like "GPIOB1" in the GPIO case.
  381. * expr->signal might look like "GPIT0" in the GPI case.
  382. */
  383. return strncmp(expr->signal, "GPI", 3) == 0;
  384. }
  385. static bool aspeed_gpio_in_exprs(const struct aspeed_sig_expr **exprs)
  386. {
  387. if (!exprs)
  388. return false;
  389. while (*exprs) {
  390. if (aspeed_expr_is_gpio(*exprs))
  391. return true;
  392. exprs++;
  393. }
  394. return false;
  395. }
  396. int aspeed_gpio_request_enable(struct pinctrl_dev *pctldev,
  397. struct pinctrl_gpio_range *range,
  398. unsigned int offset)
  399. {
  400. int ret;
  401. const struct aspeed_pinctrl_data *pdata =
  402. pinctrl_dev_get_drvdata(pctldev);
  403. const struct aspeed_pin_desc *pdesc = pdata->pins[offset].drv_data;
  404. const struct aspeed_sig_expr ***prios, **funcs, *expr;
  405. if (!pdesc)
  406. return -EINVAL;
  407. prios = pdesc->prios;
  408. if (!prios)
  409. return -ENXIO;
  410. /* Disable any functions of higher priority than GPIO */
  411. while ((funcs = *prios)) {
  412. if (aspeed_gpio_in_exprs(funcs))
  413. break;
  414. ret = aspeed_disable_sig(funcs, pdata->maps);
  415. if (ret)
  416. return ret;
  417. prios++;
  418. }
  419. if (!funcs) {
  420. char *signals = get_defined_signals(pdesc);
  421. pr_warn("No GPIO signal type found on pin %s (%d). Found: %s\n",
  422. pdesc->name, offset, signals);
  423. kfree(signals);
  424. return -ENXIO;
  425. }
  426. expr = *funcs;
  427. /*
  428. * Disabling all higher-priority expressions is enough to enable the
  429. * lowest-priority signal type. As such it has no associated
  430. * expression.
  431. */
  432. if (!expr)
  433. return 0;
  434. /*
  435. * If GPIO is not the lowest priority signal type, assume there is only
  436. * one expression defined to enable the GPIO function
  437. */
  438. return aspeed_sig_expr_enable(expr, pdata->maps);
  439. }
  440. int aspeed_pinctrl_probe(struct platform_device *pdev,
  441. struct pinctrl_desc *pdesc,
  442. struct aspeed_pinctrl_data *pdata)
  443. {
  444. struct device *parent;
  445. struct pinctrl_dev *pctl;
  446. parent = pdev->dev.parent;
  447. if (!parent) {
  448. dev_err(&pdev->dev, "No parent for syscon pincontroller\n");
  449. return -ENODEV;
  450. }
  451. pdata->maps[ASPEED_IP_SCU] = syscon_node_to_regmap(parent->of_node);
  452. if (IS_ERR(pdata->maps[ASPEED_IP_SCU])) {
  453. dev_err(&pdev->dev, "No regmap for syscon pincontroller parent\n");
  454. return PTR_ERR(pdata->maps[ASPEED_IP_SCU]);
  455. }
  456. pctl = pinctrl_register(pdesc, &pdev->dev, pdata);
  457. if (IS_ERR(pctl)) {
  458. dev_err(&pdev->dev, "Failed to register pinctrl\n");
  459. return PTR_ERR(pctl);
  460. }
  461. platform_set_drvdata(pdev, pdata);
  462. return 0;
  463. }
  464. static inline bool pin_in_config_range(unsigned int offset,
  465. const struct aspeed_pin_config *config)
  466. {
  467. return offset >= config->pins[0] && offset <= config->pins[1];
  468. }
  469. static inline const struct aspeed_pin_config *find_pinconf_config(
  470. const struct aspeed_pinctrl_data *pdata,
  471. unsigned int offset,
  472. enum pin_config_param param)
  473. {
  474. unsigned int i;
  475. for (i = 0; i < pdata->nconfigs; i++) {
  476. if (param == pdata->configs[i].param &&
  477. pin_in_config_range(offset, &pdata->configs[i]))
  478. return &pdata->configs[i];
  479. }
  480. return NULL;
  481. }
  482. /**
  483. * @param: pinconf configuration parameter
  484. * @arg: The supported argument for @param, or -1 if any value is supported
  485. * @val: The register value to write to configure @arg for @param
  486. *
  487. * The map is to be used in conjunction with the configuration array supplied
  488. * by the driver implementation.
  489. */
  490. struct aspeed_pin_config_map {
  491. enum pin_config_param param;
  492. s32 arg;
  493. u32 val;
  494. };
  495. enum aspeed_pin_config_map_type { MAP_TYPE_ARG, MAP_TYPE_VAL };
  496. /* Aspeed consistently both:
  497. *
  498. * 1. Defines "disable bits" for internal pull-downs
  499. * 2. Uses 8mA or 16mA drive strengths
  500. */
  501. static const struct aspeed_pin_config_map pin_config_map[] = {
  502. { PIN_CONFIG_BIAS_PULL_DOWN, 0, 1 },
  503. { PIN_CONFIG_BIAS_PULL_DOWN, -1, 0 },
  504. { PIN_CONFIG_BIAS_DISABLE, -1, 1 },
  505. { PIN_CONFIG_DRIVE_STRENGTH, 8, 0 },
  506. { PIN_CONFIG_DRIVE_STRENGTH, 16, 1 },
  507. };
  508. static const struct aspeed_pin_config_map *find_pinconf_map(
  509. enum pin_config_param param,
  510. enum aspeed_pin_config_map_type type,
  511. s64 value)
  512. {
  513. int i;
  514. for (i = 0; i < ARRAY_SIZE(pin_config_map); i++) {
  515. const struct aspeed_pin_config_map *elem;
  516. bool match;
  517. elem = &pin_config_map[i];
  518. switch (type) {
  519. case MAP_TYPE_ARG:
  520. match = (elem->arg == -1 || elem->arg == value);
  521. break;
  522. case MAP_TYPE_VAL:
  523. match = (elem->val == value);
  524. break;
  525. }
  526. if (param == elem->param && match)
  527. return elem;
  528. }
  529. return NULL;
  530. }
  531. int aspeed_pin_config_get(struct pinctrl_dev *pctldev, unsigned int offset,
  532. unsigned long *config)
  533. {
  534. const enum pin_config_param param = pinconf_to_config_param(*config);
  535. const struct aspeed_pin_config_map *pmap;
  536. const struct aspeed_pinctrl_data *pdata;
  537. const struct aspeed_pin_config *pconf;
  538. unsigned int val;
  539. int rc = 0;
  540. u32 arg;
  541. pdata = pinctrl_dev_get_drvdata(pctldev);
  542. pconf = find_pinconf_config(pdata, offset, param);
  543. if (!pconf)
  544. return -ENOTSUPP;
  545. rc = regmap_read(pdata->maps[ASPEED_IP_SCU], pconf->reg, &val);
  546. if (rc < 0)
  547. return rc;
  548. pmap = find_pinconf_map(param, MAP_TYPE_VAL,
  549. (val & BIT(pconf->bit)) >> pconf->bit);
  550. if (!pmap)
  551. return -EINVAL;
  552. if (param == PIN_CONFIG_DRIVE_STRENGTH)
  553. arg = (u32) pmap->arg;
  554. else if (param == PIN_CONFIG_BIAS_PULL_DOWN)
  555. arg = !!pmap->arg;
  556. else
  557. arg = 1;
  558. if (!arg)
  559. return -EINVAL;
  560. *config = pinconf_to_config_packed(param, arg);
  561. return 0;
  562. }
  563. int aspeed_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset,
  564. unsigned long *configs, unsigned int num_configs)
  565. {
  566. const struct aspeed_pinctrl_data *pdata;
  567. unsigned int i;
  568. int rc = 0;
  569. pdata = pinctrl_dev_get_drvdata(pctldev);
  570. for (i = 0; i < num_configs; i++) {
  571. const struct aspeed_pin_config_map *pmap;
  572. const struct aspeed_pin_config *pconf;
  573. enum pin_config_param param;
  574. unsigned int val;
  575. u32 arg;
  576. param = pinconf_to_config_param(configs[i]);
  577. arg = pinconf_to_config_argument(configs[i]);
  578. pconf = find_pinconf_config(pdata, offset, param);
  579. if (!pconf)
  580. return -ENOTSUPP;
  581. pmap = find_pinconf_map(param, MAP_TYPE_ARG, arg);
  582. if (unlikely(WARN_ON(!pmap)))
  583. return -EINVAL;
  584. val = pmap->val << pconf->bit;
  585. rc = regmap_update_bits(pdata->maps[ASPEED_IP_SCU], pconf->reg,
  586. BIT(pconf->bit), val);
  587. if (rc < 0)
  588. return rc;
  589. pr_debug("%s: Set SCU%02X[%d]=%d for param %d(=%d) on pin %d\n",
  590. __func__, pconf->reg, pconf->bit, pmap->val,
  591. param, arg, offset);
  592. }
  593. return 0;
  594. }
  595. int aspeed_pin_config_group_get(struct pinctrl_dev *pctldev,
  596. unsigned int selector,
  597. unsigned long *config)
  598. {
  599. const unsigned int *pins;
  600. unsigned int npins;
  601. int rc;
  602. rc = aspeed_pinctrl_get_group_pins(pctldev, selector, &pins, &npins);
  603. if (rc < 0)
  604. return rc;
  605. if (!npins)
  606. return -ENODEV;
  607. rc = aspeed_pin_config_get(pctldev, pins[0], config);
  608. return rc;
  609. }
  610. int aspeed_pin_config_group_set(struct pinctrl_dev *pctldev,
  611. unsigned int selector,
  612. unsigned long *configs,
  613. unsigned int num_configs)
  614. {
  615. const unsigned int *pins;
  616. unsigned int npins;
  617. int rc;
  618. int i;
  619. pr_debug("%s: Fetching pins for group selector %d\n",
  620. __func__, selector);
  621. rc = aspeed_pinctrl_get_group_pins(pctldev, selector, &pins, &npins);
  622. if (rc < 0)
  623. return rc;
  624. for (i = 0; i < npins; i++) {
  625. rc = aspeed_pin_config_set(pctldev, pins[i], configs,
  626. num_configs);
  627. if (rc < 0)
  628. return rc;
  629. }
  630. return 0;
  631. }