ctcm_fsms.c 74 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright IBM Corp. 2001, 2007
  4. * Authors: Fritz Elfert (felfert@millenux.com)
  5. * Peter Tiedemann (ptiedem@de.ibm.com)
  6. * MPC additions :
  7. * Belinda Thompson (belindat@us.ibm.com)
  8. * Andy Richter (richtera@us.ibm.com)
  9. */
  10. #undef DEBUG
  11. #undef DEBUGDATA
  12. #undef DEBUGCCW
  13. #define KMSG_COMPONENT "ctcm"
  14. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  15. #include <linux/module.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/slab.h>
  19. #include <linux/errno.h>
  20. #include <linux/types.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/timer.h>
  23. #include <linux/bitops.h>
  24. #include <linux/signal.h>
  25. #include <linux/string.h>
  26. #include <linux/ip.h>
  27. #include <linux/if_arp.h>
  28. #include <linux/tcp.h>
  29. #include <linux/skbuff.h>
  30. #include <linux/ctype.h>
  31. #include <net/dst.h>
  32. #include <linux/io.h>
  33. #include <asm/ccwdev.h>
  34. #include <asm/ccwgroup.h>
  35. #include <linux/uaccess.h>
  36. #include <asm/idals.h>
  37. #include "fsm.h"
  38. #include "ctcm_dbug.h"
  39. #include "ctcm_main.h"
  40. #include "ctcm_fsms.h"
  41. const char *dev_state_names[] = {
  42. [DEV_STATE_STOPPED] = "Stopped",
  43. [DEV_STATE_STARTWAIT_RXTX] = "StartWait RXTX",
  44. [DEV_STATE_STARTWAIT_RX] = "StartWait RX",
  45. [DEV_STATE_STARTWAIT_TX] = "StartWait TX",
  46. [DEV_STATE_STOPWAIT_RXTX] = "StopWait RXTX",
  47. [DEV_STATE_STOPWAIT_RX] = "StopWait RX",
  48. [DEV_STATE_STOPWAIT_TX] = "StopWait TX",
  49. [DEV_STATE_RUNNING] = "Running",
  50. };
  51. const char *dev_event_names[] = {
  52. [DEV_EVENT_START] = "Start",
  53. [DEV_EVENT_STOP] = "Stop",
  54. [DEV_EVENT_RXUP] = "RX up",
  55. [DEV_EVENT_TXUP] = "TX up",
  56. [DEV_EVENT_RXDOWN] = "RX down",
  57. [DEV_EVENT_TXDOWN] = "TX down",
  58. [DEV_EVENT_RESTART] = "Restart",
  59. };
  60. const char *ctc_ch_event_names[] = {
  61. [CTC_EVENT_IO_SUCCESS] = "ccw_device success",
  62. [CTC_EVENT_IO_EBUSY] = "ccw_device busy",
  63. [CTC_EVENT_IO_ENODEV] = "ccw_device enodev",
  64. [CTC_EVENT_IO_UNKNOWN] = "ccw_device unknown",
  65. [CTC_EVENT_ATTNBUSY] = "Status ATTN & BUSY",
  66. [CTC_EVENT_ATTN] = "Status ATTN",
  67. [CTC_EVENT_BUSY] = "Status BUSY",
  68. [CTC_EVENT_UC_RCRESET] = "Unit check remote reset",
  69. [CTC_EVENT_UC_RSRESET] = "Unit check remote system reset",
  70. [CTC_EVENT_UC_TXTIMEOUT] = "Unit check TX timeout",
  71. [CTC_EVENT_UC_TXPARITY] = "Unit check TX parity",
  72. [CTC_EVENT_UC_HWFAIL] = "Unit check Hardware failure",
  73. [CTC_EVENT_UC_RXPARITY] = "Unit check RX parity",
  74. [CTC_EVENT_UC_ZERO] = "Unit check ZERO",
  75. [CTC_EVENT_UC_UNKNOWN] = "Unit check Unknown",
  76. [CTC_EVENT_SC_UNKNOWN] = "SubChannel check Unknown",
  77. [CTC_EVENT_MC_FAIL] = "Machine check failure",
  78. [CTC_EVENT_MC_GOOD] = "Machine check operational",
  79. [CTC_EVENT_IRQ] = "IRQ normal",
  80. [CTC_EVENT_FINSTAT] = "IRQ final",
  81. [CTC_EVENT_TIMER] = "Timer",
  82. [CTC_EVENT_START] = "Start",
  83. [CTC_EVENT_STOP] = "Stop",
  84. /*
  85. * additional MPC events
  86. */
  87. [CTC_EVENT_SEND_XID] = "XID Exchange",
  88. [CTC_EVENT_RSWEEP_TIMER] = "MPC Group Sweep Timer",
  89. };
  90. const char *ctc_ch_state_names[] = {
  91. [CTC_STATE_IDLE] = "Idle",
  92. [CTC_STATE_STOPPED] = "Stopped",
  93. [CTC_STATE_STARTWAIT] = "StartWait",
  94. [CTC_STATE_STARTRETRY] = "StartRetry",
  95. [CTC_STATE_SETUPWAIT] = "SetupWait",
  96. [CTC_STATE_RXINIT] = "RX init",
  97. [CTC_STATE_TXINIT] = "TX init",
  98. [CTC_STATE_RX] = "RX",
  99. [CTC_STATE_TX] = "TX",
  100. [CTC_STATE_RXIDLE] = "RX idle",
  101. [CTC_STATE_TXIDLE] = "TX idle",
  102. [CTC_STATE_RXERR] = "RX error",
  103. [CTC_STATE_TXERR] = "TX error",
  104. [CTC_STATE_TERM] = "Terminating",
  105. [CTC_STATE_DTERM] = "Restarting",
  106. [CTC_STATE_NOTOP] = "Not operational",
  107. /*
  108. * additional MPC states
  109. */
  110. [CH_XID0_PENDING] = "Pending XID0 Start",
  111. [CH_XID0_INPROGRESS] = "In XID0 Negotiations ",
  112. [CH_XID7_PENDING] = "Pending XID7 P1 Start",
  113. [CH_XID7_PENDING1] = "Active XID7 P1 Exchange ",
  114. [CH_XID7_PENDING2] = "Pending XID7 P2 Start ",
  115. [CH_XID7_PENDING3] = "Active XID7 P2 Exchange ",
  116. [CH_XID7_PENDING4] = "XID7 Complete - Pending READY ",
  117. };
  118. static void ctcm_action_nop(fsm_instance *fi, int event, void *arg);
  119. /*
  120. * ----- static ctcm actions for channel statemachine -----
  121. *
  122. */
  123. static void chx_txdone(fsm_instance *fi, int event, void *arg);
  124. static void chx_rx(fsm_instance *fi, int event, void *arg);
  125. static void chx_rxidle(fsm_instance *fi, int event, void *arg);
  126. static void chx_firstio(fsm_instance *fi, int event, void *arg);
  127. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg);
  128. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg);
  129. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg);
  130. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg);
  131. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg);
  132. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg);
  133. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg);
  134. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg);
  135. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg);
  136. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg);
  137. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg);
  138. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg);
  139. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg);
  140. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg);
  141. /*
  142. * ----- static ctcmpc actions for ctcmpc channel statemachine -----
  143. *
  144. */
  145. static void ctcmpc_chx_txdone(fsm_instance *fi, int event, void *arg);
  146. static void ctcmpc_chx_rx(fsm_instance *fi, int event, void *arg);
  147. static void ctcmpc_chx_firstio(fsm_instance *fi, int event, void *arg);
  148. /* shared :
  149. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg);
  150. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg);
  151. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg);
  152. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg);
  153. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg);
  154. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg);
  155. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg);
  156. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg);
  157. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg);
  158. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg);
  159. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg);
  160. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg);
  161. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg);
  162. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg);
  163. */
  164. static void ctcmpc_chx_attn(fsm_instance *fsm, int event, void *arg);
  165. static void ctcmpc_chx_attnbusy(fsm_instance *, int, void *);
  166. static void ctcmpc_chx_resend(fsm_instance *, int, void *);
  167. static void ctcmpc_chx_send_sweep(fsm_instance *fsm, int event, void *arg);
  168. /**
  169. * Check return code of a preceding ccw_device call, halt_IO etc...
  170. *
  171. * ch : The channel, the error belongs to.
  172. * Returns the error code (!= 0) to inspect.
  173. */
  174. void ctcm_ccw_check_rc(struct channel *ch, int rc, char *msg)
  175. {
  176. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  177. "%s(%s): %s: %04x\n",
  178. CTCM_FUNTAIL, ch->id, msg, rc);
  179. switch (rc) {
  180. case -EBUSY:
  181. pr_info("%s: The communication peer is busy\n",
  182. ch->id);
  183. fsm_event(ch->fsm, CTC_EVENT_IO_EBUSY, ch);
  184. break;
  185. case -ENODEV:
  186. pr_err("%s: The specified target device is not valid\n",
  187. ch->id);
  188. fsm_event(ch->fsm, CTC_EVENT_IO_ENODEV, ch);
  189. break;
  190. default:
  191. pr_err("An I/O operation resulted in error %04x\n",
  192. rc);
  193. fsm_event(ch->fsm, CTC_EVENT_IO_UNKNOWN, ch);
  194. }
  195. }
  196. void ctcm_purge_skb_queue(struct sk_buff_head *q)
  197. {
  198. struct sk_buff *skb;
  199. CTCM_DBF_TEXT(TRACE, CTC_DBF_DEBUG, __func__);
  200. while ((skb = skb_dequeue(q))) {
  201. refcount_dec(&skb->users);
  202. dev_kfree_skb_any(skb);
  203. }
  204. }
  205. /**
  206. * NOP action for statemachines
  207. */
  208. static void ctcm_action_nop(fsm_instance *fi, int event, void *arg)
  209. {
  210. }
  211. /*
  212. * Actions for channel - statemachines.
  213. */
  214. /**
  215. * Normal data has been send. Free the corresponding
  216. * skb (it's in io_queue), reset dev->tbusy and
  217. * revert to idle state.
  218. *
  219. * fi An instance of a channel statemachine.
  220. * event The event, just happened.
  221. * arg Generic pointer, casted from channel * upon call.
  222. */
  223. static void chx_txdone(fsm_instance *fi, int event, void *arg)
  224. {
  225. struct channel *ch = arg;
  226. struct net_device *dev = ch->netdev;
  227. struct ctcm_priv *priv = dev->ml_priv;
  228. struct sk_buff *skb;
  229. int first = 1;
  230. int i;
  231. unsigned long duration;
  232. unsigned long done_stamp = jiffies;
  233. CTCM_PR_DEBUG("%s(%s): %s\n", __func__, ch->id, dev->name);
  234. duration = done_stamp - ch->prof.send_stamp;
  235. if (duration > ch->prof.tx_time)
  236. ch->prof.tx_time = duration;
  237. if (ch->irb->scsw.cmd.count != 0)
  238. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  239. "%s(%s): TX not complete, remaining %d bytes",
  240. CTCM_FUNTAIL, dev->name, ch->irb->scsw.cmd.count);
  241. fsm_deltimer(&ch->timer);
  242. while ((skb = skb_dequeue(&ch->io_queue))) {
  243. priv->stats.tx_packets++;
  244. priv->stats.tx_bytes += skb->len - LL_HEADER_LENGTH;
  245. if (first) {
  246. priv->stats.tx_bytes += 2;
  247. first = 0;
  248. }
  249. refcount_dec(&skb->users);
  250. dev_kfree_skb_irq(skb);
  251. }
  252. spin_lock(&ch->collect_lock);
  253. clear_normalized_cda(&ch->ccw[4]);
  254. if (ch->collect_len > 0) {
  255. int rc;
  256. if (ctcm_checkalloc_buffer(ch)) {
  257. spin_unlock(&ch->collect_lock);
  258. return;
  259. }
  260. ch->trans_skb->data = ch->trans_skb_data;
  261. skb_reset_tail_pointer(ch->trans_skb);
  262. ch->trans_skb->len = 0;
  263. if (ch->prof.maxmulti < (ch->collect_len + 2))
  264. ch->prof.maxmulti = ch->collect_len + 2;
  265. if (ch->prof.maxcqueue < skb_queue_len(&ch->collect_queue))
  266. ch->prof.maxcqueue = skb_queue_len(&ch->collect_queue);
  267. *((__u16 *)skb_put(ch->trans_skb, 2)) = ch->collect_len + 2;
  268. i = 0;
  269. while ((skb = skb_dequeue(&ch->collect_queue))) {
  270. skb_copy_from_linear_data(skb,
  271. skb_put(ch->trans_skb, skb->len), skb->len);
  272. priv->stats.tx_packets++;
  273. priv->stats.tx_bytes += skb->len - LL_HEADER_LENGTH;
  274. refcount_dec(&skb->users);
  275. dev_kfree_skb_irq(skb);
  276. i++;
  277. }
  278. ch->collect_len = 0;
  279. spin_unlock(&ch->collect_lock);
  280. ch->ccw[1].count = ch->trans_skb->len;
  281. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  282. ch->prof.send_stamp = jiffies;
  283. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  284. (unsigned long)ch, 0xff, 0);
  285. ch->prof.doios_multi++;
  286. if (rc != 0) {
  287. priv->stats.tx_dropped += i;
  288. priv->stats.tx_errors += i;
  289. fsm_deltimer(&ch->timer);
  290. ctcm_ccw_check_rc(ch, rc, "chained TX");
  291. }
  292. } else {
  293. spin_unlock(&ch->collect_lock);
  294. fsm_newstate(fi, CTC_STATE_TXIDLE);
  295. }
  296. ctcm_clear_busy_do(dev);
  297. }
  298. /**
  299. * Initial data is sent.
  300. * Notify device statemachine that we are up and
  301. * running.
  302. *
  303. * fi An instance of a channel statemachine.
  304. * event The event, just happened.
  305. * arg Generic pointer, casted from channel * upon call.
  306. */
  307. void ctcm_chx_txidle(fsm_instance *fi, int event, void *arg)
  308. {
  309. struct channel *ch = arg;
  310. struct net_device *dev = ch->netdev;
  311. struct ctcm_priv *priv = dev->ml_priv;
  312. CTCM_PR_DEBUG("%s(%s): %s\n", __func__, ch->id, dev->name);
  313. fsm_deltimer(&ch->timer);
  314. fsm_newstate(fi, CTC_STATE_TXIDLE);
  315. fsm_event(priv->fsm, DEV_EVENT_TXUP, ch->netdev);
  316. }
  317. /**
  318. * Got normal data, check for sanity, queue it up, allocate new buffer
  319. * trigger bottom half, and initiate next read.
  320. *
  321. * fi An instance of a channel statemachine.
  322. * event The event, just happened.
  323. * arg Generic pointer, casted from channel * upon call.
  324. */
  325. static void chx_rx(fsm_instance *fi, int event, void *arg)
  326. {
  327. struct channel *ch = arg;
  328. struct net_device *dev = ch->netdev;
  329. struct ctcm_priv *priv = dev->ml_priv;
  330. int len = ch->max_bufsize - ch->irb->scsw.cmd.count;
  331. struct sk_buff *skb = ch->trans_skb;
  332. __u16 block_len = *((__u16 *)skb->data);
  333. int check_len;
  334. int rc;
  335. fsm_deltimer(&ch->timer);
  336. if (len < 8) {
  337. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  338. "%s(%s): got packet with length %d < 8\n",
  339. CTCM_FUNTAIL, dev->name, len);
  340. priv->stats.rx_dropped++;
  341. priv->stats.rx_length_errors++;
  342. goto again;
  343. }
  344. if (len > ch->max_bufsize) {
  345. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  346. "%s(%s): got packet with length %d > %d\n",
  347. CTCM_FUNTAIL, dev->name, len, ch->max_bufsize);
  348. priv->stats.rx_dropped++;
  349. priv->stats.rx_length_errors++;
  350. goto again;
  351. }
  352. /*
  353. * VM TCP seems to have a bug sending 2 trailing bytes of garbage.
  354. */
  355. switch (ch->protocol) {
  356. case CTCM_PROTO_S390:
  357. case CTCM_PROTO_OS390:
  358. check_len = block_len + 2;
  359. break;
  360. default:
  361. check_len = block_len;
  362. break;
  363. }
  364. if ((len < block_len) || (len > check_len)) {
  365. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  366. "%s(%s): got block length %d != rx length %d\n",
  367. CTCM_FUNTAIL, dev->name, block_len, len);
  368. if (do_debug)
  369. ctcmpc_dump_skb(skb, 0);
  370. *((__u16 *)skb->data) = len;
  371. priv->stats.rx_dropped++;
  372. priv->stats.rx_length_errors++;
  373. goto again;
  374. }
  375. if (block_len > 2) {
  376. *((__u16 *)skb->data) = block_len - 2;
  377. ctcm_unpack_skb(ch, skb);
  378. }
  379. again:
  380. skb->data = ch->trans_skb_data;
  381. skb_reset_tail_pointer(skb);
  382. skb->len = 0;
  383. if (ctcm_checkalloc_buffer(ch))
  384. return;
  385. ch->ccw[1].count = ch->max_bufsize;
  386. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  387. (unsigned long)ch, 0xff, 0);
  388. if (rc != 0)
  389. ctcm_ccw_check_rc(ch, rc, "normal RX");
  390. }
  391. /**
  392. * Initialize connection by sending a __u16 of value 0.
  393. *
  394. * fi An instance of a channel statemachine.
  395. * event The event, just happened.
  396. * arg Generic pointer, casted from channel * upon call.
  397. */
  398. static void chx_firstio(fsm_instance *fi, int event, void *arg)
  399. {
  400. int rc;
  401. struct channel *ch = arg;
  402. int fsmstate = fsm_getstate(fi);
  403. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  404. "%s(%s) : %02x",
  405. CTCM_FUNTAIL, ch->id, fsmstate);
  406. ch->sense_rc = 0; /* reset unit check report control */
  407. if (fsmstate == CTC_STATE_TXIDLE)
  408. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  409. "%s(%s): remote side issued READ?, init.\n",
  410. CTCM_FUNTAIL, ch->id);
  411. fsm_deltimer(&ch->timer);
  412. if (ctcm_checkalloc_buffer(ch))
  413. return;
  414. if ((fsmstate == CTC_STATE_SETUPWAIT) &&
  415. (ch->protocol == CTCM_PROTO_OS390)) {
  416. /* OS/390 resp. z/OS */
  417. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  418. *((__u16 *)ch->trans_skb->data) = CTCM_INITIAL_BLOCKLEN;
  419. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC,
  420. CTC_EVENT_TIMER, ch);
  421. chx_rxidle(fi, event, arg);
  422. } else {
  423. struct net_device *dev = ch->netdev;
  424. struct ctcm_priv *priv = dev->ml_priv;
  425. fsm_newstate(fi, CTC_STATE_TXIDLE);
  426. fsm_event(priv->fsm, DEV_EVENT_TXUP, dev);
  427. }
  428. return;
  429. }
  430. /*
  431. * Don't setup a timer for receiving the initial RX frame
  432. * if in compatibility mode, since VM TCP delays the initial
  433. * frame until it has some data to send.
  434. */
  435. if ((CHANNEL_DIRECTION(ch->flags) == CTCM_WRITE) ||
  436. (ch->protocol != CTCM_PROTO_S390))
  437. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  438. *((__u16 *)ch->trans_skb->data) = CTCM_INITIAL_BLOCKLEN;
  439. ch->ccw[1].count = 2; /* Transfer only length */
  440. fsm_newstate(fi, (CHANNEL_DIRECTION(ch->flags) == CTCM_READ)
  441. ? CTC_STATE_RXINIT : CTC_STATE_TXINIT);
  442. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  443. (unsigned long)ch, 0xff, 0);
  444. if (rc != 0) {
  445. fsm_deltimer(&ch->timer);
  446. fsm_newstate(fi, CTC_STATE_SETUPWAIT);
  447. ctcm_ccw_check_rc(ch, rc, "init IO");
  448. }
  449. /*
  450. * If in compatibility mode since we don't setup a timer, we
  451. * also signal RX channel up immediately. This enables us
  452. * to send packets early which in turn usually triggers some
  453. * reply from VM TCP which brings up the RX channel to it's
  454. * final state.
  455. */
  456. if ((CHANNEL_DIRECTION(ch->flags) == CTCM_READ) &&
  457. (ch->protocol == CTCM_PROTO_S390)) {
  458. struct net_device *dev = ch->netdev;
  459. struct ctcm_priv *priv = dev->ml_priv;
  460. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  461. }
  462. }
  463. /**
  464. * Got initial data, check it. If OK,
  465. * notify device statemachine that we are up and
  466. * running.
  467. *
  468. * fi An instance of a channel statemachine.
  469. * event The event, just happened.
  470. * arg Generic pointer, casted from channel * upon call.
  471. */
  472. static void chx_rxidle(fsm_instance *fi, int event, void *arg)
  473. {
  474. struct channel *ch = arg;
  475. struct net_device *dev = ch->netdev;
  476. struct ctcm_priv *priv = dev->ml_priv;
  477. __u16 buflen;
  478. int rc;
  479. fsm_deltimer(&ch->timer);
  480. buflen = *((__u16 *)ch->trans_skb->data);
  481. CTCM_PR_DEBUG("%s: %s: Initial RX count = %d\n",
  482. __func__, dev->name, buflen);
  483. if (buflen >= CTCM_INITIAL_BLOCKLEN) {
  484. if (ctcm_checkalloc_buffer(ch))
  485. return;
  486. ch->ccw[1].count = ch->max_bufsize;
  487. fsm_newstate(fi, CTC_STATE_RXIDLE);
  488. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  489. (unsigned long)ch, 0xff, 0);
  490. if (rc != 0) {
  491. fsm_newstate(fi, CTC_STATE_RXINIT);
  492. ctcm_ccw_check_rc(ch, rc, "initial RX");
  493. } else
  494. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  495. } else {
  496. CTCM_PR_DEBUG("%s: %s: Initial RX count %d not %d\n",
  497. __func__, dev->name,
  498. buflen, CTCM_INITIAL_BLOCKLEN);
  499. chx_firstio(fi, event, arg);
  500. }
  501. }
  502. /**
  503. * Set channel into extended mode.
  504. *
  505. * fi An instance of a channel statemachine.
  506. * event The event, just happened.
  507. * arg Generic pointer, casted from channel * upon call.
  508. */
  509. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg)
  510. {
  511. struct channel *ch = arg;
  512. int rc;
  513. unsigned long saveflags = 0;
  514. int timeout = CTCM_TIME_5_SEC;
  515. fsm_deltimer(&ch->timer);
  516. if (IS_MPC(ch)) {
  517. timeout = 1500;
  518. CTCM_PR_DEBUG("enter %s: cp=%i ch=0x%p id=%s\n",
  519. __func__, smp_processor_id(), ch, ch->id);
  520. }
  521. fsm_addtimer(&ch->timer, timeout, CTC_EVENT_TIMER, ch);
  522. fsm_newstate(fi, CTC_STATE_SETUPWAIT);
  523. CTCM_CCW_DUMP((char *)&ch->ccw[6], sizeof(struct ccw1) * 2);
  524. if (event == CTC_EVENT_TIMER) /* only for timer not yet locked */
  525. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  526. /* Such conditional locking is undeterministic in
  527. * static view. => ignore sparse warnings here. */
  528. rc = ccw_device_start(ch->cdev, &ch->ccw[6],
  529. (unsigned long)ch, 0xff, 0);
  530. if (event == CTC_EVENT_TIMER) /* see above comments */
  531. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  532. if (rc != 0) {
  533. fsm_deltimer(&ch->timer);
  534. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  535. ctcm_ccw_check_rc(ch, rc, "set Mode");
  536. } else
  537. ch->retry = 0;
  538. }
  539. /**
  540. * Setup channel.
  541. *
  542. * fi An instance of a channel statemachine.
  543. * event The event, just happened.
  544. * arg Generic pointer, casted from channel * upon call.
  545. */
  546. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg)
  547. {
  548. struct channel *ch = arg;
  549. unsigned long saveflags;
  550. int rc;
  551. CTCM_DBF_TEXT_(SETUP, CTC_DBF_INFO, "%s(%s): %s",
  552. CTCM_FUNTAIL, ch->id,
  553. (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ? "RX" : "TX");
  554. if (ch->trans_skb != NULL) {
  555. clear_normalized_cda(&ch->ccw[1]);
  556. dev_kfree_skb(ch->trans_skb);
  557. ch->trans_skb = NULL;
  558. }
  559. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  560. ch->ccw[1].cmd_code = CCW_CMD_READ;
  561. ch->ccw[1].flags = CCW_FLAG_SLI;
  562. ch->ccw[1].count = 0;
  563. } else {
  564. ch->ccw[1].cmd_code = CCW_CMD_WRITE;
  565. ch->ccw[1].flags = CCW_FLAG_SLI | CCW_FLAG_CC;
  566. ch->ccw[1].count = 0;
  567. }
  568. if (ctcm_checkalloc_buffer(ch)) {
  569. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  570. "%s(%s): %s trans_skb alloc delayed "
  571. "until first transfer",
  572. CTCM_FUNTAIL, ch->id,
  573. (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ?
  574. "RX" : "TX");
  575. }
  576. ch->ccw[0].cmd_code = CCW_CMD_PREPARE;
  577. ch->ccw[0].flags = CCW_FLAG_SLI | CCW_FLAG_CC;
  578. ch->ccw[0].count = 0;
  579. ch->ccw[0].cda = 0;
  580. ch->ccw[2].cmd_code = CCW_CMD_NOOP; /* jointed CE + DE */
  581. ch->ccw[2].flags = CCW_FLAG_SLI;
  582. ch->ccw[2].count = 0;
  583. ch->ccw[2].cda = 0;
  584. memcpy(&ch->ccw[3], &ch->ccw[0], sizeof(struct ccw1) * 3);
  585. ch->ccw[4].cda = 0;
  586. ch->ccw[4].flags &= ~CCW_FLAG_IDA;
  587. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  588. fsm_addtimer(&ch->timer, 1000, CTC_EVENT_TIMER, ch);
  589. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  590. rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  591. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  592. if (rc != 0) {
  593. if (rc != -EBUSY)
  594. fsm_deltimer(&ch->timer);
  595. ctcm_ccw_check_rc(ch, rc, "initial HaltIO");
  596. }
  597. }
  598. /**
  599. * Shutdown a channel.
  600. *
  601. * fi An instance of a channel statemachine.
  602. * event The event, just happened.
  603. * arg Generic pointer, casted from channel * upon call.
  604. */
  605. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg)
  606. {
  607. struct channel *ch = arg;
  608. unsigned long saveflags = 0;
  609. int rc;
  610. int oldstate;
  611. fsm_deltimer(&ch->timer);
  612. if (IS_MPC(ch))
  613. fsm_deltimer(&ch->sweep_timer);
  614. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  615. if (event == CTC_EVENT_STOP) /* only for STOP not yet locked */
  616. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  617. /* Such conditional locking is undeterministic in
  618. * static view. => ignore sparse warnings here. */
  619. oldstate = fsm_getstate(fi);
  620. fsm_newstate(fi, CTC_STATE_TERM);
  621. rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  622. if (event == CTC_EVENT_STOP)
  623. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  624. /* see remark above about conditional locking */
  625. if (rc != 0 && rc != -EBUSY) {
  626. fsm_deltimer(&ch->timer);
  627. if (event != CTC_EVENT_STOP) {
  628. fsm_newstate(fi, oldstate);
  629. ctcm_ccw_check_rc(ch, rc, (char *)__func__);
  630. }
  631. }
  632. }
  633. /**
  634. * Cleanup helper for chx_fail and chx_stopped
  635. * cleanup channels queue and notify interface statemachine.
  636. *
  637. * fi An instance of a channel statemachine.
  638. * state The next state (depending on caller).
  639. * ch The channel to operate on.
  640. */
  641. static void ctcm_chx_cleanup(fsm_instance *fi, int state,
  642. struct channel *ch)
  643. {
  644. struct net_device *dev = ch->netdev;
  645. struct ctcm_priv *priv = dev->ml_priv;
  646. CTCM_DBF_TEXT_(SETUP, CTC_DBF_NOTICE,
  647. "%s(%s): %s[%d]\n",
  648. CTCM_FUNTAIL, dev->name, ch->id, state);
  649. fsm_deltimer(&ch->timer);
  650. if (IS_MPC(ch))
  651. fsm_deltimer(&ch->sweep_timer);
  652. fsm_newstate(fi, state);
  653. if (state == CTC_STATE_STOPPED && ch->trans_skb != NULL) {
  654. clear_normalized_cda(&ch->ccw[1]);
  655. dev_kfree_skb_any(ch->trans_skb);
  656. ch->trans_skb = NULL;
  657. }
  658. ch->th_seg = 0x00;
  659. ch->th_seq_num = 0x00;
  660. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  661. skb_queue_purge(&ch->io_queue);
  662. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  663. } else {
  664. ctcm_purge_skb_queue(&ch->io_queue);
  665. if (IS_MPC(ch))
  666. ctcm_purge_skb_queue(&ch->sweep_queue);
  667. spin_lock(&ch->collect_lock);
  668. ctcm_purge_skb_queue(&ch->collect_queue);
  669. ch->collect_len = 0;
  670. spin_unlock(&ch->collect_lock);
  671. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  672. }
  673. }
  674. /**
  675. * A channel has successfully been halted.
  676. * Cleanup it's queue and notify interface statemachine.
  677. *
  678. * fi An instance of a channel statemachine.
  679. * event The event, just happened.
  680. * arg Generic pointer, casted from channel * upon call.
  681. */
  682. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg)
  683. {
  684. ctcm_chx_cleanup(fi, CTC_STATE_STOPPED, arg);
  685. }
  686. /**
  687. * A stop command from device statemachine arrived and we are in
  688. * not operational mode. Set state to stopped.
  689. *
  690. * fi An instance of a channel statemachine.
  691. * event The event, just happened.
  692. * arg Generic pointer, casted from channel * upon call.
  693. */
  694. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg)
  695. {
  696. fsm_newstate(fi, CTC_STATE_STOPPED);
  697. }
  698. /**
  699. * A machine check for no path, not operational status or gone device has
  700. * happened.
  701. * Cleanup queue and notify interface statemachine.
  702. *
  703. * fi An instance of a channel statemachine.
  704. * event The event, just happened.
  705. * arg Generic pointer, casted from channel * upon call.
  706. */
  707. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg)
  708. {
  709. ctcm_chx_cleanup(fi, CTC_STATE_NOTOP, arg);
  710. }
  711. /**
  712. * Handle error during setup of channel.
  713. *
  714. * fi An instance of a channel statemachine.
  715. * event The event, just happened.
  716. * arg Generic pointer, casted from channel * upon call.
  717. */
  718. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg)
  719. {
  720. struct channel *ch = arg;
  721. struct net_device *dev = ch->netdev;
  722. struct ctcm_priv *priv = dev->ml_priv;
  723. /*
  724. * Special case: Got UC_RCRESET on setmode.
  725. * This means that remote side isn't setup. In this case
  726. * simply retry after some 10 secs...
  727. */
  728. if ((fsm_getstate(fi) == CTC_STATE_SETUPWAIT) &&
  729. ((event == CTC_EVENT_UC_RCRESET) ||
  730. (event == CTC_EVENT_UC_RSRESET))) {
  731. fsm_newstate(fi, CTC_STATE_STARTRETRY);
  732. fsm_deltimer(&ch->timer);
  733. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  734. if (!IS_MPC(ch) &&
  735. (CHANNEL_DIRECTION(ch->flags) == CTCM_READ)) {
  736. int rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  737. if (rc != 0)
  738. ctcm_ccw_check_rc(ch, rc,
  739. "HaltIO in chx_setuperr");
  740. }
  741. return;
  742. }
  743. CTCM_DBF_TEXT_(ERROR, CTC_DBF_CRIT,
  744. "%s(%s) : %s error during %s channel setup state=%s\n",
  745. CTCM_FUNTAIL, dev->name, ctc_ch_event_names[event],
  746. (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ? "RX" : "TX",
  747. fsm_getstate_str(fi));
  748. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  749. fsm_newstate(fi, CTC_STATE_RXERR);
  750. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  751. } else {
  752. fsm_newstate(fi, CTC_STATE_TXERR);
  753. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  754. }
  755. }
  756. /**
  757. * Restart a channel after an error.
  758. *
  759. * fi An instance of a channel statemachine.
  760. * event The event, just happened.
  761. * arg Generic pointer, casted from channel * upon call.
  762. */
  763. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg)
  764. {
  765. struct channel *ch = arg;
  766. struct net_device *dev = ch->netdev;
  767. unsigned long saveflags = 0;
  768. int oldstate;
  769. int rc;
  770. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  771. "%s: %s[%d] of %s\n",
  772. CTCM_FUNTAIL, ch->id, event, dev->name);
  773. fsm_deltimer(&ch->timer);
  774. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  775. oldstate = fsm_getstate(fi);
  776. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  777. if (event == CTC_EVENT_TIMER) /* only for timer not yet locked */
  778. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  779. /* Such conditional locking is a known problem for
  780. * sparse because its undeterministic in static view.
  781. * Warnings should be ignored here. */
  782. rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  783. if (event == CTC_EVENT_TIMER)
  784. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  785. if (rc != 0) {
  786. if (rc != -EBUSY) {
  787. fsm_deltimer(&ch->timer);
  788. fsm_newstate(fi, oldstate);
  789. }
  790. ctcm_ccw_check_rc(ch, rc, "HaltIO in ctcm_chx_restart");
  791. }
  792. }
  793. /**
  794. * Handle error during RX initial handshake (exchange of
  795. * 0-length block header)
  796. *
  797. * fi An instance of a channel statemachine.
  798. * event The event, just happened.
  799. * arg Generic pointer, casted from channel * upon call.
  800. */
  801. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg)
  802. {
  803. struct channel *ch = arg;
  804. struct net_device *dev = ch->netdev;
  805. struct ctcm_priv *priv = dev->ml_priv;
  806. if (event == CTC_EVENT_TIMER) {
  807. if (!IS_MPCDEV(dev))
  808. /* TODO : check if MPC deletes timer somewhere */
  809. fsm_deltimer(&ch->timer);
  810. if (ch->retry++ < 3)
  811. ctcm_chx_restart(fi, event, arg);
  812. else {
  813. fsm_newstate(fi, CTC_STATE_RXERR);
  814. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  815. }
  816. } else {
  817. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  818. "%s(%s): %s in %s", CTCM_FUNTAIL, ch->id,
  819. ctc_ch_event_names[event], fsm_getstate_str(fi));
  820. dev_warn(&dev->dev,
  821. "Initialization failed with RX/TX init handshake "
  822. "error %s\n", ctc_ch_event_names[event]);
  823. }
  824. }
  825. /**
  826. * Notify device statemachine if we gave up initialization
  827. * of RX channel.
  828. *
  829. * fi An instance of a channel statemachine.
  830. * event The event, just happened.
  831. * arg Generic pointer, casted from channel * upon call.
  832. */
  833. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg)
  834. {
  835. struct channel *ch = arg;
  836. struct net_device *dev = ch->netdev;
  837. struct ctcm_priv *priv = dev->ml_priv;
  838. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  839. "%s(%s): RX %s busy, init. fail",
  840. CTCM_FUNTAIL, dev->name, ch->id);
  841. fsm_newstate(fi, CTC_STATE_RXERR);
  842. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  843. }
  844. /**
  845. * Handle RX Unit check remote reset (remote disconnected)
  846. *
  847. * fi An instance of a channel statemachine.
  848. * event The event, just happened.
  849. * arg Generic pointer, casted from channel * upon call.
  850. */
  851. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg)
  852. {
  853. struct channel *ch = arg;
  854. struct channel *ch2;
  855. struct net_device *dev = ch->netdev;
  856. struct ctcm_priv *priv = dev->ml_priv;
  857. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  858. "%s: %s: remote disconnect - re-init ...",
  859. CTCM_FUNTAIL, dev->name);
  860. fsm_deltimer(&ch->timer);
  861. /*
  862. * Notify device statemachine
  863. */
  864. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  865. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  866. fsm_newstate(fi, CTC_STATE_DTERM);
  867. ch2 = priv->channel[CTCM_WRITE];
  868. fsm_newstate(ch2->fsm, CTC_STATE_DTERM);
  869. ccw_device_halt(ch->cdev, (unsigned long)ch);
  870. ccw_device_halt(ch2->cdev, (unsigned long)ch2);
  871. }
  872. /**
  873. * Handle error during TX channel initialization.
  874. *
  875. * fi An instance of a channel statemachine.
  876. * event The event, just happened.
  877. * arg Generic pointer, casted from channel * upon call.
  878. */
  879. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg)
  880. {
  881. struct channel *ch = arg;
  882. struct net_device *dev = ch->netdev;
  883. struct ctcm_priv *priv = dev->ml_priv;
  884. if (event == CTC_EVENT_TIMER) {
  885. fsm_deltimer(&ch->timer);
  886. if (ch->retry++ < 3)
  887. ctcm_chx_restart(fi, event, arg);
  888. else {
  889. fsm_newstate(fi, CTC_STATE_TXERR);
  890. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  891. }
  892. } else {
  893. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  894. "%s(%s): %s in %s", CTCM_FUNTAIL, ch->id,
  895. ctc_ch_event_names[event], fsm_getstate_str(fi));
  896. dev_warn(&dev->dev,
  897. "Initialization failed with RX/TX init handshake "
  898. "error %s\n", ctc_ch_event_names[event]);
  899. }
  900. }
  901. /**
  902. * Handle TX timeout by retrying operation.
  903. *
  904. * fi An instance of a channel statemachine.
  905. * event The event, just happened.
  906. * arg Generic pointer, casted from channel * upon call.
  907. */
  908. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg)
  909. {
  910. struct channel *ch = arg;
  911. struct net_device *dev = ch->netdev;
  912. struct ctcm_priv *priv = dev->ml_priv;
  913. struct sk_buff *skb;
  914. CTCM_PR_DEBUG("Enter: %s: cp=%i ch=0x%p id=%s\n",
  915. __func__, smp_processor_id(), ch, ch->id);
  916. fsm_deltimer(&ch->timer);
  917. if (ch->retry++ > 3) {
  918. struct mpc_group *gptr = priv->mpcg;
  919. CTCM_DBF_TEXT_(TRACE, CTC_DBF_INFO,
  920. "%s: %s: retries exceeded",
  921. CTCM_FUNTAIL, ch->id);
  922. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  923. /* call restart if not MPC or if MPC and mpcg fsm is ready.
  924. use gptr as mpc indicator */
  925. if (!(gptr && (fsm_getstate(gptr->fsm) != MPCG_STATE_READY)))
  926. ctcm_chx_restart(fi, event, arg);
  927. goto done;
  928. }
  929. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  930. "%s : %s: retry %d",
  931. CTCM_FUNTAIL, ch->id, ch->retry);
  932. skb = skb_peek(&ch->io_queue);
  933. if (skb) {
  934. int rc = 0;
  935. unsigned long saveflags = 0;
  936. clear_normalized_cda(&ch->ccw[4]);
  937. ch->ccw[4].count = skb->len;
  938. if (set_normalized_cda(&ch->ccw[4], skb->data)) {
  939. CTCM_DBF_TEXT_(TRACE, CTC_DBF_INFO,
  940. "%s: %s: IDAL alloc failed",
  941. CTCM_FUNTAIL, ch->id);
  942. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  943. ctcm_chx_restart(fi, event, arg);
  944. goto done;
  945. }
  946. fsm_addtimer(&ch->timer, 1000, CTC_EVENT_TIMER, ch);
  947. if (event == CTC_EVENT_TIMER) /* for TIMER not yet locked */
  948. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  949. /* Such conditional locking is a known problem for
  950. * sparse because its undeterministic in static view.
  951. * Warnings should be ignored here. */
  952. if (do_debug_ccw)
  953. ctcmpc_dumpit((char *)&ch->ccw[3],
  954. sizeof(struct ccw1) * 3);
  955. rc = ccw_device_start(ch->cdev, &ch->ccw[3],
  956. (unsigned long)ch, 0xff, 0);
  957. if (event == CTC_EVENT_TIMER)
  958. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev),
  959. saveflags);
  960. if (rc != 0) {
  961. fsm_deltimer(&ch->timer);
  962. ctcm_ccw_check_rc(ch, rc, "TX in chx_txretry");
  963. ctcm_purge_skb_queue(&ch->io_queue);
  964. }
  965. }
  966. done:
  967. return;
  968. }
  969. /**
  970. * Handle fatal errors during an I/O command.
  971. *
  972. * fi An instance of a channel statemachine.
  973. * event The event, just happened.
  974. * arg Generic pointer, casted from channel * upon call.
  975. */
  976. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg)
  977. {
  978. struct channel *ch = arg;
  979. struct net_device *dev = ch->netdev;
  980. struct ctcm_priv *priv = dev->ml_priv;
  981. int rd = CHANNEL_DIRECTION(ch->flags);
  982. fsm_deltimer(&ch->timer);
  983. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  984. "%s: %s: %s unrecoverable channel error",
  985. CTCM_FUNTAIL, ch->id, rd == CTCM_READ ? "RX" : "TX");
  986. if (IS_MPC(ch)) {
  987. priv->stats.tx_dropped++;
  988. priv->stats.tx_errors++;
  989. }
  990. if (rd == CTCM_READ) {
  991. fsm_newstate(fi, CTC_STATE_RXERR);
  992. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  993. } else {
  994. fsm_newstate(fi, CTC_STATE_TXERR);
  995. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  996. }
  997. }
  998. /*
  999. * The ctcm statemachine for a channel.
  1000. */
  1001. const fsm_node ch_fsm[] = {
  1002. { CTC_STATE_STOPPED, CTC_EVENT_STOP, ctcm_action_nop },
  1003. { CTC_STATE_STOPPED, CTC_EVENT_START, ctcm_chx_start },
  1004. { CTC_STATE_STOPPED, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1005. { CTC_STATE_STOPPED, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1006. { CTC_STATE_NOTOP, CTC_EVENT_STOP, ctcm_chx_stop },
  1007. { CTC_STATE_NOTOP, CTC_EVENT_START, ctcm_action_nop },
  1008. { CTC_STATE_NOTOP, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1009. { CTC_STATE_NOTOP, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1010. { CTC_STATE_NOTOP, CTC_EVENT_MC_GOOD, ctcm_chx_start },
  1011. { CTC_STATE_STARTWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1012. { CTC_STATE_STARTWAIT, CTC_EVENT_START, ctcm_action_nop },
  1013. { CTC_STATE_STARTWAIT, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1014. { CTC_STATE_STARTWAIT, CTC_EVENT_TIMER, ctcm_chx_setuperr },
  1015. { CTC_STATE_STARTWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1016. { CTC_STATE_STARTWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1017. { CTC_STATE_STARTRETRY, CTC_EVENT_STOP, ctcm_chx_haltio },
  1018. { CTC_STATE_STARTRETRY, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1019. { CTC_STATE_STARTRETRY, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1020. { CTC_STATE_STARTRETRY, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1021. { CTC_STATE_SETUPWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1022. { CTC_STATE_SETUPWAIT, CTC_EVENT_START, ctcm_action_nop },
  1023. { CTC_STATE_SETUPWAIT, CTC_EVENT_FINSTAT, chx_firstio },
  1024. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1025. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1026. { CTC_STATE_SETUPWAIT, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1027. { CTC_STATE_SETUPWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1028. { CTC_STATE_SETUPWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1029. { CTC_STATE_RXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1030. { CTC_STATE_RXINIT, CTC_EVENT_START, ctcm_action_nop },
  1031. { CTC_STATE_RXINIT, CTC_EVENT_FINSTAT, chx_rxidle },
  1032. { CTC_STATE_RXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_rxiniterr },
  1033. { CTC_STATE_RXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_rxiniterr },
  1034. { CTC_STATE_RXINIT, CTC_EVENT_TIMER, ctcm_chx_rxiniterr },
  1035. { CTC_STATE_RXINIT, CTC_EVENT_ATTNBUSY, ctcm_chx_rxinitfail },
  1036. { CTC_STATE_RXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1037. { CTC_STATE_RXINIT, CTC_EVENT_UC_ZERO, chx_firstio },
  1038. { CTC_STATE_RXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1039. { CTC_STATE_RXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1040. { CTC_STATE_RXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1041. { CTC_STATE_RXIDLE, CTC_EVENT_FINSTAT, chx_rx },
  1042. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_rxdisc },
  1043. { CTC_STATE_RXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1044. { CTC_STATE_RXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1045. { CTC_STATE_RXIDLE, CTC_EVENT_UC_ZERO, chx_rx },
  1046. { CTC_STATE_TXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1047. { CTC_STATE_TXINIT, CTC_EVENT_START, ctcm_action_nop },
  1048. { CTC_STATE_TXINIT, CTC_EVENT_FINSTAT, ctcm_chx_txidle },
  1049. { CTC_STATE_TXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_txiniterr },
  1050. { CTC_STATE_TXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_txiniterr },
  1051. { CTC_STATE_TXINIT, CTC_EVENT_TIMER, ctcm_chx_txiniterr },
  1052. { CTC_STATE_TXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1053. { CTC_STATE_TXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1054. { CTC_STATE_TXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1055. { CTC_STATE_TXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1056. { CTC_STATE_TXIDLE, CTC_EVENT_FINSTAT, chx_firstio },
  1057. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1058. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1059. { CTC_STATE_TXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1060. { CTC_STATE_TXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1061. { CTC_STATE_TERM, CTC_EVENT_STOP, ctcm_action_nop },
  1062. { CTC_STATE_TERM, CTC_EVENT_START, ctcm_chx_restart },
  1063. { CTC_STATE_TERM, CTC_EVENT_FINSTAT, ctcm_chx_stopped },
  1064. { CTC_STATE_TERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1065. { CTC_STATE_TERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1066. { CTC_STATE_TERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1067. { CTC_STATE_DTERM, CTC_EVENT_STOP, ctcm_chx_haltio },
  1068. { CTC_STATE_DTERM, CTC_EVENT_START, ctcm_chx_restart },
  1069. { CTC_STATE_DTERM, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1070. { CTC_STATE_DTERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1071. { CTC_STATE_DTERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1072. { CTC_STATE_DTERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1073. { CTC_STATE_TX, CTC_EVENT_STOP, ctcm_chx_haltio },
  1074. { CTC_STATE_TX, CTC_EVENT_START, ctcm_action_nop },
  1075. { CTC_STATE_TX, CTC_EVENT_FINSTAT, chx_txdone },
  1076. { CTC_STATE_TX, CTC_EVENT_UC_RCRESET, ctcm_chx_txretry },
  1077. { CTC_STATE_TX, CTC_EVENT_UC_RSRESET, ctcm_chx_txretry },
  1078. { CTC_STATE_TX, CTC_EVENT_TIMER, ctcm_chx_txretry },
  1079. { CTC_STATE_TX, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1080. { CTC_STATE_TX, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1081. { CTC_STATE_RXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1082. { CTC_STATE_TXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1083. { CTC_STATE_TXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1084. { CTC_STATE_RXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1085. };
  1086. int ch_fsm_len = ARRAY_SIZE(ch_fsm);
  1087. /*
  1088. * MPC actions for mpc channel statemachine
  1089. * handling of MPC protocol requires extra
  1090. * statemachine and actions which are prefixed ctcmpc_ .
  1091. * The ctc_ch_states and ctc_ch_state_names,
  1092. * ctc_ch_events and ctc_ch_event_names share the ctcm definitions
  1093. * which are expanded by some elements.
  1094. */
  1095. /*
  1096. * Actions for mpc channel statemachine.
  1097. */
  1098. /**
  1099. * Normal data has been send. Free the corresponding
  1100. * skb (it's in io_queue), reset dev->tbusy and
  1101. * revert to idle state.
  1102. *
  1103. * fi An instance of a channel statemachine.
  1104. * event The event, just happened.
  1105. * arg Generic pointer, casted from channel * upon call.
  1106. */
  1107. static void ctcmpc_chx_txdone(fsm_instance *fi, int event, void *arg)
  1108. {
  1109. struct channel *ch = arg;
  1110. struct net_device *dev = ch->netdev;
  1111. struct ctcm_priv *priv = dev->ml_priv;
  1112. struct mpc_group *grp = priv->mpcg;
  1113. struct sk_buff *skb;
  1114. int first = 1;
  1115. int i;
  1116. __u32 data_space;
  1117. unsigned long duration;
  1118. struct sk_buff *peekskb;
  1119. int rc;
  1120. struct th_header *header;
  1121. struct pdu *p_header;
  1122. unsigned long done_stamp = jiffies;
  1123. CTCM_PR_DEBUG("Enter %s: %s cp:%i\n",
  1124. __func__, dev->name, smp_processor_id());
  1125. duration = done_stamp - ch->prof.send_stamp;
  1126. if (duration > ch->prof.tx_time)
  1127. ch->prof.tx_time = duration;
  1128. if (ch->irb->scsw.cmd.count != 0)
  1129. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_DEBUG,
  1130. "%s(%s): TX not complete, remaining %d bytes",
  1131. CTCM_FUNTAIL, dev->name, ch->irb->scsw.cmd.count);
  1132. fsm_deltimer(&ch->timer);
  1133. while ((skb = skb_dequeue(&ch->io_queue))) {
  1134. priv->stats.tx_packets++;
  1135. priv->stats.tx_bytes += skb->len - TH_HEADER_LENGTH;
  1136. if (first) {
  1137. priv->stats.tx_bytes += 2;
  1138. first = 0;
  1139. }
  1140. refcount_dec(&skb->users);
  1141. dev_kfree_skb_irq(skb);
  1142. }
  1143. spin_lock(&ch->collect_lock);
  1144. clear_normalized_cda(&ch->ccw[4]);
  1145. if ((ch->collect_len <= 0) || (grp->in_sweep != 0)) {
  1146. spin_unlock(&ch->collect_lock);
  1147. fsm_newstate(fi, CTC_STATE_TXIDLE);
  1148. goto done;
  1149. }
  1150. if (ctcm_checkalloc_buffer(ch)) {
  1151. spin_unlock(&ch->collect_lock);
  1152. goto done;
  1153. }
  1154. ch->trans_skb->data = ch->trans_skb_data;
  1155. skb_reset_tail_pointer(ch->trans_skb);
  1156. ch->trans_skb->len = 0;
  1157. if (ch->prof.maxmulti < (ch->collect_len + TH_HEADER_LENGTH))
  1158. ch->prof.maxmulti = ch->collect_len + TH_HEADER_LENGTH;
  1159. if (ch->prof.maxcqueue < skb_queue_len(&ch->collect_queue))
  1160. ch->prof.maxcqueue = skb_queue_len(&ch->collect_queue);
  1161. i = 0;
  1162. p_header = NULL;
  1163. data_space = grp->group_max_buflen - TH_HEADER_LENGTH;
  1164. CTCM_PR_DBGDATA("%s: building trans_skb from collect_q"
  1165. " data_space:%04x\n",
  1166. __func__, data_space);
  1167. while ((skb = skb_dequeue(&ch->collect_queue))) {
  1168. skb_put_data(ch->trans_skb, skb->data, skb->len);
  1169. p_header = (struct pdu *)
  1170. (skb_tail_pointer(ch->trans_skb) - skb->len);
  1171. p_header->pdu_flag = 0x00;
  1172. if (be16_to_cpu(skb->protocol) == ETH_P_SNAP)
  1173. p_header->pdu_flag |= 0x60;
  1174. else
  1175. p_header->pdu_flag |= 0x20;
  1176. CTCM_PR_DBGDATA("%s: trans_skb len:%04x \n",
  1177. __func__, ch->trans_skb->len);
  1178. CTCM_PR_DBGDATA("%s: pdu header and data for up"
  1179. " to 32 bytes sent to vtam\n", __func__);
  1180. CTCM_D3_DUMP((char *)p_header, min_t(int, skb->len, 32));
  1181. ch->collect_len -= skb->len;
  1182. data_space -= skb->len;
  1183. priv->stats.tx_packets++;
  1184. priv->stats.tx_bytes += skb->len;
  1185. refcount_dec(&skb->users);
  1186. dev_kfree_skb_any(skb);
  1187. peekskb = skb_peek(&ch->collect_queue);
  1188. if (peekskb->len > data_space)
  1189. break;
  1190. i++;
  1191. }
  1192. /* p_header points to the last one we handled */
  1193. if (p_header)
  1194. p_header->pdu_flag |= PDU_LAST; /*Say it's the last one*/
  1195. header = kzalloc(TH_HEADER_LENGTH, gfp_type());
  1196. if (!header) {
  1197. spin_unlock(&ch->collect_lock);
  1198. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1199. goto done;
  1200. }
  1201. header->th_ch_flag = TH_HAS_PDU; /* Normal data */
  1202. ch->th_seq_num++;
  1203. header->th_seq_num = ch->th_seq_num;
  1204. CTCM_PR_DBGDATA("%s: ToVTAM_th_seq= %08x\n" ,
  1205. __func__, ch->th_seq_num);
  1206. memcpy(skb_push(ch->trans_skb, TH_HEADER_LENGTH), header,
  1207. TH_HEADER_LENGTH); /* put the TH on the packet */
  1208. kfree(header);
  1209. CTCM_PR_DBGDATA("%s: trans_skb len:%04x \n",
  1210. __func__, ch->trans_skb->len);
  1211. CTCM_PR_DBGDATA("%s: up-to-50 bytes of trans_skb "
  1212. "data to vtam from collect_q\n", __func__);
  1213. CTCM_D3_DUMP((char *)ch->trans_skb->data,
  1214. min_t(int, ch->trans_skb->len, 50));
  1215. spin_unlock(&ch->collect_lock);
  1216. clear_normalized_cda(&ch->ccw[1]);
  1217. CTCM_PR_DBGDATA("ccwcda=0x%p data=0x%p\n",
  1218. (void *)(unsigned long)ch->ccw[1].cda,
  1219. ch->trans_skb->data);
  1220. ch->ccw[1].count = ch->max_bufsize;
  1221. if (set_normalized_cda(&ch->ccw[1], ch->trans_skb->data)) {
  1222. dev_kfree_skb_any(ch->trans_skb);
  1223. ch->trans_skb = NULL;
  1224. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_ERROR,
  1225. "%s: %s: IDAL alloc failed",
  1226. CTCM_FUNTAIL, ch->id);
  1227. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1228. return;
  1229. }
  1230. CTCM_PR_DBGDATA("ccwcda=0x%p data=0x%p\n",
  1231. (void *)(unsigned long)ch->ccw[1].cda,
  1232. ch->trans_skb->data);
  1233. ch->ccw[1].count = ch->trans_skb->len;
  1234. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  1235. ch->prof.send_stamp = jiffies;
  1236. if (do_debug_ccw)
  1237. ctcmpc_dumpit((char *)&ch->ccw[0], sizeof(struct ccw1) * 3);
  1238. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  1239. (unsigned long)ch, 0xff, 0);
  1240. ch->prof.doios_multi++;
  1241. if (rc != 0) {
  1242. priv->stats.tx_dropped += i;
  1243. priv->stats.tx_errors += i;
  1244. fsm_deltimer(&ch->timer);
  1245. ctcm_ccw_check_rc(ch, rc, "chained TX");
  1246. }
  1247. done:
  1248. ctcm_clear_busy(dev);
  1249. return;
  1250. }
  1251. /**
  1252. * Got normal data, check for sanity, queue it up, allocate new buffer
  1253. * trigger bottom half, and initiate next read.
  1254. *
  1255. * fi An instance of a channel statemachine.
  1256. * event The event, just happened.
  1257. * arg Generic pointer, casted from channel * upon call.
  1258. */
  1259. static void ctcmpc_chx_rx(fsm_instance *fi, int event, void *arg)
  1260. {
  1261. struct channel *ch = arg;
  1262. struct net_device *dev = ch->netdev;
  1263. struct ctcm_priv *priv = dev->ml_priv;
  1264. struct mpc_group *grp = priv->mpcg;
  1265. struct sk_buff *skb = ch->trans_skb;
  1266. struct sk_buff *new_skb;
  1267. unsigned long saveflags = 0; /* avoids compiler warning */
  1268. int len = ch->max_bufsize - ch->irb->scsw.cmd.count;
  1269. CTCM_PR_DEBUG("%s: %s: cp:%i %s maxbuf : %04x, len: %04x\n",
  1270. CTCM_FUNTAIL, dev->name, smp_processor_id(),
  1271. ch->id, ch->max_bufsize, len);
  1272. fsm_deltimer(&ch->timer);
  1273. if (skb == NULL) {
  1274. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1275. "%s(%s): TRANS_SKB = NULL",
  1276. CTCM_FUNTAIL, dev->name);
  1277. goto again;
  1278. }
  1279. if (len < TH_HEADER_LENGTH) {
  1280. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1281. "%s(%s): packet length %d to short",
  1282. CTCM_FUNTAIL, dev->name, len);
  1283. priv->stats.rx_dropped++;
  1284. priv->stats.rx_length_errors++;
  1285. } else {
  1286. /* must have valid th header or game over */
  1287. __u32 block_len = len;
  1288. len = TH_HEADER_LENGTH + XID2_LENGTH + 4;
  1289. new_skb = __dev_alloc_skb(ch->max_bufsize, GFP_ATOMIC);
  1290. if (new_skb == NULL) {
  1291. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1292. "%s(%d): skb allocation failed",
  1293. CTCM_FUNTAIL, dev->name);
  1294. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1295. goto again;
  1296. }
  1297. switch (fsm_getstate(grp->fsm)) {
  1298. case MPCG_STATE_RESET:
  1299. case MPCG_STATE_INOP:
  1300. dev_kfree_skb_any(new_skb);
  1301. break;
  1302. case MPCG_STATE_FLOWC:
  1303. case MPCG_STATE_READY:
  1304. skb_put_data(new_skb, skb->data, block_len);
  1305. skb_queue_tail(&ch->io_queue, new_skb);
  1306. tasklet_schedule(&ch->ch_tasklet);
  1307. break;
  1308. default:
  1309. skb_put_data(new_skb, skb->data, len);
  1310. skb_queue_tail(&ch->io_queue, new_skb);
  1311. tasklet_hi_schedule(&ch->ch_tasklet);
  1312. break;
  1313. }
  1314. }
  1315. again:
  1316. switch (fsm_getstate(grp->fsm)) {
  1317. int rc, dolock;
  1318. case MPCG_STATE_FLOWC:
  1319. case MPCG_STATE_READY:
  1320. if (ctcm_checkalloc_buffer(ch))
  1321. break;
  1322. ch->trans_skb->data = ch->trans_skb_data;
  1323. skb_reset_tail_pointer(ch->trans_skb);
  1324. ch->trans_skb->len = 0;
  1325. ch->ccw[1].count = ch->max_bufsize;
  1326. if (do_debug_ccw)
  1327. ctcmpc_dumpit((char *)&ch->ccw[0],
  1328. sizeof(struct ccw1) * 3);
  1329. dolock = !in_irq();
  1330. if (dolock)
  1331. spin_lock_irqsave(
  1332. get_ccwdev_lock(ch->cdev), saveflags);
  1333. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  1334. (unsigned long)ch, 0xff, 0);
  1335. if (dolock) /* see remark about conditional locking */
  1336. spin_unlock_irqrestore(
  1337. get_ccwdev_lock(ch->cdev), saveflags);
  1338. if (rc != 0)
  1339. ctcm_ccw_check_rc(ch, rc, "normal RX");
  1340. default:
  1341. break;
  1342. }
  1343. CTCM_PR_DEBUG("Exit %s: %s, ch=0x%p, id=%s\n",
  1344. __func__, dev->name, ch, ch->id);
  1345. }
  1346. /**
  1347. * Initialize connection by sending a __u16 of value 0.
  1348. *
  1349. * fi An instance of a channel statemachine.
  1350. * event The event, just happened.
  1351. * arg Generic pointer, casted from channel * upon call.
  1352. */
  1353. static void ctcmpc_chx_firstio(fsm_instance *fi, int event, void *arg)
  1354. {
  1355. struct channel *ch = arg;
  1356. struct net_device *dev = ch->netdev;
  1357. struct ctcm_priv *priv = dev->ml_priv;
  1358. struct mpc_group *gptr = priv->mpcg;
  1359. CTCM_PR_DEBUG("Enter %s: id=%s, ch=0x%p\n",
  1360. __func__, ch->id, ch);
  1361. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_INFO,
  1362. "%s: %s: chstate:%i, grpstate:%i, prot:%i\n",
  1363. CTCM_FUNTAIL, ch->id, fsm_getstate(fi),
  1364. fsm_getstate(gptr->fsm), ch->protocol);
  1365. if (fsm_getstate(fi) == CTC_STATE_TXIDLE)
  1366. MPC_DBF_DEV_NAME(TRACE, dev, "remote side issued READ? ");
  1367. fsm_deltimer(&ch->timer);
  1368. if (ctcm_checkalloc_buffer(ch))
  1369. goto done;
  1370. switch (fsm_getstate(fi)) {
  1371. case CTC_STATE_STARTRETRY:
  1372. case CTC_STATE_SETUPWAIT:
  1373. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  1374. ctcmpc_chx_rxidle(fi, event, arg);
  1375. } else {
  1376. fsm_newstate(fi, CTC_STATE_TXIDLE);
  1377. fsm_event(priv->fsm, DEV_EVENT_TXUP, dev);
  1378. }
  1379. goto done;
  1380. default:
  1381. break;
  1382. }
  1383. fsm_newstate(fi, (CHANNEL_DIRECTION(ch->flags) == CTCM_READ)
  1384. ? CTC_STATE_RXINIT : CTC_STATE_TXINIT);
  1385. done:
  1386. CTCM_PR_DEBUG("Exit %s: id=%s, ch=0x%p\n",
  1387. __func__, ch->id, ch);
  1388. return;
  1389. }
  1390. /**
  1391. * Got initial data, check it. If OK,
  1392. * notify device statemachine that we are up and
  1393. * running.
  1394. *
  1395. * fi An instance of a channel statemachine.
  1396. * event The event, just happened.
  1397. * arg Generic pointer, casted from channel * upon call.
  1398. */
  1399. void ctcmpc_chx_rxidle(fsm_instance *fi, int event, void *arg)
  1400. {
  1401. struct channel *ch = arg;
  1402. struct net_device *dev = ch->netdev;
  1403. struct ctcm_priv *priv = dev->ml_priv;
  1404. struct mpc_group *grp = priv->mpcg;
  1405. int rc;
  1406. unsigned long saveflags = 0; /* avoids compiler warning */
  1407. fsm_deltimer(&ch->timer);
  1408. CTCM_PR_DEBUG("%s: %s: %s: cp:%i, chstate:%i grpstate:%i\n",
  1409. __func__, ch->id, dev->name, smp_processor_id(),
  1410. fsm_getstate(fi), fsm_getstate(grp->fsm));
  1411. fsm_newstate(fi, CTC_STATE_RXIDLE);
  1412. /* XID processing complete */
  1413. switch (fsm_getstate(grp->fsm)) {
  1414. case MPCG_STATE_FLOWC:
  1415. case MPCG_STATE_READY:
  1416. if (ctcm_checkalloc_buffer(ch))
  1417. goto done;
  1418. ch->trans_skb->data = ch->trans_skb_data;
  1419. skb_reset_tail_pointer(ch->trans_skb);
  1420. ch->trans_skb->len = 0;
  1421. ch->ccw[1].count = ch->max_bufsize;
  1422. CTCM_CCW_DUMP((char *)&ch->ccw[0], sizeof(struct ccw1) * 3);
  1423. if (event == CTC_EVENT_START)
  1424. /* see remark about conditional locking */
  1425. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  1426. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  1427. (unsigned long)ch, 0xff, 0);
  1428. if (event == CTC_EVENT_START)
  1429. spin_unlock_irqrestore(
  1430. get_ccwdev_lock(ch->cdev), saveflags);
  1431. if (rc != 0) {
  1432. fsm_newstate(fi, CTC_STATE_RXINIT);
  1433. ctcm_ccw_check_rc(ch, rc, "initial RX");
  1434. goto done;
  1435. }
  1436. break;
  1437. default:
  1438. break;
  1439. }
  1440. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  1441. done:
  1442. return;
  1443. }
  1444. /*
  1445. * ctcmpc channel FSM action
  1446. * called from several points in ctcmpc_ch_fsm
  1447. * ctcmpc only
  1448. */
  1449. static void ctcmpc_chx_attn(fsm_instance *fsm, int event, void *arg)
  1450. {
  1451. struct channel *ch = arg;
  1452. struct net_device *dev = ch->netdev;
  1453. struct ctcm_priv *priv = dev->ml_priv;
  1454. struct mpc_group *grp = priv->mpcg;
  1455. CTCM_PR_DEBUG("%s(%s): %s(ch=0x%p), cp=%i, ChStat:%s, GrpStat:%s\n",
  1456. __func__, dev->name, ch->id, ch, smp_processor_id(),
  1457. fsm_getstate_str(ch->fsm), fsm_getstate_str(grp->fsm));
  1458. switch (fsm_getstate(grp->fsm)) {
  1459. case MPCG_STATE_XID2INITW:
  1460. /* ok..start yside xid exchanges */
  1461. if (!ch->in_mpcgroup)
  1462. break;
  1463. if (fsm_getstate(ch->fsm) == CH_XID0_PENDING) {
  1464. fsm_deltimer(&grp->timer);
  1465. fsm_addtimer(&grp->timer,
  1466. MPC_XID_TIMEOUT_VALUE,
  1467. MPCG_EVENT_TIMER, dev);
  1468. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1469. } else if (fsm_getstate(ch->fsm) < CH_XID7_PENDING1)
  1470. /* attn rcvd before xid0 processed via bh */
  1471. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1472. break;
  1473. case MPCG_STATE_XID2INITX:
  1474. case MPCG_STATE_XID0IOWAIT:
  1475. case MPCG_STATE_XID0IOWAIX:
  1476. /* attn rcvd before xid0 processed on ch
  1477. but mid-xid0 processing for group */
  1478. if (fsm_getstate(ch->fsm) < CH_XID7_PENDING1)
  1479. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1480. break;
  1481. case MPCG_STATE_XID7INITW:
  1482. case MPCG_STATE_XID7INITX:
  1483. case MPCG_STATE_XID7INITI:
  1484. case MPCG_STATE_XID7INITZ:
  1485. switch (fsm_getstate(ch->fsm)) {
  1486. case CH_XID7_PENDING:
  1487. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1488. break;
  1489. case CH_XID7_PENDING2:
  1490. fsm_newstate(ch->fsm, CH_XID7_PENDING3);
  1491. break;
  1492. }
  1493. fsm_event(grp->fsm, MPCG_EVENT_XID7DONE, dev);
  1494. break;
  1495. }
  1496. return;
  1497. }
  1498. /*
  1499. * ctcmpc channel FSM action
  1500. * called from one point in ctcmpc_ch_fsm
  1501. * ctcmpc only
  1502. */
  1503. static void ctcmpc_chx_attnbusy(fsm_instance *fsm, int event, void *arg)
  1504. {
  1505. struct channel *ch = arg;
  1506. struct net_device *dev = ch->netdev;
  1507. struct ctcm_priv *priv = dev->ml_priv;
  1508. struct mpc_group *grp = priv->mpcg;
  1509. CTCM_PR_DEBUG("%s(%s): %s\n ChState:%s GrpState:%s\n",
  1510. __func__, dev->name, ch->id,
  1511. fsm_getstate_str(ch->fsm), fsm_getstate_str(grp->fsm));
  1512. fsm_deltimer(&ch->timer);
  1513. switch (fsm_getstate(grp->fsm)) {
  1514. case MPCG_STATE_XID0IOWAIT:
  1515. /* vtam wants to be primary.start yside xid exchanges*/
  1516. /* only receive one attn-busy at a time so must not */
  1517. /* change state each time */
  1518. grp->changed_side = 1;
  1519. fsm_newstate(grp->fsm, MPCG_STATE_XID2INITW);
  1520. break;
  1521. case MPCG_STATE_XID2INITW:
  1522. if (grp->changed_side == 1) {
  1523. grp->changed_side = 2;
  1524. break;
  1525. }
  1526. /* process began via call to establish_conn */
  1527. /* so must report failure instead of reverting */
  1528. /* back to ready-for-xid passive state */
  1529. if (grp->estconnfunc)
  1530. goto done;
  1531. /* this attnbusy is NOT the result of xside xid */
  1532. /* collisions so yside must have been triggered */
  1533. /* by an ATTN that was not intended to start XID */
  1534. /* processing. Revert back to ready-for-xid and */
  1535. /* wait for ATTN interrupt to signal xid start */
  1536. if (fsm_getstate(ch->fsm) == CH_XID0_INPROGRESS) {
  1537. fsm_newstate(ch->fsm, CH_XID0_PENDING) ;
  1538. fsm_deltimer(&grp->timer);
  1539. goto done;
  1540. }
  1541. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1542. goto done;
  1543. case MPCG_STATE_XID2INITX:
  1544. /* XID2 was received before ATTN Busy for second
  1545. channel.Send yside xid for second channel.
  1546. */
  1547. if (grp->changed_side == 1) {
  1548. grp->changed_side = 2;
  1549. break;
  1550. }
  1551. case MPCG_STATE_XID0IOWAIX:
  1552. case MPCG_STATE_XID7INITW:
  1553. case MPCG_STATE_XID7INITX:
  1554. case MPCG_STATE_XID7INITI:
  1555. case MPCG_STATE_XID7INITZ:
  1556. default:
  1557. /* multiple attn-busy indicates too out-of-sync */
  1558. /* and they are certainly not being received as part */
  1559. /* of valid mpc group negotiations.. */
  1560. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1561. goto done;
  1562. }
  1563. if (grp->changed_side == 1) {
  1564. fsm_deltimer(&grp->timer);
  1565. fsm_addtimer(&grp->timer, MPC_XID_TIMEOUT_VALUE,
  1566. MPCG_EVENT_TIMER, dev);
  1567. }
  1568. if (ch->in_mpcgroup)
  1569. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1570. else
  1571. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1572. "%s(%s): channel %s not added to group",
  1573. CTCM_FUNTAIL, dev->name, ch->id);
  1574. done:
  1575. return;
  1576. }
  1577. /*
  1578. * ctcmpc channel FSM action
  1579. * called from several points in ctcmpc_ch_fsm
  1580. * ctcmpc only
  1581. */
  1582. static void ctcmpc_chx_resend(fsm_instance *fsm, int event, void *arg)
  1583. {
  1584. struct channel *ch = arg;
  1585. struct net_device *dev = ch->netdev;
  1586. struct ctcm_priv *priv = dev->ml_priv;
  1587. struct mpc_group *grp = priv->mpcg;
  1588. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1589. return;
  1590. }
  1591. /*
  1592. * ctcmpc channel FSM action
  1593. * called from several points in ctcmpc_ch_fsm
  1594. * ctcmpc only
  1595. */
  1596. static void ctcmpc_chx_send_sweep(fsm_instance *fsm, int event, void *arg)
  1597. {
  1598. struct channel *ach = arg;
  1599. struct net_device *dev = ach->netdev;
  1600. struct ctcm_priv *priv = dev->ml_priv;
  1601. struct mpc_group *grp = priv->mpcg;
  1602. struct channel *wch = priv->channel[CTCM_WRITE];
  1603. struct channel *rch = priv->channel[CTCM_READ];
  1604. struct sk_buff *skb;
  1605. struct th_sweep *header;
  1606. int rc = 0;
  1607. unsigned long saveflags = 0;
  1608. CTCM_PR_DEBUG("ctcmpc enter: %s(): cp=%i ch=0x%p id=%s\n",
  1609. __func__, smp_processor_id(), ach, ach->id);
  1610. if (grp->in_sweep == 0)
  1611. goto done;
  1612. CTCM_PR_DBGDATA("%s: 1: ToVTAM_th_seq= %08x\n" ,
  1613. __func__, wch->th_seq_num);
  1614. CTCM_PR_DBGDATA("%s: 1: FromVTAM_th_seq= %08x\n" ,
  1615. __func__, rch->th_seq_num);
  1616. if (fsm_getstate(wch->fsm) != CTC_STATE_TXIDLE) {
  1617. /* give the previous IO time to complete */
  1618. fsm_addtimer(&wch->sweep_timer,
  1619. 200, CTC_EVENT_RSWEEP_TIMER, wch);
  1620. goto done;
  1621. }
  1622. skb = skb_dequeue(&wch->sweep_queue);
  1623. if (!skb)
  1624. goto done;
  1625. if (set_normalized_cda(&wch->ccw[4], skb->data)) {
  1626. grp->in_sweep = 0;
  1627. ctcm_clear_busy_do(dev);
  1628. dev_kfree_skb_any(skb);
  1629. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1630. goto done;
  1631. } else {
  1632. refcount_inc(&skb->users);
  1633. skb_queue_tail(&wch->io_queue, skb);
  1634. }
  1635. /* send out the sweep */
  1636. wch->ccw[4].count = skb->len;
  1637. header = (struct th_sweep *)skb->data;
  1638. switch (header->th.th_ch_flag) {
  1639. case TH_SWEEP_REQ:
  1640. grp->sweep_req_pend_num--;
  1641. break;
  1642. case TH_SWEEP_RESP:
  1643. grp->sweep_rsp_pend_num--;
  1644. break;
  1645. }
  1646. header->sw.th_last_seq = wch->th_seq_num;
  1647. CTCM_CCW_DUMP((char *)&wch->ccw[3], sizeof(struct ccw1) * 3);
  1648. CTCM_PR_DBGDATA("%s: sweep packet\n", __func__);
  1649. CTCM_D3_DUMP((char *)header, TH_SWEEP_LENGTH);
  1650. fsm_addtimer(&wch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, wch);
  1651. fsm_newstate(wch->fsm, CTC_STATE_TX);
  1652. spin_lock_irqsave(get_ccwdev_lock(wch->cdev), saveflags);
  1653. wch->prof.send_stamp = jiffies;
  1654. rc = ccw_device_start(wch->cdev, &wch->ccw[3],
  1655. (unsigned long) wch, 0xff, 0);
  1656. spin_unlock_irqrestore(get_ccwdev_lock(wch->cdev), saveflags);
  1657. if ((grp->sweep_req_pend_num == 0) &&
  1658. (grp->sweep_rsp_pend_num == 0)) {
  1659. grp->in_sweep = 0;
  1660. rch->th_seq_num = 0x00;
  1661. wch->th_seq_num = 0x00;
  1662. ctcm_clear_busy_do(dev);
  1663. }
  1664. CTCM_PR_DBGDATA("%s: To-/From-VTAM_th_seq = %08x/%08x\n" ,
  1665. __func__, wch->th_seq_num, rch->th_seq_num);
  1666. if (rc != 0)
  1667. ctcm_ccw_check_rc(wch, rc, "send sweep");
  1668. done:
  1669. return;
  1670. }
  1671. /*
  1672. * The ctcmpc statemachine for a channel.
  1673. */
  1674. const fsm_node ctcmpc_ch_fsm[] = {
  1675. { CTC_STATE_STOPPED, CTC_EVENT_STOP, ctcm_action_nop },
  1676. { CTC_STATE_STOPPED, CTC_EVENT_START, ctcm_chx_start },
  1677. { CTC_STATE_STOPPED, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1678. { CTC_STATE_STOPPED, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1679. { CTC_STATE_STOPPED, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1680. { CTC_STATE_NOTOP, CTC_EVENT_STOP, ctcm_chx_stop },
  1681. { CTC_STATE_NOTOP, CTC_EVENT_START, ctcm_action_nop },
  1682. { CTC_STATE_NOTOP, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1683. { CTC_STATE_NOTOP, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1684. { CTC_STATE_NOTOP, CTC_EVENT_MC_GOOD, ctcm_chx_start },
  1685. { CTC_STATE_NOTOP, CTC_EVENT_UC_RCRESET, ctcm_chx_stop },
  1686. { CTC_STATE_NOTOP, CTC_EVENT_UC_RSRESET, ctcm_chx_stop },
  1687. { CTC_STATE_NOTOP, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1688. { CTC_STATE_STARTWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1689. { CTC_STATE_STARTWAIT, CTC_EVENT_START, ctcm_action_nop },
  1690. { CTC_STATE_STARTWAIT, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1691. { CTC_STATE_STARTWAIT, CTC_EVENT_TIMER, ctcm_chx_setuperr },
  1692. { CTC_STATE_STARTWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1693. { CTC_STATE_STARTWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1694. { CTC_STATE_STARTRETRY, CTC_EVENT_STOP, ctcm_chx_haltio },
  1695. { CTC_STATE_STARTRETRY, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1696. { CTC_STATE_STARTRETRY, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1697. { CTC_STATE_STARTRETRY, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1698. { CTC_STATE_STARTRETRY, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1699. { CTC_STATE_SETUPWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1700. { CTC_STATE_SETUPWAIT, CTC_EVENT_START, ctcm_action_nop },
  1701. { CTC_STATE_SETUPWAIT, CTC_EVENT_FINSTAT, ctcmpc_chx_firstio },
  1702. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1703. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1704. { CTC_STATE_SETUPWAIT, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1705. { CTC_STATE_SETUPWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1706. { CTC_STATE_SETUPWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1707. { CTC_STATE_RXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1708. { CTC_STATE_RXINIT, CTC_EVENT_START, ctcm_action_nop },
  1709. { CTC_STATE_RXINIT, CTC_EVENT_FINSTAT, ctcmpc_chx_rxidle },
  1710. { CTC_STATE_RXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_rxiniterr },
  1711. { CTC_STATE_RXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_rxiniterr },
  1712. { CTC_STATE_RXINIT, CTC_EVENT_TIMER, ctcm_chx_rxiniterr },
  1713. { CTC_STATE_RXINIT, CTC_EVENT_ATTNBUSY, ctcm_chx_rxinitfail },
  1714. { CTC_STATE_RXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1715. { CTC_STATE_RXINIT, CTC_EVENT_UC_ZERO, ctcmpc_chx_firstio },
  1716. { CTC_STATE_RXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1717. { CH_XID0_PENDING, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1718. { CH_XID0_PENDING, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1719. { CH_XID0_PENDING, CTC_EVENT_STOP, ctcm_chx_haltio },
  1720. { CH_XID0_PENDING, CTC_EVENT_START, ctcm_action_nop },
  1721. { CH_XID0_PENDING, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1722. { CH_XID0_PENDING, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1723. { CH_XID0_PENDING, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1724. { CH_XID0_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1725. { CH_XID0_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1726. { CH_XID0_PENDING, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1727. { CH_XID0_INPROGRESS, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1728. { CH_XID0_INPROGRESS, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1729. { CH_XID0_INPROGRESS, CTC_EVENT_STOP, ctcm_chx_haltio },
  1730. { CH_XID0_INPROGRESS, CTC_EVENT_START, ctcm_action_nop },
  1731. { CH_XID0_INPROGRESS, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1732. { CH_XID0_INPROGRESS, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1733. { CH_XID0_INPROGRESS, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1734. { CH_XID0_INPROGRESS, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1735. { CH_XID0_INPROGRESS, CTC_EVENT_ATTNBUSY, ctcmpc_chx_attnbusy },
  1736. { CH_XID0_INPROGRESS, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1737. { CH_XID0_INPROGRESS, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1738. { CH_XID7_PENDING, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1739. { CH_XID7_PENDING, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1740. { CH_XID7_PENDING, CTC_EVENT_STOP, ctcm_chx_haltio },
  1741. { CH_XID7_PENDING, CTC_EVENT_START, ctcm_action_nop },
  1742. { CH_XID7_PENDING, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1743. { CH_XID7_PENDING, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1744. { CH_XID7_PENDING, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1745. { CH_XID7_PENDING, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1746. { CH_XID7_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1747. { CH_XID7_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1748. { CH_XID7_PENDING, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1749. { CH_XID7_PENDING, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1750. { CH_XID7_PENDING, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1751. { CH_XID7_PENDING1, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1752. { CH_XID7_PENDING1, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1753. { CH_XID7_PENDING1, CTC_EVENT_STOP, ctcm_chx_haltio },
  1754. { CH_XID7_PENDING1, CTC_EVENT_START, ctcm_action_nop },
  1755. { CH_XID7_PENDING1, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1756. { CH_XID7_PENDING1, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1757. { CH_XID7_PENDING1, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1758. { CH_XID7_PENDING1, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1759. { CH_XID7_PENDING1, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1760. { CH_XID7_PENDING1, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1761. { CH_XID7_PENDING1, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1762. { CH_XID7_PENDING1, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1763. { CH_XID7_PENDING2, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1764. { CH_XID7_PENDING2, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1765. { CH_XID7_PENDING2, CTC_EVENT_STOP, ctcm_chx_haltio },
  1766. { CH_XID7_PENDING2, CTC_EVENT_START, ctcm_action_nop },
  1767. { CH_XID7_PENDING2, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1768. { CH_XID7_PENDING2, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1769. { CH_XID7_PENDING2, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1770. { CH_XID7_PENDING2, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1771. { CH_XID7_PENDING2, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1772. { CH_XID7_PENDING2, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1773. { CH_XID7_PENDING2, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1774. { CH_XID7_PENDING2, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1775. { CH_XID7_PENDING3, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1776. { CH_XID7_PENDING3, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1777. { CH_XID7_PENDING3, CTC_EVENT_STOP, ctcm_chx_haltio },
  1778. { CH_XID7_PENDING3, CTC_EVENT_START, ctcm_action_nop },
  1779. { CH_XID7_PENDING3, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1780. { CH_XID7_PENDING3, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1781. { CH_XID7_PENDING3, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1782. { CH_XID7_PENDING3, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1783. { CH_XID7_PENDING3, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1784. { CH_XID7_PENDING3, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1785. { CH_XID7_PENDING3, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1786. { CH_XID7_PENDING3, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1787. { CH_XID7_PENDING4, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1788. { CH_XID7_PENDING4, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1789. { CH_XID7_PENDING4, CTC_EVENT_STOP, ctcm_chx_haltio },
  1790. { CH_XID7_PENDING4, CTC_EVENT_START, ctcm_action_nop },
  1791. { CH_XID7_PENDING4, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1792. { CH_XID7_PENDING4, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1793. { CH_XID7_PENDING4, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1794. { CH_XID7_PENDING4, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1795. { CH_XID7_PENDING4, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1796. { CH_XID7_PENDING4, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1797. { CH_XID7_PENDING4, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1798. { CH_XID7_PENDING4, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1799. { CTC_STATE_RXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1800. { CTC_STATE_RXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1801. { CTC_STATE_RXIDLE, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1802. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_rxdisc },
  1803. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1804. { CTC_STATE_RXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1805. { CTC_STATE_RXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1806. { CTC_STATE_RXIDLE, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1807. { CTC_STATE_TXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1808. { CTC_STATE_TXINIT, CTC_EVENT_START, ctcm_action_nop },
  1809. { CTC_STATE_TXINIT, CTC_EVENT_FINSTAT, ctcm_chx_txidle },
  1810. { CTC_STATE_TXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_txiniterr },
  1811. { CTC_STATE_TXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_txiniterr },
  1812. { CTC_STATE_TXINIT, CTC_EVENT_TIMER, ctcm_chx_txiniterr },
  1813. { CTC_STATE_TXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1814. { CTC_STATE_TXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1815. { CTC_STATE_TXINIT, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1816. { CTC_STATE_TXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1817. { CTC_STATE_TXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1818. { CTC_STATE_TXIDLE, CTC_EVENT_FINSTAT, ctcmpc_chx_firstio },
  1819. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_fail },
  1820. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1821. { CTC_STATE_TXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1822. { CTC_STATE_TXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1823. { CTC_STATE_TXIDLE, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1824. { CTC_STATE_TERM, CTC_EVENT_STOP, ctcm_action_nop },
  1825. { CTC_STATE_TERM, CTC_EVENT_START, ctcm_chx_restart },
  1826. { CTC_STATE_TERM, CTC_EVENT_FINSTAT, ctcm_chx_stopped },
  1827. { CTC_STATE_TERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1828. { CTC_STATE_TERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1829. { CTC_STATE_TERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1830. { CTC_STATE_TERM, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1831. { CTC_STATE_TERM, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1832. { CTC_STATE_DTERM, CTC_EVENT_STOP, ctcm_chx_haltio },
  1833. { CTC_STATE_DTERM, CTC_EVENT_START, ctcm_chx_restart },
  1834. { CTC_STATE_DTERM, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1835. { CTC_STATE_DTERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1836. { CTC_STATE_DTERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1837. { CTC_STATE_DTERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1838. { CTC_STATE_DTERM, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1839. { CTC_STATE_TX, CTC_EVENT_STOP, ctcm_chx_haltio },
  1840. { CTC_STATE_TX, CTC_EVENT_START, ctcm_action_nop },
  1841. { CTC_STATE_TX, CTC_EVENT_FINSTAT, ctcmpc_chx_txdone },
  1842. { CTC_STATE_TX, CTC_EVENT_UC_RCRESET, ctcm_chx_fail },
  1843. { CTC_STATE_TX, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1844. { CTC_STATE_TX, CTC_EVENT_TIMER, ctcm_chx_txretry },
  1845. { CTC_STATE_TX, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1846. { CTC_STATE_TX, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1847. { CTC_STATE_TX, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1848. { CTC_STATE_TX, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1849. { CTC_STATE_RXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1850. { CTC_STATE_TXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1851. { CTC_STATE_TXERR, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1852. { CTC_STATE_TXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1853. { CTC_STATE_RXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1854. };
  1855. int mpc_ch_fsm_len = ARRAY_SIZE(ctcmpc_ch_fsm);
  1856. /*
  1857. * Actions for interface - statemachine.
  1858. */
  1859. /**
  1860. * Startup channels by sending CTC_EVENT_START to each channel.
  1861. *
  1862. * fi An instance of an interface statemachine.
  1863. * event The event, just happened.
  1864. * arg Generic pointer, casted from struct net_device * upon call.
  1865. */
  1866. static void dev_action_start(fsm_instance *fi, int event, void *arg)
  1867. {
  1868. struct net_device *dev = arg;
  1869. struct ctcm_priv *priv = dev->ml_priv;
  1870. int direction;
  1871. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1872. fsm_deltimer(&priv->restart_timer);
  1873. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  1874. if (IS_MPC(priv))
  1875. priv->mpcg->channels_terminating = 0;
  1876. for (direction = CTCM_READ; direction <= CTCM_WRITE; direction++) {
  1877. struct channel *ch = priv->channel[direction];
  1878. fsm_event(ch->fsm, CTC_EVENT_START, ch);
  1879. }
  1880. }
  1881. /**
  1882. * Shutdown channels by sending CTC_EVENT_STOP to each channel.
  1883. *
  1884. * fi An instance of an interface statemachine.
  1885. * event The event, just happened.
  1886. * arg Generic pointer, casted from struct net_device * upon call.
  1887. */
  1888. static void dev_action_stop(fsm_instance *fi, int event, void *arg)
  1889. {
  1890. int direction;
  1891. struct net_device *dev = arg;
  1892. struct ctcm_priv *priv = dev->ml_priv;
  1893. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1894. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1895. for (direction = CTCM_READ; direction <= CTCM_WRITE; direction++) {
  1896. struct channel *ch = priv->channel[direction];
  1897. fsm_event(ch->fsm, CTC_EVENT_STOP, ch);
  1898. ch->th_seq_num = 0x00;
  1899. CTCM_PR_DEBUG("%s: CH_th_seq= %08x\n",
  1900. __func__, ch->th_seq_num);
  1901. }
  1902. if (IS_MPC(priv))
  1903. fsm_newstate(priv->mpcg->fsm, MPCG_STATE_RESET);
  1904. }
  1905. static void dev_action_restart(fsm_instance *fi, int event, void *arg)
  1906. {
  1907. int restart_timer;
  1908. struct net_device *dev = arg;
  1909. struct ctcm_priv *priv = dev->ml_priv;
  1910. CTCMY_DBF_DEV_NAME(TRACE, dev, "");
  1911. if (IS_MPC(priv)) {
  1912. restart_timer = CTCM_TIME_1_SEC;
  1913. } else {
  1914. restart_timer = CTCM_TIME_5_SEC;
  1915. }
  1916. dev_info(&dev->dev, "Restarting device\n");
  1917. dev_action_stop(fi, event, arg);
  1918. fsm_event(priv->fsm, DEV_EVENT_STOP, dev);
  1919. if (IS_MPC(priv))
  1920. fsm_newstate(priv->mpcg->fsm, MPCG_STATE_RESET);
  1921. /* going back into start sequence too quickly can */
  1922. /* result in the other side becoming unreachable due */
  1923. /* to sense reported when IO is aborted */
  1924. fsm_addtimer(&priv->restart_timer, restart_timer,
  1925. DEV_EVENT_START, dev);
  1926. }
  1927. /**
  1928. * Called from channel statemachine
  1929. * when a channel is up and running.
  1930. *
  1931. * fi An instance of an interface statemachine.
  1932. * event The event, just happened.
  1933. * arg Generic pointer, casted from struct net_device * upon call.
  1934. */
  1935. static void dev_action_chup(fsm_instance *fi, int event, void *arg)
  1936. {
  1937. struct net_device *dev = arg;
  1938. struct ctcm_priv *priv = dev->ml_priv;
  1939. int dev_stat = fsm_getstate(fi);
  1940. CTCM_DBF_TEXT_(SETUP, CTC_DBF_NOTICE,
  1941. "%s(%s): priv = %p [%d,%d]\n ", CTCM_FUNTAIL,
  1942. dev->name, dev->ml_priv, dev_stat, event);
  1943. switch (fsm_getstate(fi)) {
  1944. case DEV_STATE_STARTWAIT_RXTX:
  1945. if (event == DEV_EVENT_RXUP)
  1946. fsm_newstate(fi, DEV_STATE_STARTWAIT_TX);
  1947. else
  1948. fsm_newstate(fi, DEV_STATE_STARTWAIT_RX);
  1949. break;
  1950. case DEV_STATE_STARTWAIT_RX:
  1951. if (event == DEV_EVENT_RXUP) {
  1952. fsm_newstate(fi, DEV_STATE_RUNNING);
  1953. dev_info(&dev->dev,
  1954. "Connected with remote side\n");
  1955. ctcm_clear_busy(dev);
  1956. }
  1957. break;
  1958. case DEV_STATE_STARTWAIT_TX:
  1959. if (event == DEV_EVENT_TXUP) {
  1960. fsm_newstate(fi, DEV_STATE_RUNNING);
  1961. dev_info(&dev->dev,
  1962. "Connected with remote side\n");
  1963. ctcm_clear_busy(dev);
  1964. }
  1965. break;
  1966. case DEV_STATE_STOPWAIT_TX:
  1967. if (event == DEV_EVENT_RXUP)
  1968. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1969. break;
  1970. case DEV_STATE_STOPWAIT_RX:
  1971. if (event == DEV_EVENT_TXUP)
  1972. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1973. break;
  1974. }
  1975. if (IS_MPC(priv)) {
  1976. if (event == DEV_EVENT_RXUP)
  1977. mpc_channel_action(priv->channel[CTCM_READ],
  1978. CTCM_READ, MPC_CHANNEL_ADD);
  1979. else
  1980. mpc_channel_action(priv->channel[CTCM_WRITE],
  1981. CTCM_WRITE, MPC_CHANNEL_ADD);
  1982. }
  1983. }
  1984. /**
  1985. * Called from device statemachine
  1986. * when a channel has been shutdown.
  1987. *
  1988. * fi An instance of an interface statemachine.
  1989. * event The event, just happened.
  1990. * arg Generic pointer, casted from struct net_device * upon call.
  1991. */
  1992. static void dev_action_chdown(fsm_instance *fi, int event, void *arg)
  1993. {
  1994. struct net_device *dev = arg;
  1995. struct ctcm_priv *priv = dev->ml_priv;
  1996. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1997. switch (fsm_getstate(fi)) {
  1998. case DEV_STATE_RUNNING:
  1999. if (event == DEV_EVENT_TXDOWN)
  2000. fsm_newstate(fi, DEV_STATE_STARTWAIT_TX);
  2001. else
  2002. fsm_newstate(fi, DEV_STATE_STARTWAIT_RX);
  2003. break;
  2004. case DEV_STATE_STARTWAIT_RX:
  2005. if (event == DEV_EVENT_TXDOWN)
  2006. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  2007. break;
  2008. case DEV_STATE_STARTWAIT_TX:
  2009. if (event == DEV_EVENT_RXDOWN)
  2010. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  2011. break;
  2012. case DEV_STATE_STOPWAIT_RXTX:
  2013. if (event == DEV_EVENT_TXDOWN)
  2014. fsm_newstate(fi, DEV_STATE_STOPWAIT_RX);
  2015. else
  2016. fsm_newstate(fi, DEV_STATE_STOPWAIT_TX);
  2017. break;
  2018. case DEV_STATE_STOPWAIT_RX:
  2019. if (event == DEV_EVENT_RXDOWN)
  2020. fsm_newstate(fi, DEV_STATE_STOPPED);
  2021. break;
  2022. case DEV_STATE_STOPWAIT_TX:
  2023. if (event == DEV_EVENT_TXDOWN)
  2024. fsm_newstate(fi, DEV_STATE_STOPPED);
  2025. break;
  2026. }
  2027. if (IS_MPC(priv)) {
  2028. if (event == DEV_EVENT_RXDOWN)
  2029. mpc_channel_action(priv->channel[CTCM_READ],
  2030. CTCM_READ, MPC_CHANNEL_REMOVE);
  2031. else
  2032. mpc_channel_action(priv->channel[CTCM_WRITE],
  2033. CTCM_WRITE, MPC_CHANNEL_REMOVE);
  2034. }
  2035. }
  2036. const fsm_node dev_fsm[] = {
  2037. { DEV_STATE_STOPPED, DEV_EVENT_START, dev_action_start },
  2038. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_START, dev_action_start },
  2039. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2040. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2041. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_RESTART, dev_action_restart },
  2042. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_START, dev_action_start },
  2043. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RXUP, dev_action_chup },
  2044. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_TXUP, dev_action_chup },
  2045. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2046. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RESTART, dev_action_restart },
  2047. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_START, dev_action_start },
  2048. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_RXUP, dev_action_chup },
  2049. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_TXUP, dev_action_chup },
  2050. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2051. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_RESTART, dev_action_restart },
  2052. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_STOP, dev_action_stop },
  2053. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RXUP, dev_action_chup },
  2054. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_TXUP, dev_action_chup },
  2055. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2056. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2057. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RESTART, dev_action_restart },
  2058. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_STOP, dev_action_stop },
  2059. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RXUP, dev_action_chup },
  2060. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_TXUP, dev_action_chup },
  2061. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2062. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RESTART, dev_action_restart },
  2063. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_STOP, dev_action_stop },
  2064. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_RXUP, dev_action_chup },
  2065. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_TXUP, dev_action_chup },
  2066. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2067. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_RESTART, dev_action_restart },
  2068. { DEV_STATE_RUNNING, DEV_EVENT_STOP, dev_action_stop },
  2069. { DEV_STATE_RUNNING, DEV_EVENT_RXDOWN, dev_action_chdown },
  2070. { DEV_STATE_RUNNING, DEV_EVENT_TXDOWN, dev_action_chdown },
  2071. { DEV_STATE_RUNNING, DEV_EVENT_TXUP, ctcm_action_nop },
  2072. { DEV_STATE_RUNNING, DEV_EVENT_RXUP, ctcm_action_nop },
  2073. { DEV_STATE_RUNNING, DEV_EVENT_RESTART, dev_action_restart },
  2074. };
  2075. int dev_fsm_len = ARRAY_SIZE(dev_fsm);
  2076. /* --- This is the END my friend --- */