qoriq_thermal.c 7.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // Copyright 2016 Freescale Semiconductor, Inc.
  4. #include <linux/module.h>
  5. #include <linux/platform_device.h>
  6. #include <linux/err.h>
  7. #include <linux/io.h>
  8. #include <linux/of.h>
  9. #include <linux/of_address.h>
  10. #include <linux/thermal.h>
  11. #include "thermal_core.h"
  12. #define SITES_MAX 16
  13. /*
  14. * QorIQ TMU Registers
  15. */
  16. struct qoriq_tmu_site_regs {
  17. u32 tritsr; /* Immediate Temperature Site Register */
  18. u32 tratsr; /* Average Temperature Site Register */
  19. u8 res0[0x8];
  20. };
  21. struct qoriq_tmu_regs {
  22. u32 tmr; /* Mode Register */
  23. #define TMR_DISABLE 0x0
  24. #define TMR_ME 0x80000000
  25. #define TMR_ALPF 0x0c000000
  26. u32 tsr; /* Status Register */
  27. u32 tmtmir; /* Temperature measurement interval Register */
  28. #define TMTMIR_DEFAULT 0x0000000f
  29. u8 res0[0x14];
  30. u32 tier; /* Interrupt Enable Register */
  31. #define TIER_DISABLE 0x0
  32. u32 tidr; /* Interrupt Detect Register */
  33. u32 tiscr; /* Interrupt Site Capture Register */
  34. u32 ticscr; /* Interrupt Critical Site Capture Register */
  35. u8 res1[0x10];
  36. u32 tmhtcrh; /* High Temperature Capture Register */
  37. u32 tmhtcrl; /* Low Temperature Capture Register */
  38. u8 res2[0x8];
  39. u32 tmhtitr; /* High Temperature Immediate Threshold */
  40. u32 tmhtatr; /* High Temperature Average Threshold */
  41. u32 tmhtactr; /* High Temperature Average Crit Threshold */
  42. u8 res3[0x24];
  43. u32 ttcfgr; /* Temperature Configuration Register */
  44. u32 tscfgr; /* Sensor Configuration Register */
  45. u8 res4[0x78];
  46. struct qoriq_tmu_site_regs site[SITES_MAX];
  47. u8 res5[0x9f8];
  48. u32 ipbrr0; /* IP Block Revision Register 0 */
  49. u32 ipbrr1; /* IP Block Revision Register 1 */
  50. u8 res6[0x310];
  51. u32 ttr0cr; /* Temperature Range 0 Control Register */
  52. u32 ttr1cr; /* Temperature Range 1 Control Register */
  53. u32 ttr2cr; /* Temperature Range 2 Control Register */
  54. u32 ttr3cr; /* Temperature Range 3 Control Register */
  55. };
  56. /*
  57. * Thermal zone data
  58. */
  59. struct qoriq_tmu_data {
  60. struct thermal_zone_device *tz;
  61. struct qoriq_tmu_regs __iomem *regs;
  62. int sensor_id;
  63. bool little_endian;
  64. };
  65. static void tmu_write(struct qoriq_tmu_data *p, u32 val, void __iomem *addr)
  66. {
  67. if (p->little_endian)
  68. iowrite32(val, addr);
  69. else
  70. iowrite32be(val, addr);
  71. }
  72. static u32 tmu_read(struct qoriq_tmu_data *p, void __iomem *addr)
  73. {
  74. if (p->little_endian)
  75. return ioread32(addr);
  76. else
  77. return ioread32be(addr);
  78. }
  79. static int tmu_get_temp(void *p, int *temp)
  80. {
  81. u32 val;
  82. struct qoriq_tmu_data *data = p;
  83. val = tmu_read(data, &data->regs->site[data->sensor_id].tritsr);
  84. *temp = (val & 0xff) * 1000;
  85. return 0;
  86. }
  87. static int qoriq_tmu_get_sensor_id(void)
  88. {
  89. int ret, id;
  90. struct of_phandle_args sensor_specs;
  91. struct device_node *np, *sensor_np;
  92. np = of_find_node_by_name(NULL, "thermal-zones");
  93. if (!np)
  94. return -ENODEV;
  95. sensor_np = of_get_next_child(np, NULL);
  96. ret = of_parse_phandle_with_args(sensor_np, "thermal-sensors",
  97. "#thermal-sensor-cells",
  98. 0, &sensor_specs);
  99. if (ret) {
  100. of_node_put(np);
  101. of_node_put(sensor_np);
  102. return ret;
  103. }
  104. if (sensor_specs.args_count >= 1) {
  105. id = sensor_specs.args[0];
  106. WARN(sensor_specs.args_count > 1,
  107. "%s: too many cells in sensor specifier %d\n",
  108. sensor_specs.np->name, sensor_specs.args_count);
  109. } else {
  110. id = 0;
  111. }
  112. of_node_put(np);
  113. of_node_put(sensor_np);
  114. return id;
  115. }
  116. static int qoriq_tmu_calibration(struct platform_device *pdev)
  117. {
  118. int i, val, len;
  119. u32 range[4];
  120. const u32 *calibration;
  121. struct device_node *np = pdev->dev.of_node;
  122. struct qoriq_tmu_data *data = platform_get_drvdata(pdev);
  123. if (of_property_read_u32_array(np, "fsl,tmu-range", range, 4)) {
  124. dev_err(&pdev->dev, "missing calibration range.\n");
  125. return -ENODEV;
  126. }
  127. /* Init temperature range registers */
  128. tmu_write(data, range[0], &data->regs->ttr0cr);
  129. tmu_write(data, range[1], &data->regs->ttr1cr);
  130. tmu_write(data, range[2], &data->regs->ttr2cr);
  131. tmu_write(data, range[3], &data->regs->ttr3cr);
  132. calibration = of_get_property(np, "fsl,tmu-calibration", &len);
  133. if (calibration == NULL || len % 8) {
  134. dev_err(&pdev->dev, "invalid calibration data.\n");
  135. return -ENODEV;
  136. }
  137. for (i = 0; i < len; i += 8, calibration += 2) {
  138. val = of_read_number(calibration, 1);
  139. tmu_write(data, val, &data->regs->ttcfgr);
  140. val = of_read_number(calibration + 1, 1);
  141. tmu_write(data, val, &data->regs->tscfgr);
  142. }
  143. return 0;
  144. }
  145. static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
  146. {
  147. /* Disable interrupt, using polling instead */
  148. tmu_write(data, TIER_DISABLE, &data->regs->tier);
  149. /* Set update_interval */
  150. tmu_write(data, TMTMIR_DEFAULT, &data->regs->tmtmir);
  151. /* Disable monitoring */
  152. tmu_write(data, TMR_DISABLE, &data->regs->tmr);
  153. }
  154. static const struct thermal_zone_of_device_ops tmu_tz_ops = {
  155. .get_temp = tmu_get_temp,
  156. };
  157. static int qoriq_tmu_probe(struct platform_device *pdev)
  158. {
  159. int ret;
  160. struct qoriq_tmu_data *data;
  161. struct device_node *np = pdev->dev.of_node;
  162. u32 site;
  163. if (!np) {
  164. dev_err(&pdev->dev, "Device OF-Node is NULL");
  165. return -ENODEV;
  166. }
  167. data = devm_kzalloc(&pdev->dev, sizeof(struct qoriq_tmu_data),
  168. GFP_KERNEL);
  169. if (!data)
  170. return -ENOMEM;
  171. platform_set_drvdata(pdev, data);
  172. data->little_endian = of_property_read_bool(np, "little-endian");
  173. data->sensor_id = qoriq_tmu_get_sensor_id();
  174. if (data->sensor_id < 0) {
  175. dev_err(&pdev->dev, "Failed to get sensor id\n");
  176. ret = -ENODEV;
  177. goto err_iomap;
  178. }
  179. data->regs = of_iomap(np, 0);
  180. if (!data->regs) {
  181. dev_err(&pdev->dev, "Failed to get memory region\n");
  182. ret = -ENODEV;
  183. goto err_iomap;
  184. }
  185. qoriq_tmu_init_device(data); /* TMU initialization */
  186. ret = qoriq_tmu_calibration(pdev); /* TMU calibration */
  187. if (ret < 0)
  188. goto err_tmu;
  189. data->tz = devm_thermal_zone_of_sensor_register(&pdev->dev,
  190. data->sensor_id,
  191. data, &tmu_tz_ops);
  192. if (IS_ERR(data->tz)) {
  193. ret = PTR_ERR(data->tz);
  194. dev_err(&pdev->dev,
  195. "Failed to register thermal zone device %d\n", ret);
  196. goto err_tmu;
  197. }
  198. /* Enable monitoring */
  199. site = 0x1 << (15 - data->sensor_id);
  200. tmu_write(data, site | TMR_ME | TMR_ALPF, &data->regs->tmr);
  201. return 0;
  202. err_tmu:
  203. iounmap(data->regs);
  204. err_iomap:
  205. platform_set_drvdata(pdev, NULL);
  206. return ret;
  207. }
  208. static int qoriq_tmu_remove(struct platform_device *pdev)
  209. {
  210. struct qoriq_tmu_data *data = platform_get_drvdata(pdev);
  211. /* Disable monitoring */
  212. tmu_write(data, TMR_DISABLE, &data->regs->tmr);
  213. iounmap(data->regs);
  214. platform_set_drvdata(pdev, NULL);
  215. return 0;
  216. }
  217. #ifdef CONFIG_PM_SLEEP
  218. static int qoriq_tmu_suspend(struct device *dev)
  219. {
  220. u32 tmr;
  221. struct qoriq_tmu_data *data = dev_get_drvdata(dev);
  222. /* Disable monitoring */
  223. tmr = tmu_read(data, &data->regs->tmr);
  224. tmr &= ~TMR_ME;
  225. tmu_write(data, tmr, &data->regs->tmr);
  226. return 0;
  227. }
  228. static int qoriq_tmu_resume(struct device *dev)
  229. {
  230. u32 tmr;
  231. struct qoriq_tmu_data *data = dev_get_drvdata(dev);
  232. /* Enable monitoring */
  233. tmr = tmu_read(data, &data->regs->tmr);
  234. tmr |= TMR_ME;
  235. tmu_write(data, tmr, &data->regs->tmr);
  236. return 0;
  237. }
  238. #endif
  239. static SIMPLE_DEV_PM_OPS(qoriq_tmu_pm_ops,
  240. qoriq_tmu_suspend, qoriq_tmu_resume);
  241. static const struct of_device_id qoriq_tmu_match[] = {
  242. { .compatible = "fsl,qoriq-tmu", },
  243. {},
  244. };
  245. MODULE_DEVICE_TABLE(of, qoriq_tmu_match);
  246. static struct platform_driver qoriq_tmu = {
  247. .driver = {
  248. .name = "qoriq_thermal",
  249. .pm = &qoriq_tmu_pm_ops,
  250. .of_match_table = qoriq_tmu_match,
  251. },
  252. .probe = qoriq_tmu_probe,
  253. .remove = qoriq_tmu_remove,
  254. };
  255. module_platform_driver(qoriq_tmu);
  256. MODULE_AUTHOR("Jia Hongtao <hongtao.jia@nxp.com>");
  257. MODULE_DESCRIPTION("QorIQ Thermal Monitoring Unit driver");
  258. MODULE_LICENSE("GPL v2");