ns_access.c 1.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2014 Freescale Semiconductor
  4. */
  5. #include <common.h>
  6. #include <asm/io.h>
  7. #include <fsl_csu.h>
  8. #include <asm/arch/ns_access.h>
  9. #include <asm/arch/fsl_serdes.h>
  10. void set_devices_ns_access(unsigned long index, u16 val)
  11. {
  12. u32 *base = (u32 *)CONFIG_SYS_FSL_CSU_ADDR;
  13. u32 *reg;
  14. uint32_t tmp;
  15. reg = base + index / 2;
  16. tmp = in_be32(reg);
  17. if (index % 2 == 0) {
  18. tmp &= 0x0000ffff;
  19. tmp |= val << 16;
  20. } else {
  21. tmp &= 0xffff0000;
  22. tmp |= val;
  23. }
  24. out_be32(reg, tmp);
  25. }
  26. static void enable_devices_ns_access(struct csu_ns_dev *ns_dev, uint32_t num)
  27. {
  28. int i;
  29. for (i = 0; i < num; i++)
  30. set_devices_ns_access(ns_dev[i].ind, ns_dev[i].val);
  31. }
  32. void enable_layerscape_ns_access(void)
  33. {
  34. #ifdef CONFIG_ARM64
  35. if (current_el() == 3)
  36. #endif
  37. enable_devices_ns_access(ns_dev, ARRAY_SIZE(ns_dev));
  38. }
  39. void set_pcie_ns_access(int pcie, u16 val)
  40. {
  41. switch (pcie) {
  42. #ifdef CONFIG_PCIE1
  43. case PCIE1:
  44. set_devices_ns_access(CSU_CSLX_PCIE1, val);
  45. set_devices_ns_access(CSU_CSLX_PCIE1_IO, val);
  46. return;
  47. #endif
  48. #ifdef CONFIG_PCIE2
  49. case PCIE2:
  50. set_devices_ns_access(CSU_CSLX_PCIE2, val);
  51. set_devices_ns_access(CSU_CSLX_PCIE2_IO, val);
  52. return;
  53. #endif
  54. #ifdef CONFIG_PCIE3
  55. case PCIE3:
  56. set_devices_ns_access(CSU_CSLX_PCIE3, val);
  57. set_devices_ns_access(CSU_CSLX_PCIE3_IO, val);
  58. return;
  59. #endif
  60. default:
  61. debug("The PCIE%d doesn't exist!\n", pcie);
  62. return;
  63. }
  64. }