hisi_sas.h 13 KB

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  1. /*
  2. * Copyright (c) 2015 Linaro Ltd.
  3. * Copyright (c) 2015 Hisilicon Limited.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. */
  11. #ifndef _HISI_SAS_H_
  12. #define _HISI_SAS_H_
  13. #include <linux/acpi.h>
  14. #include <linux/clk.h>
  15. #include <linux/dmapool.h>
  16. #include <linux/iopoll.h>
  17. #include <linux/lcm.h>
  18. #include <linux/mfd/syscon.h>
  19. #include <linux/module.h>
  20. #include <linux/of_address.h>
  21. #include <linux/pci.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/property.h>
  24. #include <linux/regmap.h>
  25. #include <scsi/sas_ata.h>
  26. #include <scsi/libsas.h>
  27. #define HISI_SAS_MAX_PHYS 9
  28. #define HISI_SAS_MAX_QUEUES 32
  29. #define HISI_SAS_QUEUE_SLOTS 512
  30. #define HISI_SAS_MAX_ITCT_ENTRIES 1024
  31. #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES
  32. #define HISI_SAS_RESET_BIT 0
  33. #define HISI_SAS_REJECT_CMD_BIT 1
  34. #define HISI_SAS_STATUS_BUF_SZ (sizeof(struct hisi_sas_status_buffer))
  35. #define HISI_SAS_COMMAND_TABLE_SZ (sizeof(union hisi_sas_command_table))
  36. #define hisi_sas_status_buf_addr(buf) \
  37. (buf + offsetof(struct hisi_sas_slot_buf_table, status_buffer))
  38. #define hisi_sas_status_buf_addr_mem(slot) hisi_sas_status_buf_addr(slot->buf)
  39. #define hisi_sas_status_buf_addr_dma(slot) \
  40. hisi_sas_status_buf_addr(slot->buf_dma)
  41. #define hisi_sas_cmd_hdr_addr(buf) \
  42. (buf + offsetof(struct hisi_sas_slot_buf_table, command_header))
  43. #define hisi_sas_cmd_hdr_addr_mem(slot) hisi_sas_cmd_hdr_addr(slot->buf)
  44. #define hisi_sas_cmd_hdr_addr_dma(slot) hisi_sas_cmd_hdr_addr(slot->buf_dma)
  45. #define hisi_sas_sge_addr(buf) \
  46. (buf + offsetof(struct hisi_sas_slot_buf_table, sge_page))
  47. #define hisi_sas_sge_addr_mem(slot) hisi_sas_sge_addr(slot->buf)
  48. #define hisi_sas_sge_addr_dma(slot) hisi_sas_sge_addr(slot->buf_dma)
  49. #define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024)
  50. #define HISI_SAS_MAX_SMP_RESP_SZ 1028
  51. #define HISI_SAS_MAX_STP_RESP_SZ 28
  52. #define DEV_IS_EXPANDER(type) \
  53. ((type == SAS_EDGE_EXPANDER_DEVICE) || \
  54. (type == SAS_FANOUT_EXPANDER_DEVICE))
  55. #define HISI_SAS_SATA_PROTOCOL_NONDATA 0x1
  56. #define HISI_SAS_SATA_PROTOCOL_PIO 0x2
  57. #define HISI_SAS_SATA_PROTOCOL_DMA 0x4
  58. #define HISI_SAS_SATA_PROTOCOL_FPDMA 0x8
  59. #define HISI_SAS_SATA_PROTOCOL_ATAPI 0x10
  60. struct hisi_hba;
  61. enum {
  62. PORT_TYPE_SAS = (1U << 1),
  63. PORT_TYPE_SATA = (1U << 0),
  64. };
  65. enum dev_status {
  66. HISI_SAS_DEV_NORMAL,
  67. HISI_SAS_DEV_EH,
  68. };
  69. enum {
  70. HISI_SAS_INT_ABT_CMD = 0,
  71. HISI_SAS_INT_ABT_DEV = 1,
  72. };
  73. enum hisi_sas_dev_type {
  74. HISI_SAS_DEV_TYPE_STP = 0,
  75. HISI_SAS_DEV_TYPE_SSP,
  76. HISI_SAS_DEV_TYPE_SATA,
  77. };
  78. struct hisi_sas_hw_error {
  79. u32 irq_msk;
  80. u32 msk;
  81. int shift;
  82. const char *msg;
  83. int reg;
  84. const struct hisi_sas_hw_error *sub;
  85. };
  86. struct hisi_sas_rst {
  87. struct hisi_hba *hisi_hba;
  88. struct completion *completion;
  89. struct work_struct work;
  90. bool done;
  91. };
  92. #define HISI_SAS_RST_WORK_INIT(r, c) \
  93. { .hisi_hba = hisi_hba, \
  94. .completion = &c, \
  95. .work = __WORK_INITIALIZER(r.work, \
  96. hisi_sas_sync_rst_work_handler), \
  97. .done = false, \
  98. }
  99. #define HISI_SAS_DECLARE_RST_WORK_ON_STACK(r) \
  100. DECLARE_COMPLETION_ONSTACK(c); \
  101. DECLARE_WORK(w, hisi_sas_sync_rst_work_handler); \
  102. struct hisi_sas_rst r = HISI_SAS_RST_WORK_INIT(r, c)
  103. enum hisi_sas_bit_err_type {
  104. HISI_SAS_ERR_SINGLE_BIT_ECC = 0x0,
  105. HISI_SAS_ERR_MULTI_BIT_ECC = 0x1,
  106. };
  107. enum hisi_sas_phy_event {
  108. HISI_PHYE_PHY_UP = 0U,
  109. HISI_PHYE_LINK_RESET,
  110. HISI_PHYES_NUM,
  111. };
  112. struct hisi_sas_phy {
  113. struct work_struct works[HISI_PHYES_NUM];
  114. struct hisi_hba *hisi_hba;
  115. struct hisi_sas_port *port;
  116. struct asd_sas_phy sas_phy;
  117. struct sas_identify identify;
  118. struct completion *reset_completion;
  119. spinlock_t lock;
  120. u64 port_id; /* from hw */
  121. u64 frame_rcvd_size;
  122. u8 frame_rcvd[32];
  123. u8 phy_attached;
  124. u8 in_reset;
  125. u8 reserved[2];
  126. u32 phy_type;
  127. enum sas_linkrate minimum_linkrate;
  128. enum sas_linkrate maximum_linkrate;
  129. };
  130. struct hisi_sas_port {
  131. struct asd_sas_port sas_port;
  132. u8 port_attached;
  133. u8 id; /* from hw */
  134. };
  135. struct hisi_sas_cq {
  136. struct hisi_hba *hisi_hba;
  137. struct tasklet_struct tasklet;
  138. int rd_point;
  139. int id;
  140. };
  141. struct hisi_sas_dq {
  142. struct hisi_hba *hisi_hba;
  143. struct list_head list;
  144. spinlock_t lock;
  145. int wr_point;
  146. int id;
  147. };
  148. struct hisi_sas_device {
  149. struct hisi_hba *hisi_hba;
  150. struct domain_device *sas_device;
  151. struct completion *completion;
  152. struct hisi_sas_dq *dq;
  153. struct list_head list;
  154. enum sas_device_type dev_type;
  155. int device_id;
  156. int sata_idx;
  157. u8 dev_status;
  158. };
  159. struct hisi_sas_tmf_task {
  160. int force_phy;
  161. int phy_id;
  162. u8 tmf;
  163. u16 tag_of_task_to_be_managed;
  164. };
  165. struct hisi_sas_slot {
  166. struct list_head entry;
  167. struct list_head delivery;
  168. struct sas_task *task;
  169. struct hisi_sas_port *port;
  170. u64 n_elem;
  171. int dlvry_queue;
  172. int dlvry_queue_slot;
  173. int cmplt_queue;
  174. int cmplt_queue_slot;
  175. int abort;
  176. int ready;
  177. void *cmd_hdr;
  178. dma_addr_t cmd_hdr_dma;
  179. struct timer_list internal_abort_timer;
  180. bool is_internal;
  181. struct hisi_sas_tmf_task *tmf;
  182. /* Do not reorder/change members after here */
  183. void *buf;
  184. dma_addr_t buf_dma;
  185. int idx;
  186. };
  187. struct hisi_sas_hw {
  188. int (*hw_init)(struct hisi_hba *hisi_hba);
  189. void (*setup_itct)(struct hisi_hba *hisi_hba,
  190. struct hisi_sas_device *device);
  191. int (*slot_index_alloc)(struct hisi_hba *hisi_hba, int *slot_idx,
  192. struct domain_device *device);
  193. struct hisi_sas_device *(*alloc_dev)(struct domain_device *device);
  194. void (*sl_notify_ssp)(struct hisi_hba *hisi_hba, int phy_no);
  195. int (*get_free_slot)(struct hisi_hba *hisi_hba, struct hisi_sas_dq *dq);
  196. void (*start_delivery)(struct hisi_sas_dq *dq);
  197. void (*prep_ssp)(struct hisi_hba *hisi_hba,
  198. struct hisi_sas_slot *slot);
  199. void (*prep_smp)(struct hisi_hba *hisi_hba,
  200. struct hisi_sas_slot *slot);
  201. void (*prep_stp)(struct hisi_hba *hisi_hba,
  202. struct hisi_sas_slot *slot);
  203. void (*prep_abort)(struct hisi_hba *hisi_hba,
  204. struct hisi_sas_slot *slot,
  205. int device_id, int abort_flag, int tag_to_abort);
  206. int (*slot_complete)(struct hisi_hba *hisi_hba,
  207. struct hisi_sas_slot *slot);
  208. void (*phys_init)(struct hisi_hba *hisi_hba);
  209. void (*phy_start)(struct hisi_hba *hisi_hba, int phy_no);
  210. void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no);
  211. void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no);
  212. void (*get_events)(struct hisi_hba *hisi_hba, int phy_no);
  213. void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no,
  214. struct sas_phy_linkrates *linkrates);
  215. enum sas_linkrate (*phy_get_max_linkrate)(void);
  216. void (*clear_itct)(struct hisi_hba *hisi_hba,
  217. struct hisi_sas_device *dev);
  218. void (*free_device)(struct hisi_sas_device *sas_dev);
  219. int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id);
  220. void (*dereg_device)(struct hisi_hba *hisi_hba,
  221. struct domain_device *device);
  222. int (*soft_reset)(struct hisi_hba *hisi_hba);
  223. u32 (*get_phys_state)(struct hisi_hba *hisi_hba);
  224. int (*write_gpio)(struct hisi_hba *hisi_hba, u8 reg_type,
  225. u8 reg_index, u8 reg_count, u8 *write_data);
  226. void (*wait_cmds_complete_timeout)(struct hisi_hba *hisi_hba,
  227. int delay_ms, int timeout_ms);
  228. int max_command_entries;
  229. int complete_hdr_size;
  230. struct scsi_host_template *sht;
  231. };
  232. struct hisi_hba {
  233. /* This must be the first element, used by SHOST_TO_SAS_HA */
  234. struct sas_ha_struct *p;
  235. struct platform_device *platform_dev;
  236. struct pci_dev *pci_dev;
  237. struct device *dev;
  238. void __iomem *regs;
  239. void __iomem *sgpio_regs;
  240. struct regmap *ctrl;
  241. u32 ctrl_reset_reg;
  242. u32 ctrl_reset_sts_reg;
  243. u32 ctrl_clock_ena_reg;
  244. u32 refclk_frequency_mhz;
  245. u8 sas_addr[SAS_ADDR_SIZE];
  246. int n_phy;
  247. spinlock_t lock;
  248. struct semaphore sem;
  249. struct timer_list timer;
  250. struct workqueue_struct *wq;
  251. int slot_index_count;
  252. int last_slot_index;
  253. int last_dev_id;
  254. unsigned long *slot_index_tags;
  255. unsigned long reject_stp_links_msk;
  256. /* SCSI/SAS glue */
  257. struct sas_ha_struct sha;
  258. struct Scsi_Host *shost;
  259. struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES];
  260. struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES];
  261. struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS];
  262. struct hisi_sas_port port[HISI_SAS_MAX_PHYS];
  263. int queue_count;
  264. struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES];
  265. struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES];
  266. dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES];
  267. void *complete_hdr[HISI_SAS_MAX_QUEUES];
  268. dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES];
  269. struct hisi_sas_initial_fis *initial_fis;
  270. dma_addr_t initial_fis_dma;
  271. struct hisi_sas_itct *itct;
  272. dma_addr_t itct_dma;
  273. struct hisi_sas_iost *iost;
  274. dma_addr_t iost_dma;
  275. struct hisi_sas_breakpoint *breakpoint;
  276. dma_addr_t breakpoint_dma;
  277. struct hisi_sas_breakpoint *sata_breakpoint;
  278. dma_addr_t sata_breakpoint_dma;
  279. struct hisi_sas_slot *slot_info;
  280. unsigned long flags;
  281. const struct hisi_sas_hw *hw; /* Low level hw interface */
  282. unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)];
  283. struct work_struct rst_work;
  284. u32 phy_state;
  285. };
  286. /* Generic HW DMA host memory structures */
  287. /* Delivery queue header */
  288. struct hisi_sas_cmd_hdr {
  289. /* dw0 */
  290. __le32 dw0;
  291. /* dw1 */
  292. __le32 dw1;
  293. /* dw2 */
  294. __le32 dw2;
  295. /* dw3 */
  296. __le32 transfer_tags;
  297. /* dw4 */
  298. __le32 data_transfer_len;
  299. /* dw5 */
  300. __le32 first_burst_num;
  301. /* dw6 */
  302. __le32 sg_len;
  303. /* dw7 */
  304. __le32 dw7;
  305. /* dw8-9 */
  306. __le64 cmd_table_addr;
  307. /* dw10-11 */
  308. __le64 sts_buffer_addr;
  309. /* dw12-13 */
  310. __le64 prd_table_addr;
  311. /* dw14-15 */
  312. __le64 dif_prd_table_addr;
  313. };
  314. struct hisi_sas_itct {
  315. __le64 qw0;
  316. __le64 sas_addr;
  317. __le64 qw2;
  318. __le64 qw3;
  319. __le64 qw4_15[12];
  320. };
  321. struct hisi_sas_iost {
  322. __le64 qw0;
  323. __le64 qw1;
  324. __le64 qw2;
  325. __le64 qw3;
  326. };
  327. struct hisi_sas_err_record {
  328. u32 data[4];
  329. };
  330. struct hisi_sas_initial_fis {
  331. struct hisi_sas_err_record err_record;
  332. struct dev_to_host_fis fis;
  333. u32 rsvd[3];
  334. };
  335. struct hisi_sas_breakpoint {
  336. u8 data[128];
  337. };
  338. struct hisi_sas_sata_breakpoint {
  339. struct hisi_sas_breakpoint tag[32];
  340. };
  341. struct hisi_sas_sge {
  342. __le64 addr;
  343. __le32 page_ctrl_0;
  344. __le32 page_ctrl_1;
  345. __le32 data_len;
  346. __le32 data_off;
  347. };
  348. struct hisi_sas_command_table_smp {
  349. u8 bytes[44];
  350. };
  351. struct hisi_sas_command_table_stp {
  352. struct host_to_dev_fis command_fis;
  353. u8 dummy[12];
  354. u8 atapi_cdb[ATAPI_CDB_LEN];
  355. };
  356. #define HISI_SAS_SGE_PAGE_CNT SG_CHUNK_SIZE
  357. struct hisi_sas_sge_page {
  358. struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT];
  359. } __aligned(16);
  360. struct hisi_sas_command_table_ssp {
  361. struct ssp_frame_hdr hdr;
  362. union {
  363. struct {
  364. struct ssp_command_iu task;
  365. u32 prot[7];
  366. };
  367. struct ssp_tmf_iu ssp_task;
  368. struct xfer_rdy_iu xfer_rdy;
  369. struct ssp_response_iu ssp_res;
  370. } u;
  371. };
  372. union hisi_sas_command_table {
  373. struct hisi_sas_command_table_ssp ssp;
  374. struct hisi_sas_command_table_smp smp;
  375. struct hisi_sas_command_table_stp stp;
  376. } __aligned(16);
  377. struct hisi_sas_status_buffer {
  378. struct hisi_sas_err_record err;
  379. u8 iu[1024];
  380. } __aligned(16);
  381. struct hisi_sas_slot_buf_table {
  382. struct hisi_sas_status_buffer status_buffer;
  383. union hisi_sas_command_table command_header;
  384. struct hisi_sas_sge_page sge_page;
  385. };
  386. extern struct scsi_transport_template *hisi_sas_stt;
  387. extern void hisi_sas_stop_phys(struct hisi_hba *hisi_hba);
  388. extern int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost);
  389. extern void hisi_sas_free(struct hisi_hba *hisi_hba);
  390. extern u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis,
  391. int direction);
  392. extern struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port);
  393. extern void hisi_sas_sata_done(struct sas_task *task,
  394. struct hisi_sas_slot *slot);
  395. extern int hisi_sas_get_ncq_tag(struct sas_task *task, u32 *tag);
  396. extern int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba);
  397. extern int hisi_sas_probe(struct platform_device *pdev,
  398. const struct hisi_sas_hw *ops);
  399. extern int hisi_sas_remove(struct platform_device *pdev);
  400. extern int hisi_sas_slave_configure(struct scsi_device *sdev);
  401. extern int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time);
  402. extern void hisi_sas_scan_start(struct Scsi_Host *shost);
  403. extern struct device_attribute *host_attrs[];
  404. extern int hisi_sas_host_reset(struct Scsi_Host *shost, int reset_type);
  405. extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy);
  406. extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba,
  407. struct sas_task *task,
  408. struct hisi_sas_slot *slot);
  409. extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba);
  410. extern void hisi_sas_rst_work_handler(struct work_struct *work);
  411. extern void hisi_sas_sync_rst_work_handler(struct work_struct *work);
  412. extern void hisi_sas_kill_tasklets(struct hisi_hba *hisi_hba);
  413. extern bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy,
  414. enum hisi_sas_phy_event event);
  415. extern void hisi_sas_release_tasks(struct hisi_hba *hisi_hba);
  416. extern u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max);
  417. extern void hisi_sas_controller_reset_prepare(struct hisi_hba *hisi_hba);
  418. extern void hisi_sas_controller_reset_done(struct hisi_hba *hisi_hba);
  419. #endif