immap_5282.h 2.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * MCF5282 Internal Memory Map
  4. *
  5. * Copyright (c) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
  6. */
  7. #ifndef __IMMAP_5282__
  8. #define __IMMAP_5282__
  9. #define MMAP_SCM (CONFIG_SYS_MBAR + 0x00000000)
  10. #define MMAP_SDRAMC (CONFIG_SYS_MBAR + 0x00000040)
  11. #define MMAP_FBCS (CONFIG_SYS_MBAR + 0x00000080)
  12. #define MMAP_DMA0 (CONFIG_SYS_MBAR + 0x00000100)
  13. #define MMAP_DMA1 (CONFIG_SYS_MBAR + 0x00000140)
  14. #define MMAP_DMA2 (CONFIG_SYS_MBAR + 0x00000180)
  15. #define MMAP_DMA3 (CONFIG_SYS_MBAR + 0x000001C0)
  16. #define MMAP_UART0 (CONFIG_SYS_MBAR + 0x00000200)
  17. #define MMAP_UART1 (CONFIG_SYS_MBAR + 0x00000240)
  18. #define MMAP_UART2 (CONFIG_SYS_MBAR + 0x00000280)
  19. #define MMAP_I2C (CONFIG_SYS_MBAR + 0x00000300)
  20. #define MMAP_QSPI (CONFIG_SYS_MBAR + 0x00000340)
  21. #define MMAP_DTMR0 (CONFIG_SYS_MBAR + 0x00000400)
  22. #define MMAP_DTMR1 (CONFIG_SYS_MBAR + 0x00000440)
  23. #define MMAP_DTMR2 (CONFIG_SYS_MBAR + 0x00000480)
  24. #define MMAP_DTMR3 (CONFIG_SYS_MBAR + 0x000004C0)
  25. #define MMAP_INTC0 (CONFIG_SYS_MBAR + 0x00000C00)
  26. #define MMAP_INTC1 (CONFIG_SYS_MBAR + 0x00000D00)
  27. #define MMAP_INTCACK (CONFIG_SYS_MBAR + 0x00000F00)
  28. #define MMAP_FEC (CONFIG_SYS_MBAR + 0x00001000)
  29. #define MMAP_FECFIFO (CONFIG_SYS_MBAR + 0x00001400)
  30. #define MMAP_GPIO (CONFIG_SYS_MBAR + 0x00100000)
  31. #define MMAP_CCM (CONFIG_SYS_MBAR + 0x00110000)
  32. #define MMAP_PLL (CONFIG_SYS_MBAR + 0x00120000)
  33. #define MMAP_EPORT (CONFIG_SYS_MBAR + 0x00130000)
  34. #define MMAP_WDOG (CONFIG_SYS_MBAR + 0x00140000)
  35. #define MMAP_PIT0 (CONFIG_SYS_MBAR + 0x00150000)
  36. #define MMAP_PIT1 (CONFIG_SYS_MBAR + 0x00160000)
  37. #define MMAP_PIT2 (CONFIG_SYS_MBAR + 0x00170000)
  38. #define MMAP_PIT3 (CONFIG_SYS_MBAR + 0x00180000)
  39. #define MMAP_QADC (CONFIG_SYS_MBAR + 0x00190000)
  40. #define MMAP_GPTMRA (CONFIG_SYS_MBAR + 0x001A0000)
  41. #define MMAP_GPTMRB (CONFIG_SYS_MBAR + 0x001B0000)
  42. #define MMAP_CAN (CONFIG_SYS_MBAR + 0x001C0000)
  43. #define MMAP_CFMC (CONFIG_SYS_MBAR + 0x001D0000)
  44. #define MMAP_CFMMEM (CONFIG_SYS_MBAR + 0x04000000)
  45. #include <asm/coldfire/eport.h>
  46. #include <asm/coldfire/flexbus.h>
  47. #include <asm/coldfire/flexcan.h>
  48. #include <asm/coldfire/intctrl.h>
  49. #include <asm/coldfire/qspi.h>
  50. /* System Control Module */
  51. typedef struct scm_ctrl {
  52. u32 ipsbar;
  53. u32 res1;
  54. u32 rambar;
  55. u32 res2;
  56. u8 crsr;
  57. u8 cwcr;
  58. u8 lpicr;
  59. u8 cwsr;
  60. u32 res3;
  61. u8 mpark;
  62. u8 res4[3];
  63. u8 pacr0;
  64. u8 pacr1;
  65. u8 pacr2;
  66. u8 pacr3;
  67. u8 pacr4;
  68. u8 res5;
  69. u8 pacr5;
  70. u8 pacr6;
  71. u8 pacr7;
  72. u8 res6;
  73. u8 pacr8;
  74. u8 res7;
  75. u8 gpacr0;
  76. u8 gpacr1;
  77. u16 res8;
  78. } scm_t;
  79. typedef struct canex_ctrl {
  80. can_msg_t msg[16]; /* 0x00 Message Buffer 0-15 */
  81. } canex_t;
  82. /* Clock Module registers */
  83. typedef struct pll_ctrl {
  84. u16 syncr; /* 0x00 synthesizer control register */
  85. u16 synsr; /* 0x02 synthesizer status register */
  86. } pll_t;
  87. /* Watchdog registers */
  88. typedef struct wdog_ctrl {
  89. ushort wcr;
  90. ushort wmr;
  91. ushort wcntr;
  92. ushort wsr;
  93. } wdog_t;
  94. #endif /* __IMMAP_5282__ */