musb_ark.c 22 KB

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  1. /*
  2. * Texas Instruments DSPS platforms "glue layer"
  3. *
  4. * Copyright (C) 2012, by Texas Instruments
  5. *
  6. * Based on the am35x "glue layer" code.
  7. *
  8. * This file is part of the Inventra Controller Driver for Linux.
  9. *
  10. * The Inventra Controller Driver for Linux is free software; you
  11. * can redistribute it and/or modify it under the terms of the GNU
  12. * General Public License version 2 as published by the Free Software
  13. * Foundation.
  14. *
  15. * The Inventra Controller Driver for Linux is distributed in
  16. * the hope that it will be useful, but WITHOUT ANY WARRANTY;
  17. * without even the implied warranty of MERCHANTABILITY or
  18. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
  19. * License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with The Inventra Controller Driver for Linux ; if not,
  23. * write to the Free Software Foundation, Inc., 59 Temple Place,
  24. * Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. * musb_ark.c will be a common file for all the TI DSPS platforms
  27. * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
  28. * For now only ti81x is using this and in future davinci.c, am35x.c
  29. * da8xx.c would be merged to this file after testing.
  30. */
  31. #include <linux/module.h>
  32. #include <linux/kernel.h>
  33. #include <linux/sched.h>
  34. #include <linux/slab.h>
  35. #include <linux/io.h>
  36. #include <linux/err.h>
  37. #include <linux/platform_device.h>
  38. #include <linux/dma-mapping.h>
  39. #include <linux/pm_runtime.h>
  40. #include <linux/usb/usb_phy_generic.h>
  41. #include <linux/platform_data/usb-omap.h>
  42. #include <linux/sizes.h>
  43. #include <linux/of.h>
  44. #include <linux/of_device.h>
  45. #include <linux/of_address.h>
  46. #include <linux/of_irq.h>
  47. #include <linux/usb/of.h>
  48. #include <linux/gpio.h>
  49. #include <linux/debugfs.h>
  50. #include <linux/usb/musb.h>
  51. #include <linux/usb.h>
  52. #include "musb_core.h"
  53. #include "musb_ark.h"
  54. #include "musb_gadget.h"
  55. #include "cppi_dma.h"
  56. #include "musb_trace.h"
  57. /**
  58. * ARK glue structure.
  59. */
  60. struct ark_glue {
  61. struct device *dev;
  62. struct platform_device *plat_dev;
  63. struct musb *musb;
  64. //struct platform_device *phy;
  65. struct clk *clk;
  66. struct timer_list timer; /* otg_workaround timer */
  67. int gpio_id;
  68. int gpio_pwr;
  69. int usb_id_reg;
  70. int usb_id_offset;
  71. void __iomem *sys_base;
  72. unsigned int usb_softrest_reg_offset;
  73. unsigned int usb_softrest_bit_offset;
  74. unsigned int usbphy_softrest_bit_offset;
  75. };
  76. /* USBSS / USB ARK */
  77. #define USBSS_IRQ_STATUS 0x28
  78. #define USBSS_IRQ_ENABLER 0x2c
  79. #define USBSS_IRQ_CLEARR 0x30
  80. #define USBSS_IRQ_PD_COMP (1 << 2)
  81. #define POLL_SECONDS 2
  82. #define is_peripheral_enabled(musb) ((musb)->port_mode != MUSB_HOST)
  83. #define is_host_enabled(musb) ((musb)->port_mode != MUSB_PERIPHERAL)
  84. #define is_otg_enabled(musb) ((musb)->port_mode == MUSB_OTG)
  85. #define portstate(stmt) stmt
  86. static int dma_off = 1;
  87. static u64 musb_dmamask = DMA_BIT_MASK(32);
  88. /**
  89. * ark_musb_enable - enable interrupts
  90. */
  91. static void ark_musb_enable(struct musb *musb)
  92. {
  93. musb_writeb(musb->ctrl_base, MUSB_INTRRXE, BIT(1) | BIT(2) | BIT(3) | BIT(4));
  94. musb_writeb(musb->ctrl_base, MUSB_INTRTXE, BIT(1) | BIT(2) | BIT(3) | BIT(4));
  95. musb_writeb(musb->ctrl_base, MUSB_INTRUSBE, (0xff & (~(BIT(3)))) );
  96. musb_readb(musb->ctrl_base, MUSB_INTRRX);
  97. musb_readb(musb->ctrl_base, MUSB_INTRTX);
  98. musb_readb(musb->ctrl_base, MUSB_INTRUSB);
  99. if (is_dma_capable() && !dma_off)
  100. printk(KERN_WARNING "%s %s: dma not reactivated\n", __FILE__, __func__);
  101. else
  102. dma_off = 0;
  103. }
  104. /**
  105. * ark_musb_disable - disable HDRC and flush interrupts
  106. */
  107. static void ark_musb_disable(struct musb *musb)
  108. {
  109. musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
  110. if (is_dma_capable() && !dma_off)
  111. WARNING("dma still active\n");
  112. }
  113. static void ark_musb_otg_timer(struct timer_list *t)
  114. {
  115. struct ark_glue *glue = from_timer(glue, t, timer);
  116. struct musb *musb = glue->musb;
  117. void __iomem *mregs = musb->mregs;
  118. unsigned long flags;
  119. u8 devctl;
  120. /* We poll because ArkMicro's won't expose several OTG-critical
  121. * status change events (from the transceiver) otherwise.
  122. */
  123. devctl = musb_readb(mregs, MUSB_DEVCTL);
  124. //dev_dbg(musb->controller, "poll devctl %02x (%s)\n", devctl,
  125. // otg_state_string(musb->xceiv->state));
  126. dev_dbg(musb->controller, "poll devctl %02x (%d)\n", devctl, musb->xceiv->otg->state);
  127. spin_lock_irqsave(&musb->lock, flags);
  128. //switch (musb->xceiv->state) {
  129. switch (musb->xceiv->otg->state) {
  130. case OTG_STATE_A_WAIT_VFALL:
  131. /* Wait till VBUS falls below SessionEnd (~0.2V); the 1.3 RTL
  132. * seems to mis-handle session "start" otherwise (or in our
  133. * case "recover"), in routine "VBUS was valid by the time
  134. * VBUSERR got reported during enumeration" cases.
  135. */
  136. if (devctl & MUSB_DEVCTL_VBUS) {
  137. mod_timer(&glue->timer, jiffies + POLL_SECONDS * HZ);
  138. break;
  139. }
  140. musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
  141. musb_writel(musb->ctrl_base, ARK_USB_INT_SET_REG,
  142. MUSB_INTR_VBUSERROR << ARK_USB_USBINT_SHIFT);
  143. break;
  144. case OTG_STATE_B_IDLE:
  145. if (!is_peripheral_enabled(musb))
  146. break;
  147. /* There's no ID-changed IRQ, so we have no good way to tell
  148. * when to switch to the A-Default state machine (by setting
  149. * the DEVCTL.SESSION flag).
  150. *
  151. * Workaround: whenever we're in B_IDLE, try setting the
  152. * session flag every few seconds. If it works, ID was
  153. * grounded and we're now in the A-Default state machine.
  154. *
  155. * NOTE setting the session flag is _supposed_ to trigger
  156. * SRP, but clearly it doesn't.
  157. */
  158. musb_writeb(mregs, MUSB_DEVCTL, devctl | MUSB_DEVCTL_SESSION);
  159. devctl = musb_readb(mregs, MUSB_DEVCTL);
  160. if (devctl & MUSB_DEVCTL_BDEVICE)
  161. mod_timer(&glue->timer, jiffies + POLL_SECONDS * HZ);
  162. else
  163. musb->xceiv->otg->state = OTG_STATE_A_IDLE;
  164. break;
  165. default:
  166. break;
  167. }
  168. spin_unlock_irqrestore(&musb->lock, flags);
  169. }
  170. static irqreturn_t ark_musb_interrupt(int irq, void *hci)
  171. {
  172. struct musb *musb = (struct musb *)hci;
  173. void __iomem *reg_base = musb->ctrl_base;
  174. struct device *dev = musb->controller;
  175. struct ark_glue *glue = dev_get_drvdata(dev->parent);
  176. struct cppi *cppi;
  177. irqreturn_t ret = IRQ_NONE;
  178. unsigned long flags;
  179. spin_lock_irqsave(&musb->lock, flags);
  180. cppi = container_of(musb->dma_controller, struct cppi, controller);
  181. if (is_cppi_enabled() && musb->dma_controller && !cppi->irq)
  182. ret = cppi_interrupt(irq, hci);
  183. musb->int_rx = musb_readb(reg_base, MUSB_INTRRX);
  184. musb->int_tx = musb_readb(reg_base, MUSB_INTRTX);
  185. musb->int_usb = musb_readb(reg_base, MUSB_INTRUSB);
  186. /* DRVVBUS irqs are the only proxy we have (a very poor one!) for
  187. * ArkMicro's missing ID change IRQ. We need an ID change IRQ to
  188. * switch appropriately between halves of the OTG state machine.
  189. * Managing DEVCTL.SESSION per Mentor docs requires we know its
  190. * value, but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
  191. * Also, DRVVBUS pulses for SRP (but not at 5V) ...
  192. */
  193. if(0) {
  194. int err = 0;
  195. struct usb_otg *otg = musb->xceiv->otg;
  196. err = is_host_enabled(musb) && (musb->int_usb & MUSB_INTR_VBUSERROR);
  197. if (err) {
  198. /* The Mentor core doesn't debounce VBUS as needed
  199. * to cope with device connect current spikes. This
  200. * means it's not uncommon for bus-powered devices
  201. * to get VBUS errors during enumeration.
  202. *
  203. * This is a workaround, but newer RTL from Mentor
  204. * seems to allow a better one: "re"starting sessions
  205. * without waiting (on EVM, a **long** time) for VBUS
  206. * to stop registering in devctl.
  207. */
  208. musb->int_usb &= ~MUSB_INTR_VBUSERROR;
  209. musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
  210. mod_timer(&glue->timer, jiffies + POLL_SECONDS * HZ);
  211. WARNING("VBUS error workaround (delay coming)\n");
  212. }
  213. else if (is_host_enabled(musb)) {
  214. MUSB_HST_MODE(musb);
  215. otg->default_a = 1;
  216. musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
  217. portstate(musb->port1_status |= USB_PORT_STAT_POWER);
  218. del_timer(&glue->timer);
  219. }
  220. else {
  221. musb->is_active = 0;
  222. MUSB_DEV_MODE(musb);
  223. otg->default_a = 0;
  224. musb->xceiv->otg->state = OTG_STATE_B_IDLE;
  225. portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
  226. }
  227. /* NOTE: this must complete poweron within 100 msec
  228. * (OTG_TIME_A_WAIT_VRISE) but we don't check for that.
  229. */
  230. ret = IRQ_HANDLED;
  231. }
  232. if (musb->int_tx || musb->int_rx || musb->int_usb)
  233. ret |= musb_interrupt(musb);
  234. /* poll for ID change */
  235. if (is_otg_enabled(musb) && (musb->xceiv->otg->state == OTG_STATE_B_IDLE))
  236. mod_timer(&glue->timer, jiffies + POLL_SECONDS * HZ);
  237. spin_unlock_irqrestore(&musb->lock, flags);
  238. return ret;
  239. }
  240. static int ark_musb_init(struct musb *musb)
  241. {
  242. struct device *dev = musb->controller;
  243. struct ark_glue *glue = dev_get_drvdata(dev->parent);
  244. struct platform_device *parent = to_platform_device(dev->parent);
  245. u32 val;
  246. if(!glue || !parent)
  247. return -ENODEV;
  248. glue->musb = musb;
  249. musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
  250. if (IS_ERR(musb->xceiv)) {
  251. printk(KERN_ERR "*** ERROR: Failed to usb_get_phy\n");
  252. return PTR_ERR(musb->xceiv);
  253. }
  254. if(is_host_enabled(musb)) {
  255. timer_setup(&glue->timer, ark_musb_otg_timer, 0);
  256. }
  257. /* Reset the musb */
  258. val = musb_readb(musb->ctrl_base, 0x01);
  259. val |= BIT(3);
  260. musb_writeb(musb->ctrl_base, 0x01, val);
  261. msleep(5);
  262. musb->isr = ark_musb_interrupt;
  263. if(glue->gpio_pwr >= 0) {
  264. if (devm_gpio_request(dev, glue->gpio_pwr, "usb_pwr") < 0) {
  265. dev_err(dev, "Failed to request usb pwr gpio%d\n", glue->gpio_pwr);
  266. goto fail;
  267. }
  268. gpio_direction_output(glue->gpio_pwr, 1);
  269. }
  270. if(glue->gpio_id >= 0) {
  271. if (devm_gpio_request(dev, glue->gpio_id, "usb_id") < 0) {
  272. dev_err(dev, "Failed to request usb id gpio%d\n", glue->gpio_id);
  273. goto fail;
  274. }
  275. gpio_direction_output(glue->gpio_id, 0);
  276. }
  277. return 0;
  278. fail:
  279. return -ENODEV;
  280. }
  281. static int ark_musb_exit(struct musb *musb)
  282. {
  283. struct device *dev = musb->controller;
  284. struct ark_glue *glue = dev_get_drvdata(dev->parent);
  285. if(!glue || !musb->xceiv)
  286. return -ENODEV;
  287. if (is_host_enabled(musb))
  288. del_timer_sync(&glue->timer);
  289. /* delay, to avoid problems with module reload */
  290. if (is_host_enabled(musb) && musb->xceiv->otg->default_a) {
  291. int maxdelay = 2;
  292. u8 devctl, warn = 0;
  293. /* if there's no peripheral connected, this can take a
  294. * long time to fall, especially on EVM with huge C133.
  295. */
  296. do {
  297. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  298. if (!(devctl & MUSB_DEVCTL_VBUS))
  299. break;
  300. if ((devctl & MUSB_DEVCTL_VBUS) != warn) {
  301. warn = devctl & MUSB_DEVCTL_VBUS;
  302. dev_dbg(musb->controller, "VBUS %d\n",
  303. warn >> MUSB_DEVCTL_VBUS_SHIFT);
  304. }
  305. msleep(10);
  306. maxdelay--;
  307. } while (maxdelay > 0);
  308. /* in OTG mode, another host might be connected */
  309. if (devctl & MUSB_DEVCTL_VBUS)
  310. dev_dbg(musb->controller, "VBUS off timeout (devctl %02x)\n", devctl);
  311. }
  312. usb_put_phy(musb->xceiv);
  313. return 0;
  314. }
  315. static int ark_musb_set_mode(struct musb *musb, u8 mode)
  316. {
  317. struct device *dev = musb->controller;
  318. struct ark_glue *glue = dev_get_drvdata(dev->parent);
  319. int gpio_pwr = glue->gpio_pwr;
  320. int gpio_id = glue->gpio_id;
  321. int usb_id_reg = glue->usb_id_reg;
  322. int usb_id_offset = glue->usb_id_offset;
  323. u32 bitoffset = glue->usb_softrest_bit_offset;
  324. u32 phybitoffset = glue->usbphy_softrest_bit_offset;
  325. void __iomem *sys_softrest_base = (void __iomem *)((unsigned int)glue->sys_base + glue->usb_softrest_reg_offset);
  326. u32 regval;
  327. /*usb_hcd_resume_root_hub(musb->hcd);
  328. musb_root_disconnect(musb);
  329. musb_g_reset(musb);*/
  330. switch (mode) {
  331. case MUSB_HOST:
  332. break;
  333. case MUSB_PERIPHERAL:
  334. dev_info(musb->controller, "+Switch peripheral %d %d=== \n", gpio_id, gpio_pwr);
  335. musb->xceiv->otg->state = OTG_STATE_B_IDLE;
  336. if (gpio_id >= 0)
  337. gpio_set_value(gpio_id, 1);
  338. else if((usb_id_reg >= 0) && (usb_id_offset >= 0)) {
  339. void __iomem *sys_usb_id_base = (void __iomem *)((unsigned int)glue->sys_base + glue->usb_id_reg);
  340. regval = readl(sys_usb_id_base);
  341. regval |= (1<<usb_id_offset);
  342. writel(regval, sys_usb_id_base);
  343. }
  344. regval = readl(sys_softrest_base);
  345. regval &= (~((1 << bitoffset) | (1 << phybitoffset)));//usb and usbphy
  346. writel(regval, sys_softrest_base);
  347. mdelay(1);
  348. regval = readl(sys_softrest_base);
  349. regval |= ((1 << bitoffset) | (1 << phybitoffset));
  350. writel(regval, sys_softrest_base);
  351. mdelay(1);
  352. musb_writeb(musb->mregs, MUSB_DEVCTL, 0x99);
  353. musb_writeb(musb->mregs,0x01,0xf0);
  354. musb_g_reset(musb);
  355. regval = musb_readb(musb->mregs, MUSB_INTRUSBE);
  356. musb_writeb(musb->mregs, MUSB_INTRUSBE, regval | MUSB_INTR_SUSPEND);
  357. break;
  358. case MUSB_OTG:
  359. dev_info(musb->controller, "+++Switch OTG %d %d===+++ \n", gpio_id, gpio_pwr);
  360. musb->xceiv->otg->state = OTG_STATE_A_HOST;
  361. if (gpio_id >= 0)
  362. gpio_set_value(gpio_id, 0);
  363. else if((usb_id_reg >= 0) && (usb_id_offset >= 0)) {
  364. void __iomem *sys_usb_id_base = (void __iomem *)((unsigned int)glue->sys_base + glue->usb_id_reg);
  365. regval = readl(sys_usb_id_base);
  366. regval &= ~(1<<usb_id_offset);
  367. writel(regval, sys_usb_id_base);
  368. }
  369. regval = readl(sys_softrest_base);
  370. regval &= (~(1 << bitoffset));
  371. writel(regval, sys_softrest_base);
  372. mdelay(1);
  373. regval = readl(sys_softrest_base);
  374. regval |= ((1 << bitoffset));
  375. writel(regval, sys_softrest_base);
  376. mdelay(1);
  377. musb_writeb(musb->mregs, MUSB_INTRUSBE, 0xf4);
  378. musb_writeb(musb->mregs, MUSB_DEVCTL, 0x99);
  379. if (gpio_pwr >= 0) {
  380. gpio_set_value(gpio_pwr, 0);
  381. mdelay(10);
  382. gpio_set_value(gpio_pwr, 1);
  383. }
  384. break;
  385. default:
  386. dev_err(glue->dev, "unsupported mode %d\n", mode);
  387. return -EINVAL;
  388. }
  389. return 0;
  390. }
  391. static void ark_musb_set_vbus(struct musb *musb, int is_on)
  392. {
  393. struct usb_otg *otg = musb->xceiv->otg;
  394. u8 devctl;
  395. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  396. int ret = 1;
  397. /* HDRC controls CPEN, but beware current surges during device
  398. * connect. They can trigger transient overcurrent conditions
  399. * that must be ignored.
  400. */
  401. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  402. if (is_on) {
  403. if (musb->xceiv->otg->state == OTG_STATE_A_IDLE) {
  404. /* start the session */
  405. devctl |= MUSB_DEVCTL_SESSION;
  406. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  407. /*
  408. * Wait for the musb to set as A device to enable the VBUS
  409. */
  410. while (musb_readb(musb->mregs, MUSB_DEVCTL) & 0x80) {
  411. cpu_relax();
  412. if (time_after(jiffies, timeout)) {
  413. dev_err(musb->controller, "configured as A device timeout");
  414. ret = -EINVAL;
  415. break;
  416. }
  417. }
  418. if (ret && otg->set_vbus)
  419. otg_set_vbus(otg, 1);
  420. } else {
  421. musb->is_active = 1;
  422. otg->default_a = 1;
  423. musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
  424. devctl |= MUSB_DEVCTL_SESSION;
  425. MUSB_HST_MODE(musb);
  426. }
  427. } else {
  428. musb->is_active = 0;
  429. /* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and
  430. * jumping right to B_IDLE...
  431. */
  432. otg->default_a = 0;
  433. musb->xceiv->otg->state = OTG_STATE_B_IDLE;
  434. devctl &= ~MUSB_DEVCTL_SESSION;
  435. MUSB_DEV_MODE(musb);
  436. }
  437. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  438. }
  439. #ifdef CONFIG_USB_TI_CPPI41_DMA
  440. static void ark_dma_controller_callback(struct dma_controller *c)
  441. {
  442. struct musb *musb = c->musb;
  443. struct ark_glue *glue = dev_get_drvdata(musb->controller->parent);
  444. void __iomem *usbss_base = musb->ctrl_base;
  445. u32 status;
  446. status = musb_readl(usbss_base, USBSS_IRQ_STATUS);
  447. if (status & USBSS_IRQ_PD_COMP)
  448. musb_writel(usbss_base, USBSS_IRQ_STATUS, USBSS_IRQ_PD_COMP);
  449. }
  450. static struct dma_controller *ark_dma_controller_create(struct musb *musb, void __iomem *base)
  451. {
  452. struct dma_controller *controller;
  453. struct ark_glue *glue = dev_get_drvdata(musb->controller->parent);
  454. void __iomem *usbss_base = musb->ctrl_base;
  455. controller = cppi41_dma_controller_create(musb, base);
  456. if (IS_ERR_OR_NULL(controller))
  457. return controller;
  458. musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP);
  459. controller->dma_callback = ark_dma_controller_callback;
  460. return controller;
  461. }
  462. #endif /* CONFIG_USB_TI_CPPI41_DMA */
  463. static struct musb_platform_ops musb_ark_ops = {
  464. .init = ark_musb_init,
  465. .exit = ark_musb_exit,
  466. #if defined(CONFIG_USB_TI_CPPI41_DMA)
  467. .quirks = MUSB_DMA_CPPI41 | MUSB_INDEXED_EP,
  468. .dma_init = ark_dma_controller_create,
  469. .dma_exit = cppi41_dma_controller_destroy,
  470. #elif defined(CONFIG_USB_INVENTRA_DMA)
  471. .quirks = MUSB_INDEXED_EP | MUSB_DMA_INVENTRA,
  472. .dma_init = musbhs_dma_controller_create,
  473. .dma_exit = musbhs_dma_controller_destroy,
  474. #endif
  475. .enable = ark_musb_enable,
  476. .disable = ark_musb_disable,
  477. .set_mode = ark_musb_set_mode,
  478. .set_vbus = ark_musb_set_vbus,
  479. .fifo_mode = 2,
  480. };
  481. static int get_int_prop(struct device_node *dn, const char *s)
  482. {
  483. int ret;
  484. u32 val;
  485. ret = of_property_read_u32(dn, s, &val);
  486. if (ret)
  487. return 0;
  488. return val;
  489. }
  490. static int get_musb_port_mode(struct device *dev)
  491. {
  492. enum usb_dr_mode mode;
  493. mode = usb_get_dr_mode(dev);
  494. switch (mode) {
  495. case USB_DR_MODE_HOST:
  496. return MUSB_HOST;
  497. case USB_DR_MODE_PERIPHERAL:
  498. return MUSB_PERIPHERAL;
  499. case USB_DR_MODE_UNKNOWN:
  500. case USB_DR_MODE_OTG:
  501. default:
  502. return MUSB_OTG;
  503. }
  504. }
  505. static const struct of_device_id musb_ark_of_match[] = {
  506. { .compatible = "arkmicro,ark-musb"},
  507. { },
  508. };
  509. MODULE_DEVICE_TABLE(of, musb_ark_of_match);
  510. static int musb_ark_probe(struct platform_device *pdev)
  511. {
  512. const struct of_device_id *match;
  513. struct ark_glue *glue;
  514. struct musb_hdrc_platform_data pdata;
  515. struct resource resources[3];
  516. struct resource *res;
  517. struct musb_hdrc_config *config;
  518. struct platform_device *plat_dev;
  519. struct device_node *dn = pdev->dev.of_node;
  520. int val;
  521. int ret = 0;
  522. match = of_match_node(musb_ark_of_match, dn);
  523. if (!match) {
  524. dev_err(&pdev->dev, "Failed to get matching of_match struct\n");
  525. return -EINVAL;
  526. }
  527. memset(resources, 0, sizeof(resources));
  528. /* allocate glue */
  529. glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
  530. if (!glue) {
  531. dev_err(&pdev->dev, "Failed to devm_kzalloc flue\n");
  532. return -ENOMEM;
  533. }
  534. glue->dev = &pdev->dev;
  535. ret = of_property_read_u32(dn, "gpio-id", &glue->gpio_id);
  536. if(ret) {
  537. return -EINVAL;
  538. }
  539. ret = of_property_read_u32(dn, "usb-id-reg", &glue->usb_id_reg);
  540. if(ret == 0) {
  541. ret = of_property_read_u32(dn, "usb-id-offset", &glue->usb_id_offset);
  542. if(ret) {
  543. glue->usb_id_offset = -1;
  544. }
  545. } else {
  546. glue->usb_id_reg = -1;
  547. }
  548. ret = of_property_read_u32(dn, "gpio-pwr", &glue->gpio_pwr);
  549. if(ret) {
  550. return -EINVAL;
  551. }
  552. ret = of_property_read_u32(dn, "sys-softrest-regoffset", &glue->usb_softrest_reg_offset);
  553. if(ret) {
  554. return -EINVAL;
  555. }
  556. ret = of_property_read_u32(dn, "usb-softrest-bitoffset", &glue->usb_softrest_bit_offset);
  557. if(ret) {
  558. return -EINVAL;
  559. }
  560. ret = of_property_read_u32(dn, "usbphy-softrest-bitoffset", &glue->usbphy_softrest_bit_offset);
  561. if(ret) {
  562. glue->usbphy_softrest_bit_offset = glue->usb_softrest_bit_offset + 1;
  563. }
  564. //if (usb_get_dr_mode(&pdev->dev) == USB_DR_MODE_PERIPHERAL) {
  565. //}
  566. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  567. if (!res) {
  568. dev_err(&pdev->dev, "Failed to get usb_base memory.\n");
  569. return -EINVAL;
  570. }
  571. resources[0] = *res;
  572. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  573. if (!res) {
  574. dev_err(&pdev->dev, "Failed to get sys_base memory.\n");
  575. return -EINVAL;
  576. }
  577. glue->sys_base = ioremap(res->start, resource_size(res));
  578. if(IS_ERR(glue->sys_base)) {
  579. dev_err(&pdev->dev, "Failed to devm_ioremap_resource\n");
  580. return PTR_ERR(glue->sys_base);
  581. }
  582. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  583. if (!res) {
  584. dev_err(&pdev->dev, "Failed to get irq.\n");
  585. ret = -EINVAL;
  586. goto err_iounmap;
  587. }
  588. resources[1] = *res;
  589. res = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
  590. if (!res) {
  591. dev_err(&pdev->dev, "Failed to get dma irq.\n");
  592. ret = -EINVAL;
  593. goto err_iounmap;
  594. }
  595. resources[2] = *res;
  596. //glue->phy = usb_phy_generic_register();
  597. pdev->id = of_alias_get_id(dn, "usb");
  598. if(pdev->id < 0) {
  599. dev_err(&pdev->dev, "Failed to get usb id\n");
  600. }
  601. platform_set_drvdata(pdev, glue);
  602. /* allocate the child platform device */
  603. plat_dev = platform_device_alloc("musb-hdrc", pdev->id);
  604. if (!plat_dev) {
  605. dev_err(&pdev->dev, "Failed to allocate musb device\n");
  606. ret = -EINVAL;
  607. goto err_iounmap;
  608. }
  609. plat_dev->dev.parent = &pdev->dev;
  610. plat_dev->dev.dma_mask = &musb_dmamask;
  611. plat_dev->dev.coherent_dma_mask = musb_dmamask;
  612. glue->plat_dev = plat_dev;
  613. ret = platform_device_add_resources(plat_dev, resources,
  614. ARRAY_SIZE(resources));
  615. if (ret) {
  616. dev_err(&pdev->dev, "Failed to add resources\n");
  617. goto err;
  618. }
  619. config = devm_kzalloc(&pdev->dev, sizeof(*config), GFP_KERNEL);
  620. if (!config) {
  621. ret = -ENOMEM;
  622. goto err;
  623. }
  624. pdata.config = config;
  625. pdata.platform_ops = &musb_ark_ops;
  626. config->num_eps = get_int_prop(dn, "num-eps");
  627. config->ram_bits = get_int_prop(dn, "ram-bits");
  628. //config->host_port_deassert_reset_at_resume = 1;
  629. pdata.mode = get_musb_port_mode(&pdev->dev);
  630. /* DT keeps this entry in mA, musb expects it as per USB spec */
  631. pdata.power = get_int_prop(dn, "power") / 2;
  632. ret = of_property_read_u32(dn, "multipoint", &val);
  633. if (!ret && val)
  634. config->multipoint = true;
  635. #if 0
  636. ret = of_property_read_u32(dn, "dma", &val);
  637. if (!ret && val)
  638. config->dma = true;
  639. config->dma_channels = get_int_prop(dn, "dma_channels");
  640. #endif
  641. config->maximum_speed = usb_get_maximum_speed(&pdev->dev);
  642. switch (config->maximum_speed) {
  643. case USB_SPEED_LOW:
  644. case USB_SPEED_FULL:
  645. break;
  646. case USB_SPEED_SUPER:
  647. dev_warn(&pdev->dev, "ignore incorrect maximum_speed "
  648. "(super-speed) setting in dts");
  649. /* fall through */
  650. default:
  651. config->maximum_speed = USB_SPEED_HIGH;
  652. break;
  653. }
  654. ret = platform_device_add_data(plat_dev, &pdata, sizeof(pdata));
  655. if (ret) {
  656. dev_err(&pdev->dev, "Failed to add platform_data\n");
  657. goto err;
  658. }
  659. ret = platform_device_add(plat_dev);
  660. if (ret) {
  661. dev_err(&pdev->dev, "Failed to register musb device\n");
  662. goto err;
  663. }
  664. printk("musb_ark_probe succss\n");
  665. return 0;
  666. err:
  667. platform_device_put(plat_dev);
  668. err_iounmap:
  669. //if(glue->phy)
  670. // usb_phy_generic_unregister(glue->phy);
  671. if(glue->sys_base)
  672. iounmap(glue->sys_base);
  673. return ret;
  674. }
  675. static int musb_ark_remove(struct platform_device *pdev)
  676. {
  677. struct ark_glue *glue = platform_get_drvdata(pdev);
  678. if(glue->plat_dev)
  679. platform_device_unregister(glue->plat_dev);
  680. //if(glue->phy)
  681. // usb_phy_generic_unregister(glue->phy);
  682. if(glue->sys_base)
  683. iounmap(glue->sys_base);
  684. return 0;
  685. }
  686. #ifdef CONFIG_PM_SLEEP
  687. static int musb_ark_suspend(struct device *dev)
  688. {
  689. return 0;
  690. }
  691. static int musb_ark_resume(struct device *dev)
  692. {
  693. return 0;
  694. }
  695. #endif
  696. //static SIMPLE_DEV_PM_OPS(musb_ark_pm_ops, musb_ark_suspend, musb_ark_resume);
  697. static struct platform_driver musb_ark_driver = {
  698. .probe = musb_ark_probe,
  699. .remove = musb_ark_remove,
  700. .driver = {
  701. .name = "musb-ark",
  702. //.pm = &musb_ark_pm_ops,
  703. .of_match_table = musb_ark_of_match,
  704. },
  705. };
  706. MODULE_DESCRIPTION("ARKMICRO MUSB Glue Layer");
  707. MODULE_AUTHOR("Arkmicro");
  708. MODULE_LICENSE("GPL v2");
  709. module_platform_driver(musb_ark_driver);