sun50i-h5.dtsi 3.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131
  1. /*
  2. * Copyright (C) 2016 ARM Ltd.
  3. *
  4. * This file is dual-licensed: you can use it either under the terms
  5. * of the GPL or the X11 license, at your option. Note that this dual
  6. * licensing only applies to this file, and not this project as a
  7. * whole.
  8. *
  9. * a) This file is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of the
  12. * License, or (at your option) any later version.
  13. *
  14. * This file is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * Or, alternatively,
  20. *
  21. * b) Permission is hereby granted, free of charge, to any person
  22. * obtaining a copy of this software and associated documentation
  23. * files (the "Software"), to deal in the Software without
  24. * restriction, including without limitation the rights to use,
  25. * copy, modify, merge, publish, distribute, sublicense, and/or
  26. * sell copies of the Software, and to permit persons to whom the
  27. * Software is furnished to do so, subject to the following
  28. * conditions:
  29. *
  30. * The above copyright notice and this permission notice shall be
  31. * included in all copies or substantial portions of the Software.
  32. *
  33. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35. * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37. * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38. * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40. * OTHER DEALINGS IN THE SOFTWARE.
  41. */
  42. #include <arm/sunxi-h3-h5.dtsi>
  43. / {
  44. cpus {
  45. #address-cells = <1>;
  46. #size-cells = <0>;
  47. cpu0: cpu@0 {
  48. compatible = "arm,cortex-a53", "arm,armv8";
  49. device_type = "cpu";
  50. reg = <0>;
  51. enable-method = "psci";
  52. };
  53. cpu@1 {
  54. compatible = "arm,cortex-a53", "arm,armv8";
  55. device_type = "cpu";
  56. reg = <1>;
  57. enable-method = "psci";
  58. };
  59. cpu@2 {
  60. compatible = "arm,cortex-a53", "arm,armv8";
  61. device_type = "cpu";
  62. reg = <2>;
  63. enable-method = "psci";
  64. };
  65. cpu@3 {
  66. compatible = "arm,cortex-a53", "arm,armv8";
  67. device_type = "cpu";
  68. reg = <3>;
  69. enable-method = "psci";
  70. };
  71. };
  72. psci {
  73. compatible = "arm,psci-0.2";
  74. method = "smc";
  75. };
  76. timer {
  77. compatible = "arm,armv8-timer";
  78. interrupts = <GIC_PPI 13
  79. (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  80. <GIC_PPI 14
  81. (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  82. <GIC_PPI 11
  83. (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  84. <GIC_PPI 10
  85. (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
  86. };
  87. };
  88. &ccu {
  89. compatible = "allwinner,sun50i-h5-ccu";
  90. };
  91. &display_clocks {
  92. compatible = "allwinner,sun50i-h5-de2-clk";
  93. };
  94. &mmc0 {
  95. compatible = "allwinner,sun50i-h5-mmc",
  96. "allwinner,sun50i-a64-mmc";
  97. clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
  98. clock-names = "ahb", "mmc";
  99. };
  100. &mmc1 {
  101. compatible = "allwinner,sun50i-h5-mmc",
  102. "allwinner,sun50i-a64-mmc";
  103. clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
  104. clock-names = "ahb", "mmc";
  105. };
  106. &mmc2 {
  107. compatible = "allwinner,sun50i-h5-emmc",
  108. "allwinner,sun50i-a64-emmc";
  109. clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
  110. clock-names = "ahb", "mmc";
  111. };
  112. &pio {
  113. interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
  114. <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
  115. <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
  116. compatible = "allwinner,sun50i-h5-pinctrl";
  117. };