r8a77965.dtsi 51 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Device Tree Source for the r8a77965 SoC
  4. *
  5. * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
  6. *
  7. * Based on r8a7796.dtsi
  8. * Copyright (C) 2016 Renesas Electronics Corp.
  9. */
  10. #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
  11. #include <dt-bindings/interrupt-controller/arm-gic.h>
  12. #include <dt-bindings/power/r8a77965-sysc.h>
  13. #define CPG_AUDIO_CLK_I 10
  14. / {
  15. compatible = "renesas,r8a77965";
  16. #address-cells = <2>;
  17. #size-cells = <2>;
  18. aliases {
  19. i2c0 = &i2c0;
  20. i2c1 = &i2c1;
  21. i2c2 = &i2c2;
  22. i2c3 = &i2c3;
  23. i2c4 = &i2c4;
  24. i2c5 = &i2c5;
  25. i2c6 = &i2c6;
  26. i2c7 = &i2c_dvfs;
  27. };
  28. /*
  29. * The external audio clocks are configured as 0 Hz fixed frequency
  30. * clocks by default.
  31. * Boards that provide audio clocks should override them.
  32. */
  33. audio_clk_a: audio_clk_a {
  34. compatible = "fixed-clock";
  35. #clock-cells = <0>;
  36. clock-frequency = <0>;
  37. };
  38. audio_clk_b: audio_clk_b {
  39. compatible = "fixed-clock";
  40. #clock-cells = <0>;
  41. clock-frequency = <0>;
  42. };
  43. audio_clk_c: audio_clk_c {
  44. compatible = "fixed-clock";
  45. #clock-cells = <0>;
  46. clock-frequency = <0>;
  47. };
  48. /* External CAN clock - to be overridden by boards that provide it */
  49. can_clk: can {
  50. compatible = "fixed-clock";
  51. #clock-cells = <0>;
  52. clock-frequency = <0>;
  53. };
  54. cpus {
  55. #address-cells = <1>;
  56. #size-cells = <0>;
  57. a57_0: cpu@0 {
  58. compatible = "arm,cortex-a57", "arm,armv8";
  59. reg = <0x0>;
  60. device_type = "cpu";
  61. power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
  62. next-level-cache = <&L2_CA57>;
  63. enable-method = "psci";
  64. };
  65. a57_1: cpu@1 {
  66. compatible = "arm,cortex-a57", "arm,armv8";
  67. reg = <0x1>;
  68. device_type = "cpu";
  69. power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
  70. next-level-cache = <&L2_CA57>;
  71. enable-method = "psci";
  72. };
  73. L2_CA57: cache-controller-0 {
  74. compatible = "cache";
  75. power-domains = <&sysc R8A77965_PD_CA57_SCU>;
  76. cache-unified;
  77. cache-level = <2>;
  78. };
  79. };
  80. extal_clk: extal {
  81. compatible = "fixed-clock";
  82. #clock-cells = <0>;
  83. /* This value must be overridden by the board */
  84. clock-frequency = <0>;
  85. };
  86. extalr_clk: extalr {
  87. compatible = "fixed-clock";
  88. #clock-cells = <0>;
  89. /* This value must be overridden by the board */
  90. clock-frequency = <0>;
  91. };
  92. /* External PCIe clock - can be overridden by the board */
  93. pcie_bus_clk: pcie_bus {
  94. compatible = "fixed-clock";
  95. #clock-cells = <0>;
  96. clock-frequency = <0>;
  97. };
  98. pmu_a57 {
  99. compatible = "arm,cortex-a57-pmu";
  100. interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
  101. <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
  102. interrupt-affinity = <&a57_0>,
  103. <&a57_1>;
  104. };
  105. psci {
  106. compatible = "arm,psci-1.0", "arm,psci-0.2";
  107. method = "smc";
  108. };
  109. /* External SCIF clock - to be overridden by boards that provide it */
  110. scif_clk: scif {
  111. compatible = "fixed-clock";
  112. #clock-cells = <0>;
  113. clock-frequency = <0>;
  114. };
  115. soc {
  116. compatible = "simple-bus";
  117. interrupt-parent = <&gic>;
  118. #address-cells = <2>;
  119. #size-cells = <2>;
  120. ranges;
  121. rwdt: watchdog@e6020000 {
  122. compatible = "renesas,r8a77965-wdt",
  123. "renesas,rcar-gen3-wdt";
  124. reg = <0 0xe6020000 0 0x0c>;
  125. clocks = <&cpg CPG_MOD 402>;
  126. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  127. resets = <&cpg 402>;
  128. status = "disabled";
  129. };
  130. gpio0: gpio@e6050000 {
  131. compatible = "renesas,gpio-r8a77965",
  132. "renesas,rcar-gen3-gpio";
  133. reg = <0 0xe6050000 0 0x50>;
  134. interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
  135. #gpio-cells = <2>;
  136. gpio-controller;
  137. gpio-ranges = <&pfc 0 0 16>;
  138. #interrupt-cells = <2>;
  139. interrupt-controller;
  140. clocks = <&cpg CPG_MOD 912>;
  141. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  142. resets = <&cpg 912>;
  143. };
  144. gpio1: gpio@e6051000 {
  145. compatible = "renesas,gpio-r8a77965",
  146. "renesas,rcar-gen3-gpio";
  147. reg = <0 0xe6051000 0 0x50>;
  148. interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
  149. #gpio-cells = <2>;
  150. gpio-controller;
  151. gpio-ranges = <&pfc 0 32 29>;
  152. #interrupt-cells = <2>;
  153. interrupt-controller;
  154. clocks = <&cpg CPG_MOD 911>;
  155. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  156. resets = <&cpg 911>;
  157. };
  158. gpio2: gpio@e6052000 {
  159. compatible = "renesas,gpio-r8a77965",
  160. "renesas,rcar-gen3-gpio";
  161. reg = <0 0xe6052000 0 0x50>;
  162. interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
  163. #gpio-cells = <2>;
  164. gpio-controller;
  165. gpio-ranges = <&pfc 0 64 15>;
  166. #interrupt-cells = <2>;
  167. interrupt-controller;
  168. clocks = <&cpg CPG_MOD 910>;
  169. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  170. resets = <&cpg 910>;
  171. };
  172. gpio3: gpio@e6053000 {
  173. compatible = "renesas,gpio-r8a77965",
  174. "renesas,rcar-gen3-gpio";
  175. reg = <0 0xe6053000 0 0x50>;
  176. interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
  177. #gpio-cells = <2>;
  178. gpio-controller;
  179. gpio-ranges = <&pfc 0 96 16>;
  180. #interrupt-cells = <2>;
  181. interrupt-controller;
  182. clocks = <&cpg CPG_MOD 909>;
  183. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  184. resets = <&cpg 909>;
  185. };
  186. gpio4: gpio@e6054000 {
  187. compatible = "renesas,gpio-r8a77965",
  188. "renesas,rcar-gen3-gpio";
  189. reg = <0 0xe6054000 0 0x50>;
  190. interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
  191. #gpio-cells = <2>;
  192. gpio-controller;
  193. gpio-ranges = <&pfc 0 128 18>;
  194. #interrupt-cells = <2>;
  195. interrupt-controller;
  196. clocks = <&cpg CPG_MOD 908>;
  197. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  198. resets = <&cpg 908>;
  199. };
  200. gpio5: gpio@e6055000 {
  201. compatible = "renesas,gpio-r8a77965",
  202. "renesas,rcar-gen3-gpio";
  203. reg = <0 0xe6055000 0 0x50>;
  204. interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
  205. #gpio-cells = <2>;
  206. gpio-controller;
  207. gpio-ranges = <&pfc 0 160 26>;
  208. #interrupt-cells = <2>;
  209. interrupt-controller;
  210. clocks = <&cpg CPG_MOD 907>;
  211. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  212. resets = <&cpg 907>;
  213. };
  214. gpio6: gpio@e6055400 {
  215. compatible = "renesas,gpio-r8a77965",
  216. "renesas,rcar-gen3-gpio";
  217. reg = <0 0xe6055400 0 0x50>;
  218. interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
  219. #gpio-cells = <2>;
  220. gpio-controller;
  221. gpio-ranges = <&pfc 0 192 32>;
  222. #interrupt-cells = <2>;
  223. interrupt-controller;
  224. clocks = <&cpg CPG_MOD 906>;
  225. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  226. resets = <&cpg 906>;
  227. };
  228. gpio7: gpio@e6055800 {
  229. compatible = "renesas,gpio-r8a77965",
  230. "renesas,rcar-gen3-gpio";
  231. reg = <0 0xe6055800 0 0x50>;
  232. interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
  233. #gpio-cells = <2>;
  234. gpio-controller;
  235. gpio-ranges = <&pfc 0 224 4>;
  236. #interrupt-cells = <2>;
  237. interrupt-controller;
  238. clocks = <&cpg CPG_MOD 905>;
  239. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  240. resets = <&cpg 905>;
  241. };
  242. pfc: pin-controller@e6060000 {
  243. compatible = "renesas,pfc-r8a77965";
  244. reg = <0 0xe6060000 0 0x50c>;
  245. };
  246. cpg: clock-controller@e6150000 {
  247. compatible = "renesas,r8a77965-cpg-mssr";
  248. reg = <0 0xe6150000 0 0x1000>;
  249. clocks = <&extal_clk>, <&extalr_clk>;
  250. clock-names = "extal", "extalr";
  251. #clock-cells = <2>;
  252. #power-domain-cells = <0>;
  253. #reset-cells = <1>;
  254. };
  255. rst: reset-controller@e6160000 {
  256. compatible = "renesas,r8a77965-rst";
  257. reg = <0 0xe6160000 0 0x0200>;
  258. };
  259. sysc: system-controller@e6180000 {
  260. compatible = "renesas,r8a77965-sysc";
  261. reg = <0 0xe6180000 0 0x0400>;
  262. #power-domain-cells = <1>;
  263. };
  264. tsc: thermal@e6198000 {
  265. compatible = "renesas,r8a77965-thermal";
  266. reg = <0 0xe6198000 0 0x100>,
  267. <0 0xe61a0000 0 0x100>,
  268. <0 0xe61a8000 0 0x100>;
  269. interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
  270. <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
  271. <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
  272. clocks = <&cpg CPG_MOD 522>;
  273. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  274. resets = <&cpg 522>;
  275. #thermal-sensor-cells = <1>;
  276. status = "okay";
  277. };
  278. intc_ex: interrupt-controller@e61c0000 {
  279. compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
  280. #interrupt-cells = <2>;
  281. interrupt-controller;
  282. reg = <0 0xe61c0000 0 0x200>;
  283. interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
  284. GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
  285. GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
  286. GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
  287. GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
  288. GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
  289. clocks = <&cpg CPG_MOD 407>;
  290. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  291. resets = <&cpg 407>;
  292. };
  293. i2c0: i2c@e6500000 {
  294. #address-cells = <1>;
  295. #size-cells = <0>;
  296. compatible = "renesas,i2c-r8a77965",
  297. "renesas,rcar-gen3-i2c";
  298. reg = <0 0xe6500000 0 0x40>;
  299. interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
  300. clocks = <&cpg CPG_MOD 931>;
  301. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  302. resets = <&cpg 931>;
  303. dmas = <&dmac1 0x91>, <&dmac1 0x90>,
  304. <&dmac2 0x91>, <&dmac2 0x90>;
  305. dma-names = "tx", "rx", "tx", "rx";
  306. i2c-scl-internal-delay-ns = <110>;
  307. status = "disabled";
  308. };
  309. i2c1: i2c@e6508000 {
  310. #address-cells = <1>;
  311. #size-cells = <0>;
  312. compatible = "renesas,i2c-r8a77965",
  313. "renesas,rcar-gen3-i2c";
  314. reg = <0 0xe6508000 0 0x40>;
  315. interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
  316. clocks = <&cpg CPG_MOD 930>;
  317. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  318. resets = <&cpg 930>;
  319. dmas = <&dmac1 0x93>, <&dmac1 0x92>,
  320. <&dmac2 0x93>, <&dmac2 0x92>;
  321. dma-names = "tx", "rx", "tx", "rx";
  322. i2c-scl-internal-delay-ns = <6>;
  323. status = "disabled";
  324. };
  325. i2c2: i2c@e6510000 {
  326. #address-cells = <1>;
  327. #size-cells = <0>;
  328. compatible = "renesas,i2c-r8a77965",
  329. "renesas,rcar-gen3-i2c";
  330. reg = <0 0xe6510000 0 0x40>;
  331. interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
  332. clocks = <&cpg CPG_MOD 929>;
  333. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  334. resets = <&cpg 929>;
  335. dmas = <&dmac1 0x95>, <&dmac1 0x94>,
  336. <&dmac2 0x95>, <&dmac2 0x94>;
  337. dma-names = "tx", "rx", "tx", "rx";
  338. i2c-scl-internal-delay-ns = <6>;
  339. status = "disabled";
  340. };
  341. i2c3: i2c@e66d0000 {
  342. #address-cells = <1>;
  343. #size-cells = <0>;
  344. compatible = "renesas,i2c-r8a77965",
  345. "renesas,rcar-gen3-i2c";
  346. reg = <0 0xe66d0000 0 0x40>;
  347. interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
  348. clocks = <&cpg CPG_MOD 928>;
  349. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  350. resets = <&cpg 928>;
  351. dmas = <&dmac0 0x97>, <&dmac0 0x96>;
  352. dma-names = "tx", "rx";
  353. i2c-scl-internal-delay-ns = <110>;
  354. status = "disabled";
  355. };
  356. i2c4: i2c@e66d8000 {
  357. #address-cells = <1>;
  358. #size-cells = <0>;
  359. compatible = "renesas,i2c-r8a77965",
  360. "renesas,rcar-gen3-i2c";
  361. reg = <0 0xe66d8000 0 0x40>;
  362. interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
  363. clocks = <&cpg CPG_MOD 927>;
  364. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  365. resets = <&cpg 927>;
  366. dmas = <&dmac0 0x99>, <&dmac0 0x98>;
  367. dma-names = "tx", "rx";
  368. i2c-scl-internal-delay-ns = <110>;
  369. status = "disabled";
  370. };
  371. i2c5: i2c@e66e0000 {
  372. #address-cells = <1>;
  373. #size-cells = <0>;
  374. compatible = "renesas,i2c-r8a77965",
  375. "renesas,rcar-gen3-i2c";
  376. reg = <0 0xe66e0000 0 0x40>;
  377. interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
  378. clocks = <&cpg CPG_MOD 919>;
  379. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  380. resets = <&cpg 919>;
  381. dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
  382. dma-names = "tx", "rx";
  383. i2c-scl-internal-delay-ns = <110>;
  384. status = "disabled";
  385. };
  386. i2c6: i2c@e66e8000 {
  387. #address-cells = <1>;
  388. #size-cells = <0>;
  389. compatible = "renesas,i2c-r8a77965",
  390. "renesas,rcar-gen3-i2c";
  391. reg = <0 0xe66e8000 0 0x40>;
  392. interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
  393. clocks = <&cpg CPG_MOD 918>;
  394. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  395. resets = <&cpg 918>;
  396. dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
  397. dma-names = "tx", "rx";
  398. i2c-scl-internal-delay-ns = <6>;
  399. status = "disabled";
  400. };
  401. i2c_dvfs: i2c@e60b0000 {
  402. #address-cells = <1>;
  403. #size-cells = <0>;
  404. compatible = "renesas,iic-r8a77965",
  405. "renesas,rcar-gen3-iic",
  406. "renesas,rmobile-iic";
  407. reg = <0 0xe60b0000 0 0x425>;
  408. interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
  409. clocks = <&cpg CPG_MOD 926>;
  410. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  411. resets = <&cpg 926>;
  412. dmas = <&dmac0 0x11>, <&dmac0 0x10>;
  413. dma-names = "tx", "rx";
  414. status = "disabled";
  415. };
  416. hscif0: serial@e6540000 {
  417. compatible = "renesas,hscif-r8a77965",
  418. "renesas,rcar-gen3-hscif",
  419. "renesas,hscif";
  420. reg = <0 0xe6540000 0 0x60>;
  421. interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
  422. clocks = <&cpg CPG_MOD 520>,
  423. <&cpg CPG_CORE R8A77965_CLK_S3D1>,
  424. <&scif_clk>;
  425. clock-names = "fck", "brg_int", "scif_clk";
  426. dmas = <&dmac1 0x31>, <&dmac1 0x30>,
  427. <&dmac2 0x31>, <&dmac2 0x30>;
  428. dma-names = "tx", "rx", "tx", "rx";
  429. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  430. resets = <&cpg 520>;
  431. status = "disabled";
  432. };
  433. hscif1: serial@e6550000 {
  434. compatible = "renesas,hscif-r8a77965",
  435. "renesas,rcar-gen3-hscif",
  436. "renesas,hscif";
  437. reg = <0 0xe6550000 0 0x60>;
  438. interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
  439. clocks = <&cpg CPG_MOD 519>,
  440. <&cpg CPG_CORE R8A77965_CLK_S3D1>,
  441. <&scif_clk>;
  442. clock-names = "fck", "brg_int", "scif_clk";
  443. dmas = <&dmac1 0x33>, <&dmac1 0x32>,
  444. <&dmac2 0x33>, <&dmac2 0x32>;
  445. dma-names = "tx", "rx", "tx", "rx";
  446. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  447. resets = <&cpg 519>;
  448. status = "disabled";
  449. };
  450. hscif2: serial@e6560000 {
  451. compatible = "renesas,hscif-r8a77965",
  452. "renesas,rcar-gen3-hscif",
  453. "renesas,hscif";
  454. reg = <0 0xe6560000 0 0x60>;
  455. interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
  456. clocks = <&cpg CPG_MOD 518>,
  457. <&cpg CPG_CORE R8A77965_CLK_S3D1>,
  458. <&scif_clk>;
  459. clock-names = "fck", "brg_int", "scif_clk";
  460. dmas = <&dmac1 0x35>, <&dmac1 0x34>,
  461. <&dmac2 0x35>, <&dmac2 0x34>;
  462. dma-names = "tx", "rx", "tx", "rx";
  463. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  464. resets = <&cpg 518>;
  465. status = "disabled";
  466. };
  467. hscif3: serial@e66a0000 {
  468. compatible = "renesas,hscif-r8a77965",
  469. "renesas,rcar-gen3-hscif",
  470. "renesas,hscif";
  471. reg = <0 0xe66a0000 0 0x60>;
  472. interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
  473. clocks = <&cpg CPG_MOD 517>,
  474. <&cpg CPG_CORE R8A77965_CLK_S3D1>,
  475. <&scif_clk>;
  476. clock-names = "fck", "brg_int", "scif_clk";
  477. dmas = <&dmac0 0x37>, <&dmac0 0x36>;
  478. dma-names = "tx", "rx";
  479. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  480. resets = <&cpg 517>;
  481. status = "disabled";
  482. };
  483. hscif4: serial@e66b0000 {
  484. compatible = "renesas,hscif-r8a77965",
  485. "renesas,rcar-gen3-hscif",
  486. "renesas,hscif";
  487. reg = <0 0xe66b0000 0 0x60>;
  488. interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
  489. clocks = <&cpg CPG_MOD 516>,
  490. <&cpg CPG_CORE R8A77965_CLK_S3D1>,
  491. <&scif_clk>;
  492. clock-names = "fck", "brg_int", "scif_clk";
  493. dmas = <&dmac0 0x39>, <&dmac0 0x38>;
  494. dma-names = "tx", "rx";
  495. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  496. resets = <&cpg 516>;
  497. status = "disabled";
  498. };
  499. hsusb: usb@e6590000 {
  500. compatible = "renesas,usbhs-r8a77965",
  501. "renesas,rcar-gen3-usbhs";
  502. reg = <0 0xe6590000 0 0x100>;
  503. interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
  504. clocks = <&cpg CPG_MOD 704>;
  505. dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
  506. <&usb_dmac1 0>, <&usb_dmac1 1>;
  507. dma-names = "ch0", "ch1", "ch2", "ch3";
  508. renesas,buswait = <11>;
  509. phys = <&usb2_phy0>;
  510. phy-names = "usb";
  511. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  512. resets = <&cpg 704>;
  513. status = "disabled";
  514. };
  515. usb_dmac0: dma-controller@e65a0000 {
  516. compatible = "renesas,r8a77965-usb-dmac",
  517. "renesas,usb-dmac";
  518. reg = <0 0xe65a0000 0 0x100>;
  519. interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
  520. GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
  521. interrupt-names = "ch0", "ch1";
  522. clocks = <&cpg CPG_MOD 330>;
  523. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  524. resets = <&cpg 330>;
  525. #dma-cells = <1>;
  526. dma-channels = <2>;
  527. };
  528. usb_dmac1: dma-controller@e65b0000 {
  529. compatible = "renesas,r8a77965-usb-dmac",
  530. "renesas,usb-dmac";
  531. reg = <0 0xe65b0000 0 0x100>;
  532. interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
  533. GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
  534. interrupt-names = "ch0", "ch1";
  535. clocks = <&cpg CPG_MOD 331>;
  536. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  537. resets = <&cpg 331>;
  538. #dma-cells = <1>;
  539. dma-channels = <2>;
  540. };
  541. usb3_phy0: usb-phy@e65ee000 {
  542. compatible = "renesas,r8a77965-usb3-phy",
  543. "renesas,rcar-gen3-usb3-phy";
  544. reg = <0 0xe65ee000 0 0x90>;
  545. clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
  546. <&usb_extal_clk>;
  547. clock-names = "usb3-if", "usb3s_clk", "usb_extal";
  548. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  549. resets = <&cpg 328>;
  550. #phy-cells = <0>;
  551. status = "disabled";
  552. };
  553. dmac0: dma-controller@e6700000 {
  554. compatible = "renesas,dmac-r8a77965",
  555. "renesas,rcar-dmac";
  556. reg = <0 0xe6700000 0 0x10000>;
  557. interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
  558. GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
  559. GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
  560. GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
  561. GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
  562. GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
  563. GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
  564. GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
  565. GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
  566. GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
  567. GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
  568. GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
  569. GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
  570. GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
  571. GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
  572. GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
  573. GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
  574. interrupt-names = "error",
  575. "ch0", "ch1", "ch2", "ch3",
  576. "ch4", "ch5", "ch6", "ch7",
  577. "ch8", "ch9", "ch10", "ch11",
  578. "ch12", "ch13", "ch14", "ch15";
  579. clocks = <&cpg CPG_MOD 219>;
  580. clock-names = "fck";
  581. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  582. resets = <&cpg 219>;
  583. #dma-cells = <1>;
  584. dma-channels = <16>;
  585. iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
  586. <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
  587. <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
  588. <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
  589. <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
  590. <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
  591. <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
  592. <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
  593. };
  594. dmac1: dma-controller@e7300000 {
  595. compatible = "renesas,dmac-r8a77965",
  596. "renesas,rcar-dmac";
  597. reg = <0 0xe7300000 0 0x10000>;
  598. interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
  599. GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
  600. GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
  601. GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
  602. GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
  603. GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
  604. GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
  605. GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
  606. GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
  607. GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
  608. GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
  609. GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
  610. GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
  611. GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
  612. GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
  613. GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
  614. GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
  615. interrupt-names = "error",
  616. "ch0", "ch1", "ch2", "ch3",
  617. "ch4", "ch5", "ch6", "ch7",
  618. "ch8", "ch9", "ch10", "ch11",
  619. "ch12", "ch13", "ch14", "ch15";
  620. clocks = <&cpg CPG_MOD 218>;
  621. clock-names = "fck";
  622. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  623. resets = <&cpg 218>;
  624. #dma-cells = <1>;
  625. dma-channels = <16>;
  626. iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
  627. <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
  628. <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
  629. <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
  630. <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
  631. <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
  632. <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
  633. <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
  634. };
  635. dmac2: dma-controller@e7310000 {
  636. compatible = "renesas,dmac-r8a77965",
  637. "renesas,rcar-dmac";
  638. reg = <0 0xe7310000 0 0x10000>;
  639. interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
  640. GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
  641. GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
  642. GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
  643. GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
  644. GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
  645. GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
  646. GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
  647. GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
  648. GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
  649. GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
  650. GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
  651. GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
  652. GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
  653. GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
  654. GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
  655. GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
  656. interrupt-names = "error",
  657. "ch0", "ch1", "ch2", "ch3",
  658. "ch4", "ch5", "ch6", "ch7",
  659. "ch8", "ch9", "ch10", "ch11",
  660. "ch12", "ch13", "ch14", "ch15";
  661. clocks = <&cpg CPG_MOD 217>;
  662. clock-names = "fck";
  663. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  664. resets = <&cpg 217>;
  665. #dma-cells = <1>;
  666. dma-channels = <16>;
  667. iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
  668. <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
  669. <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
  670. <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
  671. <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
  672. <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
  673. <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
  674. <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
  675. };
  676. ipmmu_ds0: mmu@e6740000 {
  677. compatible = "renesas,ipmmu-r8a77965";
  678. reg = <0 0xe6740000 0 0x1000>;
  679. renesas,ipmmu-main = <&ipmmu_mm 0>;
  680. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  681. #iommu-cells = <1>;
  682. };
  683. ipmmu_ds1: mmu@e7740000 {
  684. compatible = "renesas,ipmmu-r8a77965";
  685. reg = <0 0xe7740000 0 0x1000>;
  686. renesas,ipmmu-main = <&ipmmu_mm 1>;
  687. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  688. #iommu-cells = <1>;
  689. };
  690. ipmmu_hc: mmu@e6570000 {
  691. compatible = "renesas,ipmmu-r8a77965";
  692. reg = <0 0xe6570000 0 0x1000>;
  693. renesas,ipmmu-main = <&ipmmu_mm 2>;
  694. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  695. #iommu-cells = <1>;
  696. };
  697. ipmmu_ir: mmu@ff8b0000 {
  698. compatible = "renesas,ipmmu-r8a77965";
  699. reg = <0 0xff8b0000 0 0x1000>;
  700. renesas,ipmmu-main = <&ipmmu_mm 3>;
  701. power-domains = <&sysc R8A77965_PD_A3IR>;
  702. #iommu-cells = <1>;
  703. };
  704. ipmmu_mm: mmu@e67b0000 {
  705. compatible = "renesas,ipmmu-r8a77965";
  706. reg = <0 0xe67b0000 0 0x1000>;
  707. interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
  708. <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
  709. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  710. #iommu-cells = <1>;
  711. };
  712. ipmmu_mp: mmu@ec670000 {
  713. compatible = "renesas,ipmmu-r8a77965";
  714. reg = <0 0xec670000 0 0x1000>;
  715. renesas,ipmmu-main = <&ipmmu_mm 4>;
  716. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  717. #iommu-cells = <1>;
  718. };
  719. ipmmu_pv0: mmu@fd800000 {
  720. compatible = "renesas,ipmmu-r8a77965";
  721. reg = <0 0xfd800000 0 0x1000>;
  722. renesas,ipmmu-main = <&ipmmu_mm 6>;
  723. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  724. #iommu-cells = <1>;
  725. };
  726. ipmmu_rt: mmu@ffc80000 {
  727. compatible = "renesas,ipmmu-r8a77965";
  728. reg = <0 0xffc80000 0 0x1000>;
  729. renesas,ipmmu-main = <&ipmmu_mm 10>;
  730. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  731. #iommu-cells = <1>;
  732. };
  733. ipmmu_vc0: mmu@fe6b0000 {
  734. compatible = "renesas,ipmmu-r8a77965";
  735. reg = <0 0xfe6b0000 0 0x1000>;
  736. renesas,ipmmu-main = <&ipmmu_mm 12>;
  737. power-domains = <&sysc R8A77965_PD_A3VC>;
  738. #iommu-cells = <1>;
  739. };
  740. ipmmu_vi0: mmu@febd0000 {
  741. compatible = "renesas,ipmmu-r8a77965";
  742. reg = <0 0xfebd0000 0 0x1000>;
  743. renesas,ipmmu-main = <&ipmmu_mm 14>;
  744. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  745. #iommu-cells = <1>;
  746. };
  747. ipmmu_vp0: mmu@fe990000 {
  748. compatible = "renesas,ipmmu-r8a77965";
  749. reg = <0 0xfe990000 0 0x1000>;
  750. renesas,ipmmu-main = <&ipmmu_mm 16>;
  751. power-domains = <&sysc R8A77965_PD_A3VP>;
  752. #iommu-cells = <1>;
  753. };
  754. avb: ethernet@e6800000 {
  755. compatible = "renesas,etheravb-r8a77965",
  756. "renesas,etheravb-rcar-gen3";
  757. reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
  758. interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
  759. <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
  760. <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
  761. <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
  762. <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
  763. <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
  764. <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
  765. <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
  766. <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
  767. <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
  768. <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
  769. <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
  770. <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
  771. <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
  772. <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
  773. <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
  774. <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
  775. <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
  776. <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
  777. <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
  778. <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
  779. <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
  780. <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
  781. <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
  782. <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
  783. interrupt-names = "ch0", "ch1", "ch2", "ch3",
  784. "ch4", "ch5", "ch6", "ch7",
  785. "ch8", "ch9", "ch10", "ch11",
  786. "ch12", "ch13", "ch14", "ch15",
  787. "ch16", "ch17", "ch18", "ch19",
  788. "ch20", "ch21", "ch22", "ch23",
  789. "ch24";
  790. clocks = <&cpg CPG_MOD 812>;
  791. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  792. resets = <&cpg 812>;
  793. phy-mode = "rgmii";
  794. #address-cells = <1>;
  795. #size-cells = <0>;
  796. status = "disabled";
  797. };
  798. pwm0: pwm@e6e30000 {
  799. compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
  800. reg = <0 0xe6e30000 0 8>;
  801. #pwm-cells = <2>;
  802. clocks = <&cpg CPG_MOD 523>;
  803. resets = <&cpg 523>;
  804. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  805. status = "disabled";
  806. };
  807. pwm1: pwm@e6e31000 {
  808. compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
  809. reg = <0 0xe6e31000 0 8>;
  810. #pwm-cells = <2>;
  811. clocks = <&cpg CPG_MOD 523>;
  812. resets = <&cpg 523>;
  813. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  814. status = "disabled";
  815. };
  816. pwm2: pwm@e6e32000 {
  817. compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
  818. reg = <0 0xe6e32000 0 8>;
  819. #pwm-cells = <2>;
  820. clocks = <&cpg CPG_MOD 523>;
  821. resets = <&cpg 523>;
  822. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  823. status = "disabled";
  824. };
  825. pwm3: pwm@e6e33000 {
  826. compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
  827. reg = <0 0xe6e33000 0 8>;
  828. #pwm-cells = <2>;
  829. clocks = <&cpg CPG_MOD 523>;
  830. resets = <&cpg 523>;
  831. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  832. status = "disabled";
  833. };
  834. pwm4: pwm@e6e34000 {
  835. compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
  836. reg = <0 0xe6e34000 0 8>;
  837. #pwm-cells = <2>;
  838. clocks = <&cpg CPG_MOD 523>;
  839. resets = <&cpg 523>;
  840. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  841. status = "disabled";
  842. };
  843. pwm5: pwm@e6e35000 {
  844. compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
  845. reg = <0 0xe6e35000 0 8>;
  846. #pwm-cells = <2>;
  847. clocks = <&cpg CPG_MOD 523>;
  848. resets = <&cpg 523>;
  849. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  850. status = "disabled";
  851. };
  852. pwm6: pwm@e6e36000 {
  853. compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
  854. reg = <0 0xe6e36000 0 8>;
  855. #pwm-cells = <2>;
  856. clocks = <&cpg CPG_MOD 523>;
  857. resets = <&cpg 523>;
  858. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  859. status = "disabled";
  860. };
  861. scif0: serial@e6e60000 {
  862. compatible = "renesas,scif-r8a77965",
  863. "renesas,rcar-gen3-scif", "renesas,scif";
  864. reg = <0 0xe6e60000 0 64>;
  865. interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
  866. clocks = <&cpg CPG_MOD 207>,
  867. <&cpg CPG_CORE R8A77965_CLK_S3D1>,
  868. <&scif_clk>;
  869. clock-names = "fck", "brg_int", "scif_clk";
  870. dmas = <&dmac1 0x51>, <&dmac1 0x50>,
  871. <&dmac2 0x51>, <&dmac2 0x50>;
  872. dma-names = "tx", "rx", "tx", "rx";
  873. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  874. resets = <&cpg 207>;
  875. status = "disabled";
  876. };
  877. scif1: serial@e6e68000 {
  878. compatible = "renesas,scif-r8a77965",
  879. "renesas,rcar-gen3-scif", "renesas,scif";
  880. reg = <0 0xe6e68000 0 64>;
  881. interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
  882. clocks = <&cpg CPG_MOD 206>,
  883. <&cpg CPG_CORE R8A77965_CLK_S3D1>,
  884. <&scif_clk>;
  885. clock-names = "fck", "brg_int", "scif_clk";
  886. dmas = <&dmac1 0x53>, <&dmac1 0x52>,
  887. <&dmac2 0x53>, <&dmac2 0x52>;
  888. dma-names = "tx", "rx", "tx", "rx";
  889. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  890. resets = <&cpg 206>;
  891. status = "disabled";
  892. };
  893. scif2: serial@e6e88000 {
  894. compatible = "renesas,scif-r8a77965",
  895. "renesas,rcar-gen3-scif", "renesas,scif";
  896. reg = <0 0xe6e88000 0 64>;
  897. interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
  898. clocks = <&cpg CPG_MOD 310>,
  899. <&cpg CPG_CORE R8A77965_CLK_S3D1>,
  900. <&scif_clk>;
  901. clock-names = "fck", "brg_int", "scif_clk";
  902. dmas = <&dmac1 0x13>, <&dmac1 0x12>,
  903. <&dmac2 0x13>, <&dmac2 0x12>;
  904. dma-names = "tx", "rx", "tx", "rx";
  905. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  906. resets = <&cpg 310>;
  907. status = "disabled";
  908. };
  909. scif3: serial@e6c50000 {
  910. compatible = "renesas,scif-r8a77965",
  911. "renesas,rcar-gen3-scif", "renesas,scif";
  912. reg = <0 0xe6c50000 0 64>;
  913. interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
  914. clocks = <&cpg CPG_MOD 204>,
  915. <&cpg CPG_CORE R8A77965_CLK_S3D1>,
  916. <&scif_clk>;
  917. clock-names = "fck", "brg_int", "scif_clk";
  918. dmas = <&dmac0 0x57>, <&dmac0 0x56>;
  919. dma-names = "tx", "rx";
  920. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  921. resets = <&cpg 204>;
  922. status = "disabled";
  923. };
  924. scif4: serial@e6c40000 {
  925. compatible = "renesas,scif-r8a77965",
  926. "renesas,rcar-gen3-scif", "renesas,scif";
  927. reg = <0 0xe6c40000 0 64>;
  928. interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
  929. clocks = <&cpg CPG_MOD 203>,
  930. <&cpg CPG_CORE R8A77965_CLK_S3D1>,
  931. <&scif_clk>;
  932. clock-names = "fck", "brg_int", "scif_clk";
  933. dmas = <&dmac0 0x59>, <&dmac0 0x58>;
  934. dma-names = "tx", "rx";
  935. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  936. resets = <&cpg 203>;
  937. status = "disabled";
  938. };
  939. scif5: serial@e6f30000 {
  940. compatible = "renesas,scif-r8a77965",
  941. "renesas,rcar-gen3-scif", "renesas,scif";
  942. reg = <0 0xe6f30000 0 64>;
  943. interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
  944. clocks = <&cpg CPG_MOD 202>,
  945. <&cpg CPG_CORE R8A77965_CLK_S3D1>,
  946. <&scif_clk>;
  947. clock-names = "fck", "brg_int", "scif_clk";
  948. dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
  949. <&dmac2 0x5b>, <&dmac2 0x5a>;
  950. dma-names = "tx", "rx", "tx", "rx";
  951. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  952. resets = <&cpg 202>;
  953. status = "disabled";
  954. };
  955. msiof0: spi@e6e90000 {
  956. compatible = "renesas,msiof-r8a77965",
  957. "renesas,rcar-gen3-msiof";
  958. reg = <0 0xe6e90000 0 0x0064>;
  959. interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
  960. clocks = <&cpg CPG_MOD 211>;
  961. dmas = <&dmac1 0x41>, <&dmac1 0x40>,
  962. <&dmac2 0x41>, <&dmac2 0x40>;
  963. dma-names = "tx", "rx", "tx", "rx";
  964. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  965. resets = <&cpg 211>;
  966. #address-cells = <1>;
  967. #size-cells = <0>;
  968. status = "disabled";
  969. };
  970. msiof1: spi@e6ea0000 {
  971. compatible = "renesas,msiof-r8a77965",
  972. "renesas,rcar-gen3-msiof";
  973. reg = <0 0xe6ea0000 0 0x0064>;
  974. interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
  975. clocks = <&cpg CPG_MOD 210>;
  976. dmas = <&dmac1 0x43>, <&dmac1 0x42>,
  977. <&dmac2 0x43>, <&dmac2 0x42>;
  978. dma-names = "tx", "rx", "tx", "rx";
  979. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  980. resets = <&cpg 210>;
  981. #address-cells = <1>;
  982. #size-cells = <0>;
  983. status = "disabled";
  984. };
  985. msiof2: spi@e6c00000 {
  986. compatible = "renesas,msiof-r8a77965",
  987. "renesas,rcar-gen3-msiof";
  988. reg = <0 0xe6c00000 0 0x0064>;
  989. interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
  990. clocks = <&cpg CPG_MOD 209>;
  991. dmas = <&dmac0 0x45>, <&dmac0 0x44>;
  992. dma-names = "tx", "rx";
  993. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  994. resets = <&cpg 209>;
  995. #address-cells = <1>;
  996. #size-cells = <0>;
  997. status = "disabled";
  998. };
  999. msiof3: spi@e6c10000 {
  1000. compatible = "renesas,msiof-r8a77965",
  1001. "renesas,rcar-gen3-msiof";
  1002. reg = <0 0xe6c10000 0 0x0064>;
  1003. interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
  1004. clocks = <&cpg CPG_MOD 208>;
  1005. dmas = <&dmac0 0x47>, <&dmac0 0x46>;
  1006. dma-names = "tx", "rx";
  1007. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1008. resets = <&cpg 208>;
  1009. #address-cells = <1>;
  1010. #size-cells = <0>;
  1011. status = "disabled";
  1012. };
  1013. vin0: video@e6ef0000 {
  1014. compatible = "renesas,vin-r8a77965";
  1015. reg = <0 0xe6ef0000 0 0x1000>;
  1016. interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
  1017. clocks = <&cpg CPG_MOD 811>;
  1018. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1019. resets = <&cpg 811>;
  1020. renesas,id = <0>;
  1021. status = "disabled";
  1022. ports {
  1023. #address-cells = <1>;
  1024. #size-cells = <0>;
  1025. port@1 {
  1026. #address-cells = <1>;
  1027. #size-cells = <0>;
  1028. reg = <1>;
  1029. vin0csi20: endpoint@0 {
  1030. reg = <0>;
  1031. remote-endpoint= <&csi20vin0>;
  1032. };
  1033. vin0csi40: endpoint@2 {
  1034. reg = <2>;
  1035. remote-endpoint= <&csi40vin0>;
  1036. };
  1037. };
  1038. };
  1039. };
  1040. vin1: video@e6ef1000 {
  1041. compatible = "renesas,vin-r8a77965";
  1042. reg = <0 0xe6ef1000 0 0x1000>;
  1043. interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
  1044. clocks = <&cpg CPG_MOD 810>;
  1045. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1046. resets = <&cpg 810>;
  1047. renesas,id = <1>;
  1048. status = "disabled";
  1049. ports {
  1050. #address-cells = <1>;
  1051. #size-cells = <0>;
  1052. port@1 {
  1053. #address-cells = <1>;
  1054. #size-cells = <0>;
  1055. reg = <1>;
  1056. vin1csi20: endpoint@0 {
  1057. reg = <0>;
  1058. remote-endpoint= <&csi20vin1>;
  1059. };
  1060. vin1csi40: endpoint@2 {
  1061. reg = <2>;
  1062. remote-endpoint= <&csi40vin1>;
  1063. };
  1064. };
  1065. };
  1066. };
  1067. vin2: video@e6ef2000 {
  1068. compatible = "renesas,vin-r8a77965";
  1069. reg = <0 0xe6ef2000 0 0x1000>;
  1070. interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
  1071. clocks = <&cpg CPG_MOD 809>;
  1072. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1073. resets = <&cpg 809>;
  1074. renesas,id = <2>;
  1075. status = "disabled";
  1076. ports {
  1077. #address-cells = <1>;
  1078. #size-cells = <0>;
  1079. port@1 {
  1080. #address-cells = <1>;
  1081. #size-cells = <0>;
  1082. reg = <1>;
  1083. vin2csi20: endpoint@0 {
  1084. reg = <0>;
  1085. remote-endpoint= <&csi20vin2>;
  1086. };
  1087. vin2csi40: endpoint@2 {
  1088. reg = <2>;
  1089. remote-endpoint= <&csi40vin2>;
  1090. };
  1091. };
  1092. };
  1093. };
  1094. vin3: video@e6ef3000 {
  1095. compatible = "renesas,vin-r8a77965";
  1096. reg = <0 0xe6ef3000 0 0x1000>;
  1097. interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
  1098. clocks = <&cpg CPG_MOD 808>;
  1099. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1100. resets = <&cpg 808>;
  1101. renesas,id = <3>;
  1102. status = "disabled";
  1103. ports {
  1104. #address-cells = <1>;
  1105. #size-cells = <0>;
  1106. port@1 {
  1107. #address-cells = <1>;
  1108. #size-cells = <0>;
  1109. reg = <1>;
  1110. vin3csi20: endpoint@0 {
  1111. reg = <0>;
  1112. remote-endpoint= <&csi20vin3>;
  1113. };
  1114. vin3csi40: endpoint@2 {
  1115. reg = <2>;
  1116. remote-endpoint= <&csi40vin3>;
  1117. };
  1118. };
  1119. };
  1120. };
  1121. vin4: video@e6ef4000 {
  1122. compatible = "renesas,vin-r8a77965";
  1123. reg = <0 0xe6ef4000 0 0x1000>;
  1124. interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
  1125. clocks = <&cpg CPG_MOD 807>;
  1126. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1127. resets = <&cpg 807>;
  1128. renesas,id = <4>;
  1129. status = "disabled";
  1130. ports {
  1131. #address-cells = <1>;
  1132. #size-cells = <0>;
  1133. port@1 {
  1134. #address-cells = <1>;
  1135. #size-cells = <0>;
  1136. reg = <1>;
  1137. vin4csi20: endpoint@0 {
  1138. reg = <0>;
  1139. remote-endpoint= <&csi20vin4>;
  1140. };
  1141. vin4csi40: endpoint@2 {
  1142. reg = <2>;
  1143. remote-endpoint= <&csi40vin4>;
  1144. };
  1145. };
  1146. };
  1147. };
  1148. vin5: video@e6ef5000 {
  1149. compatible = "renesas,vin-r8a77965";
  1150. reg = <0 0xe6ef5000 0 0x1000>;
  1151. interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
  1152. clocks = <&cpg CPG_MOD 806>;
  1153. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1154. resets = <&cpg 806>;
  1155. renesas,id = <5>;
  1156. status = "disabled";
  1157. ports {
  1158. #address-cells = <1>;
  1159. #size-cells = <0>;
  1160. port@1 {
  1161. #address-cells = <1>;
  1162. #size-cells = <0>;
  1163. reg = <1>;
  1164. vin5csi20: endpoint@0 {
  1165. reg = <0>;
  1166. remote-endpoint= <&csi20vin5>;
  1167. };
  1168. vin5csi40: endpoint@2 {
  1169. reg = <2>;
  1170. remote-endpoint= <&csi40vin5>;
  1171. };
  1172. };
  1173. };
  1174. };
  1175. vin6: video@e6ef6000 {
  1176. compatible = "renesas,vin-r8a77965";
  1177. reg = <0 0xe6ef6000 0 0x1000>;
  1178. interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
  1179. clocks = <&cpg CPG_MOD 805>;
  1180. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1181. resets = <&cpg 805>;
  1182. renesas,id = <6>;
  1183. status = "disabled";
  1184. ports {
  1185. #address-cells = <1>;
  1186. #size-cells = <0>;
  1187. port@1 {
  1188. #address-cells = <1>;
  1189. #size-cells = <0>;
  1190. reg = <1>;
  1191. vin6csi20: endpoint@0 {
  1192. reg = <0>;
  1193. remote-endpoint= <&csi20vin6>;
  1194. };
  1195. vin6csi40: endpoint@2 {
  1196. reg = <2>;
  1197. remote-endpoint= <&csi40vin6>;
  1198. };
  1199. };
  1200. };
  1201. };
  1202. vin7: video@e6ef7000 {
  1203. compatible = "renesas,vin-r8a77965";
  1204. reg = <0 0xe6ef7000 0 0x1000>;
  1205. interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
  1206. clocks = <&cpg CPG_MOD 804>;
  1207. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1208. resets = <&cpg 804>;
  1209. renesas,id = <7>;
  1210. status = "disabled";
  1211. ports {
  1212. #address-cells = <1>;
  1213. #size-cells = <0>;
  1214. port@1 {
  1215. #address-cells = <1>;
  1216. #size-cells = <0>;
  1217. reg = <1>;
  1218. vin7csi20: endpoint@0 {
  1219. reg = <0>;
  1220. remote-endpoint= <&csi20vin7>;
  1221. };
  1222. vin7csi40: endpoint@2 {
  1223. reg = <2>;
  1224. remote-endpoint= <&csi40vin7>;
  1225. };
  1226. };
  1227. };
  1228. };
  1229. rcar_sound: sound@ec500000 {
  1230. reg = <0 0xec500000 0 0x1000>, /* SCU */
  1231. <0 0xec5a0000 0 0x100>, /* ADG */
  1232. <0 0xec540000 0 0x1000>, /* SSIU */
  1233. <0 0xec541000 0 0x280>, /* SSI */
  1234. <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
  1235. /* placeholder */
  1236. rcar_sound,dvc {
  1237. dvc0: dvc-0 {
  1238. };
  1239. dvc1: dvc-1 {
  1240. };
  1241. };
  1242. rcar_sound,src {
  1243. src0: src-0 {
  1244. };
  1245. src1: src-1 {
  1246. };
  1247. };
  1248. rcar_sound,ssi {
  1249. ssi0: ssi-0 {
  1250. };
  1251. ssi1: ssi-1 {
  1252. };
  1253. };
  1254. ports {
  1255. #address-cells = <1>;
  1256. #size-cells = <0>;
  1257. port@0 {
  1258. reg = <0>;
  1259. };
  1260. port@1 {
  1261. reg = <1>;
  1262. };
  1263. };
  1264. };
  1265. xhci0: usb@ee000000 {
  1266. compatible = "renesas,xhci-r8a77965",
  1267. "renesas,rcar-gen3-xhci";
  1268. reg = <0 0xee000000 0 0xc00>;
  1269. interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
  1270. clocks = <&cpg CPG_MOD 328>;
  1271. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1272. resets = <&cpg 328>;
  1273. status = "disabled";
  1274. };
  1275. usb3_peri0: usb@ee020000 {
  1276. compatible = "renesas,r8a77965-usb3-peri",
  1277. "renesas,rcar-gen3-usb3-peri";
  1278. reg = <0 0xee020000 0 0x400>;
  1279. interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
  1280. clocks = <&cpg CPG_MOD 328>;
  1281. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1282. resets = <&cpg 328>;
  1283. status = "disabled";
  1284. };
  1285. ohci0: usb@ee080000 {
  1286. compatible = "generic-ohci";
  1287. reg = <0 0xee080000 0 0x100>;
  1288. interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
  1289. clocks = <&cpg CPG_MOD 703>;
  1290. phys = <&usb2_phy0>;
  1291. phy-names = "usb";
  1292. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1293. resets = <&cpg 703>;
  1294. status = "disabled";
  1295. };
  1296. ohci1: usb@ee0a0000 {
  1297. compatible = "generic-ohci";
  1298. reg = <0 0xee0a0000 0 0x100>;
  1299. interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
  1300. clocks = <&cpg CPG_MOD 702>;
  1301. phys = <&usb2_phy1>;
  1302. phy-names = "usb";
  1303. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1304. resets = <&cpg 702>;
  1305. status = "disabled";
  1306. };
  1307. ehci0: usb@ee080100 {
  1308. compatible = "generic-ehci";
  1309. reg = <0 0xee080100 0 0x100>;
  1310. interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
  1311. clocks = <&cpg CPG_MOD 703>;
  1312. phys = <&usb2_phy0>;
  1313. phy-names = "usb";
  1314. companion = <&ohci0>;
  1315. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1316. resets = <&cpg 703>;
  1317. status = "disabled";
  1318. };
  1319. ehci1: usb@ee0a0100 {
  1320. compatible = "generic-ehci";
  1321. reg = <0 0xee0a0100 0 0x100>;
  1322. interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
  1323. clocks = <&cpg CPG_MOD 702>;
  1324. phys = <&usb2_phy1>;
  1325. phy-names = "usb";
  1326. companion = <&ohci1>;
  1327. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1328. resets = <&cpg 702>;
  1329. status = "disabled";
  1330. };
  1331. usb2_phy0: usb-phy@ee080200 {
  1332. compatible = "renesas,usb2-phy-r8a77965",
  1333. "renesas,rcar-gen3-usb2-phy";
  1334. reg = <0 0xee080200 0 0x700>;
  1335. interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
  1336. clocks = <&cpg CPG_MOD 703>;
  1337. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1338. resets = <&cpg 703>;
  1339. #phy-cells = <0>;
  1340. status = "disabled";
  1341. };
  1342. usb2_phy1: usb-phy@ee0a0200 {
  1343. compatible = "renesas,usb2-phy-r8a77965",
  1344. "renesas,rcar-gen3-usb2-phy";
  1345. reg = <0 0xee0a0200 0 0x700>;
  1346. clocks = <&cpg CPG_MOD 702>;
  1347. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1348. resets = <&cpg 702>;
  1349. #phy-cells = <0>;
  1350. status = "disabled";
  1351. };
  1352. sdhi0: sd@ee100000 {
  1353. compatible = "renesas,sdhi-r8a77965",
  1354. "renesas,rcar-gen3-sdhi";
  1355. reg = <0 0xee100000 0 0x2000>;
  1356. interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
  1357. clocks = <&cpg CPG_MOD 314>;
  1358. max-frequency = <200000000>;
  1359. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1360. resets = <&cpg 314>;
  1361. status = "disabled";
  1362. };
  1363. sdhi1: sd@ee120000 {
  1364. compatible = "renesas,sdhi-r8a77965",
  1365. "renesas,rcar-gen3-sdhi";
  1366. reg = <0 0xee120000 0 0x2000>;
  1367. interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
  1368. clocks = <&cpg CPG_MOD 313>;
  1369. max-frequency = <200000000>;
  1370. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1371. resets = <&cpg 313>;
  1372. status = "disabled";
  1373. };
  1374. sdhi2: sd@ee140000 {
  1375. compatible = "renesas,sdhi-r8a77965",
  1376. "renesas,rcar-gen3-sdhi";
  1377. reg = <0 0xee140000 0 0x2000>;
  1378. interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
  1379. clocks = <&cpg CPG_MOD 312>;
  1380. max-frequency = <200000000>;
  1381. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1382. resets = <&cpg 312>;
  1383. status = "disabled";
  1384. };
  1385. sdhi3: sd@ee160000 {
  1386. compatible = "renesas,sdhi-r8a77965",
  1387. "renesas,rcar-gen3-sdhi";
  1388. reg = <0 0xee160000 0 0x2000>;
  1389. interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
  1390. clocks = <&cpg CPG_MOD 311>;
  1391. max-frequency = <200000000>;
  1392. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1393. resets = <&cpg 311>;
  1394. status = "disabled";
  1395. };
  1396. gic: interrupt-controller@f1010000 {
  1397. compatible = "arm,gic-400";
  1398. #interrupt-cells = <3>;
  1399. #address-cells = <0>;
  1400. interrupt-controller;
  1401. reg = <0x0 0xf1010000 0 0x1000>,
  1402. <0x0 0xf1020000 0 0x20000>,
  1403. <0x0 0xf1040000 0 0x20000>,
  1404. <0x0 0xf1060000 0 0x20000>;
  1405. interrupts = <GIC_PPI 9
  1406. (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
  1407. clocks = <&cpg CPG_MOD 408>;
  1408. clock-names = "clk";
  1409. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1410. resets = <&cpg 408>;
  1411. };
  1412. pciec0: pcie@fe000000 {
  1413. compatible = "renesas,pcie-r8a77965",
  1414. "renesas,pcie-rcar-gen3";
  1415. reg = <0 0xfe000000 0 0x80000>;
  1416. #address-cells = <3>;
  1417. #size-cells = <2>;
  1418. bus-range = <0x00 0xff>;
  1419. device_type = "pci";
  1420. ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
  1421. 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
  1422. 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
  1423. 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
  1424. /* Map all possible DDR as inbound ranges */
  1425. dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
  1426. interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
  1427. <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
  1428. <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
  1429. #interrupt-cells = <1>;
  1430. interrupt-map-mask = <0 0 0 0>;
  1431. interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
  1432. clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
  1433. clock-names = "pcie", "pcie_bus";
  1434. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1435. resets = <&cpg 319>;
  1436. status = "disabled";
  1437. };
  1438. pciec1: pcie@ee800000 {
  1439. compatible = "renesas,pcie-r8a77965",
  1440. "renesas,pcie-rcar-gen3";
  1441. reg = <0 0xee800000 0 0x80000>;
  1442. #address-cells = <3>;
  1443. #size-cells = <2>;
  1444. bus-range = <0x00 0xff>;
  1445. device_type = "pci";
  1446. ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
  1447. 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
  1448. 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
  1449. 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
  1450. /* Map all possible DDR as inbound ranges */
  1451. dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
  1452. interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
  1453. <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
  1454. <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
  1455. #interrupt-cells = <1>;
  1456. interrupt-map-mask = <0 0 0 0>;
  1457. interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
  1458. clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
  1459. clock-names = "pcie", "pcie_bus";
  1460. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1461. resets = <&cpg 318>;
  1462. status = "disabled";
  1463. };
  1464. fcpf0: fcp@fe950000 {
  1465. compatible = "renesas,fcpf";
  1466. reg = <0 0xfe950000 0 0x200>;
  1467. clocks = <&cpg CPG_MOD 615>;
  1468. power-domains = <&sysc R8A77965_PD_A3VP>;
  1469. resets = <&cpg 615>;
  1470. };
  1471. vspb: vsp@fe960000 {
  1472. compatible = "renesas,vsp2";
  1473. reg = <0 0xfe960000 0 0x8000>;
  1474. interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
  1475. clocks = <&cpg CPG_MOD 626>;
  1476. power-domains = <&sysc R8A77965_PD_A3VP>;
  1477. resets = <&cpg 626>;
  1478. renesas,fcp = <&fcpvb0>;
  1479. };
  1480. fcpvb0: fcp@fe96f000 {
  1481. compatible = "renesas,fcpv";
  1482. reg = <0 0xfe96f000 0 0x200>;
  1483. clocks = <&cpg CPG_MOD 607>;
  1484. power-domains = <&sysc R8A77965_PD_A3VP>;
  1485. resets = <&cpg 607>;
  1486. };
  1487. vspi0: vsp@fe9a0000 {
  1488. compatible = "renesas,vsp2";
  1489. reg = <0 0xfe9a0000 0 0x8000>;
  1490. interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
  1491. clocks = <&cpg CPG_MOD 631>;
  1492. power-domains = <&sysc R8A77965_PD_A3VP>;
  1493. resets = <&cpg 631>;
  1494. renesas,fcp = <&fcpvi0>;
  1495. };
  1496. fcpvi0: fcp@fe9af000 {
  1497. compatible = "renesas,fcpv";
  1498. reg = <0 0xfe9af000 0 0x200>;
  1499. clocks = <&cpg CPG_MOD 611>;
  1500. power-domains = <&sysc R8A77965_PD_A3VP>;
  1501. resets = <&cpg 611>;
  1502. };
  1503. vspd0: vsp@fea20000 {
  1504. compatible = "renesas,vsp2";
  1505. reg = <0 0xfea20000 0 0x5000>;
  1506. interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
  1507. clocks = <&cpg CPG_MOD 623>;
  1508. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1509. resets = <&cpg 623>;
  1510. renesas,fcp = <&fcpvd0>;
  1511. };
  1512. fcpvd0: fcp@fea27000 {
  1513. compatible = "renesas,fcpv";
  1514. reg = <0 0xfea27000 0 0x200>;
  1515. clocks = <&cpg CPG_MOD 603>;
  1516. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1517. resets = <&cpg 603>;
  1518. };
  1519. vspd1: vsp@fea28000 {
  1520. compatible = "renesas,vsp2";
  1521. reg = <0 0xfea28000 0 0x5000>;
  1522. interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
  1523. clocks = <&cpg CPG_MOD 622>;
  1524. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1525. resets = <&cpg 622>;
  1526. renesas,fcp = <&fcpvd1>;
  1527. };
  1528. fcpvd1: fcp@fea2f000 {
  1529. compatible = "renesas,fcpv";
  1530. reg = <0 0xfea2f000 0 0x200>;
  1531. clocks = <&cpg CPG_MOD 602>;
  1532. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1533. resets = <&cpg 602>;
  1534. };
  1535. csi20: csi2@fea80000 {
  1536. compatible = "renesas,r8a77965-csi2";
  1537. reg = <0 0xfea80000 0 0x10000>;
  1538. interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
  1539. clocks = <&cpg CPG_MOD 714>;
  1540. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1541. resets = <&cpg 714>;
  1542. status = "disabled";
  1543. ports {
  1544. #address-cells = <1>;
  1545. #size-cells = <0>;
  1546. port@1 {
  1547. #address-cells = <1>;
  1548. #size-cells = <0>;
  1549. reg = <1>;
  1550. csi20vin0: endpoint@0 {
  1551. reg = <0>;
  1552. remote-endpoint = <&vin0csi20>;
  1553. };
  1554. csi20vin1: endpoint@1 {
  1555. reg = <1>;
  1556. remote-endpoint = <&vin1csi20>;
  1557. };
  1558. csi20vin2: endpoint@2 {
  1559. reg = <2>;
  1560. remote-endpoint = <&vin2csi20>;
  1561. };
  1562. csi20vin3: endpoint@3 {
  1563. reg = <3>;
  1564. remote-endpoint = <&vin3csi20>;
  1565. };
  1566. csi20vin4: endpoint@4 {
  1567. reg = <4>;
  1568. remote-endpoint = <&vin4csi20>;
  1569. };
  1570. csi20vin5: endpoint@5 {
  1571. reg = <5>;
  1572. remote-endpoint = <&vin5csi20>;
  1573. };
  1574. csi20vin6: endpoint@6 {
  1575. reg = <6>;
  1576. remote-endpoint = <&vin6csi20>;
  1577. };
  1578. csi20vin7: endpoint@7 {
  1579. reg = <7>;
  1580. remote-endpoint = <&vin7csi20>;
  1581. };
  1582. };
  1583. };
  1584. };
  1585. csi40: csi2@feaa0000 {
  1586. compatible = "renesas,r8a77965-csi2";
  1587. reg = <0 0xfeaa0000 0 0x10000>;
  1588. interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
  1589. clocks = <&cpg CPG_MOD 716>;
  1590. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1591. resets = <&cpg 716>;
  1592. status = "disabled";
  1593. ports {
  1594. #address-cells = <1>;
  1595. #size-cells = <0>;
  1596. port@1 {
  1597. #address-cells = <1>;
  1598. #size-cells = <0>;
  1599. reg = <1>;
  1600. csi40vin0: endpoint@0 {
  1601. reg = <0>;
  1602. remote-endpoint = <&vin0csi40>;
  1603. };
  1604. csi40vin1: endpoint@1 {
  1605. reg = <1>;
  1606. remote-endpoint = <&vin1csi40>;
  1607. };
  1608. csi40vin2: endpoint@2 {
  1609. reg = <2>;
  1610. remote-endpoint = <&vin2csi40>;
  1611. };
  1612. csi40vin3: endpoint@3 {
  1613. reg = <3>;
  1614. remote-endpoint = <&vin3csi40>;
  1615. };
  1616. csi40vin4: endpoint@4 {
  1617. reg = <4>;
  1618. remote-endpoint = <&vin4csi40>;
  1619. };
  1620. csi40vin5: endpoint@5 {
  1621. reg = <5>;
  1622. remote-endpoint = <&vin5csi40>;
  1623. };
  1624. csi40vin6: endpoint@6 {
  1625. reg = <6>;
  1626. remote-endpoint = <&vin6csi40>;
  1627. };
  1628. csi40vin7: endpoint@7 {
  1629. reg = <7>;
  1630. remote-endpoint = <&vin7csi40>;
  1631. };
  1632. };
  1633. };
  1634. };
  1635. hdmi0: hdmi@fead0000 {
  1636. compatible = "renesas,r8a77965-hdmi",
  1637. "renesas,rcar-gen3-hdmi";
  1638. reg = <0 0xfead0000 0 0x10000>;
  1639. interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
  1640. clocks = <&cpg CPG_MOD 729>,
  1641. <&cpg CPG_CORE R8A77965_CLK_HDMI>;
  1642. clock-names = "iahb", "isfr";
  1643. power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
  1644. resets = <&cpg 729>;
  1645. status = "disabled";
  1646. ports {
  1647. #address-cells = <1>;
  1648. #size-cells = <0>;
  1649. port@0 {
  1650. reg = <0>;
  1651. dw_hdmi0_in: endpoint {
  1652. remote-endpoint = <&du_out_hdmi0>;
  1653. };
  1654. };
  1655. port@1 {
  1656. reg = <1>;
  1657. };
  1658. };
  1659. };
  1660. du: display@feb00000 {
  1661. compatible = "renesas,du-r8a77965";
  1662. reg = <0 0xfeb00000 0 0x80000>;
  1663. reg-names = "du";
  1664. interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
  1665. <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
  1666. <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
  1667. clocks = <&cpg CPG_MOD 724>,
  1668. <&cpg CPG_MOD 723>,
  1669. <&cpg CPG_MOD 721>;
  1670. clock-names = "du.0", "du.1", "du.3";
  1671. status = "disabled";
  1672. vsps = <&vspd0 0 &vspd1 0 &vspd0 1>;
  1673. ports {
  1674. #address-cells = <1>;
  1675. #size-cells = <0>;
  1676. port@0 {
  1677. reg = <0>;
  1678. du_out_rgb: endpoint {
  1679. };
  1680. };
  1681. port@1 {
  1682. reg = <1>;
  1683. du_out_hdmi0: endpoint {
  1684. remote-endpoint = <&dw_hdmi0_in>;
  1685. };
  1686. };
  1687. port@2 {
  1688. reg = <2>;
  1689. du_out_lvds0: endpoint {
  1690. };
  1691. };
  1692. };
  1693. };
  1694. prr: chipid@fff00044 {
  1695. compatible = "renesas,prr";
  1696. reg = <0 0xfff00044 0 4>;
  1697. };
  1698. };
  1699. timer {
  1700. compatible = "arm,armv8-timer";
  1701. interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  1702. <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  1703. <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  1704. <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
  1705. };
  1706. thermal-zones {
  1707. sensor_thermal1: sensor-thermal1 {
  1708. polling-delay-passive = <250>;
  1709. polling-delay = <1000>;
  1710. thermal-sensors = <&tsc 0>;
  1711. trips {
  1712. sensor1_crit: sensor1-crit {
  1713. temperature = <120000>;
  1714. hysteresis = <1000>;
  1715. type = "critical";
  1716. };
  1717. };
  1718. };
  1719. sensor_thermal2: sensor-thermal2 {
  1720. polling-delay-passive = <250>;
  1721. polling-delay = <1000>;
  1722. thermal-sensors = <&tsc 1>;
  1723. trips {
  1724. sensor2_crit: sensor2-crit {
  1725. temperature = <120000>;
  1726. hysteresis = <1000>;
  1727. type = "critical";
  1728. };
  1729. };
  1730. };
  1731. sensor_thermal3: sensor-thermal3 {
  1732. polling-delay-passive = <250>;
  1733. polling-delay = <1000>;
  1734. thermal-sensors = <&tsc 2>;
  1735. trips {
  1736. sensor3_crit: sensor3-crit {
  1737. temperature = <120000>;
  1738. hysteresis = <1000>;
  1739. type = "critical";
  1740. };
  1741. };
  1742. };
  1743. };
  1744. /* External USB clocks - can be overridden by the board */
  1745. usb3s0_clk: usb3s0 {
  1746. compatible = "fixed-clock";
  1747. #clock-cells = <0>;
  1748. clock-frequency = <0>;
  1749. };
  1750. usb_extal_clk: usb_extal {
  1751. compatible = "fixed-clock";
  1752. #clock-cells = <0>;
  1753. clock-frequency = <0>;
  1754. };
  1755. };