rk3399-evb.dts 4.5 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
  4. */
  5. /dts-v1/;
  6. #include <dt-bindings/pwm/pwm.h>
  7. #include "rk3399.dtsi"
  8. / {
  9. model = "Rockchip RK3399 Evaluation Board";
  10. compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
  11. "google,rk3399evb-rev2";
  12. backlight: backlight {
  13. compatible = "pwm-backlight";
  14. brightness-levels = <
  15. 0 1 2 3 4 5 6 7
  16. 8 9 10 11 12 13 14 15
  17. 16 17 18 19 20 21 22 23
  18. 24 25 26 27 28 29 30 31
  19. 32 33 34 35 36 37 38 39
  20. 40 41 42 43 44 45 46 47
  21. 48 49 50 51 52 53 54 55
  22. 56 57 58 59 60 61 62 63
  23. 64 65 66 67 68 69 70 71
  24. 72 73 74 75 76 77 78 79
  25. 80 81 82 83 84 85 86 87
  26. 88 89 90 91 92 93 94 95
  27. 96 97 98 99 100 101 102 103
  28. 104 105 106 107 108 109 110 111
  29. 112 113 114 115 116 117 118 119
  30. 120 121 122 123 124 125 126 127
  31. 128 129 130 131 132 133 134 135
  32. 136 137 138 139 140 141 142 143
  33. 144 145 146 147 148 149 150 151
  34. 152 153 154 155 156 157 158 159
  35. 160 161 162 163 164 165 166 167
  36. 168 169 170 171 172 173 174 175
  37. 176 177 178 179 180 181 182 183
  38. 184 185 186 187 188 189 190 191
  39. 192 193 194 195 196 197 198 199
  40. 200 201 202 203 204 205 206 207
  41. 208 209 210 211 212 213 214 215
  42. 216 217 218 219 220 221 222 223
  43. 224 225 226 227 228 229 230 231
  44. 232 233 234 235 236 237 238 239
  45. 240 241 242 243 244 245 246 247
  46. 248 249 250 251 252 253 254 255>;
  47. default-brightness-level = <200>;
  48. enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
  49. pwms = <&pwm0 0 25000 0>;
  50. };
  51. clkin_gmac: external-gmac-clock {
  52. compatible = "fixed-clock";
  53. clock-frequency = <125000000>;
  54. clock-output-names = "clkin_gmac";
  55. #clock-cells = <0>;
  56. };
  57. vdd_center: vdd-center {
  58. compatible = "pwm-regulator";
  59. pwms = <&pwm3 0 25000 0>;
  60. regulator-name = "vdd_center";
  61. regulator-min-microvolt = <800000>;
  62. regulator-max-microvolt = <1400000>;
  63. regulator-always-on;
  64. regulator-boot-on;
  65. status = "okay";
  66. };
  67. vcc3v3_sys: vcc3v3-sys {
  68. compatible = "regulator-fixed";
  69. regulator-name = "vcc3v3_sys";
  70. regulator-always-on;
  71. regulator-boot-on;
  72. regulator-min-microvolt = <3300000>;
  73. regulator-max-microvolt = <3300000>;
  74. };
  75. vcc5v0_sys: vcc5v0-sys {
  76. compatible = "regulator-fixed";
  77. regulator-name = "vcc5v0_sys";
  78. regulator-always-on;
  79. regulator-boot-on;
  80. regulator-min-microvolt = <5000000>;
  81. regulator-max-microvolt = <5000000>;
  82. };
  83. vcc5v0_host: vcc5v0-host-regulator {
  84. compatible = "regulator-fixed";
  85. enable-active-high;
  86. gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
  87. pinctrl-names = "default";
  88. pinctrl-0 = <&vcc5v0_host_en>;
  89. regulator-name = "vcc5v0_host";
  90. vin-supply = <&vcc5v0_sys>;
  91. };
  92. vcc_phy: vcc-phy-regulator {
  93. compatible = "regulator-fixed";
  94. regulator-name = "vcc_phy";
  95. regulator-always-on;
  96. regulator-boot-on;
  97. };
  98. vcc_phy: vcc-phy-regulator {
  99. compatible = "regulator-fixed";
  100. regulator-name = "vcc_phy";
  101. regulator-always-on;
  102. regulator-boot-on;
  103. };
  104. };
  105. &emmc_phy {
  106. status = "okay";
  107. };
  108. &gmac {
  109. assigned-clocks = <&cru SCLK_RMII_SRC>;
  110. assigned-clock-parents = <&clkin_gmac>;
  111. clock_in_out = "input";
  112. phy-supply = <&vcc_phy>;
  113. phy-mode = "rgmii";
  114. pinctrl-names = "default";
  115. pinctrl-0 = <&rgmii_pins>;
  116. snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
  117. snps,reset-active-low;
  118. snps,reset-delays-us = <0 10000 50000>;
  119. tx_delay = <0x28>;
  120. rx_delay = <0x11>;
  121. status = "okay";
  122. };
  123. &pwm0 {
  124. status = "okay";
  125. };
  126. &pwm2 {
  127. status = "okay";
  128. };
  129. &pwm3 {
  130. status = "okay";
  131. };
  132. &sdhci {
  133. bus-width = <8>;
  134. mmc-hs400-1_8v;
  135. mmc-hs400-enhanced-strobe;
  136. non-removable;
  137. status = "okay";
  138. };
  139. &pcie_phy {
  140. status = "disabled";
  141. };
  142. &pcie0 {
  143. ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
  144. num-lanes = <4>;
  145. pinctrl-names = "default";
  146. pinctrl-0 = <&pcie_clkreqn_cpm>;
  147. status = "disabled";
  148. };
  149. &u2phy0 {
  150. status = "okay";
  151. };
  152. &u2phy0_host {
  153. phy-supply = <&vcc5v0_host>;
  154. status = "okay";
  155. };
  156. &u2phy1 {
  157. status = "okay";
  158. };
  159. &u2phy1_host {
  160. phy-supply = <&vcc5v0_host>;
  161. status = "okay";
  162. };
  163. &uart2 {
  164. status = "okay";
  165. };
  166. &usb_host0_ehci {
  167. status = "okay";
  168. };
  169. &usb_host0_ohci {
  170. status = "okay";
  171. };
  172. &usb_host1_ehci {
  173. status = "okay";
  174. };
  175. &usb_host1_ohci {
  176. status = "okay";
  177. };
  178. &pinctrl {
  179. pmic {
  180. pmic_int_l: pmic-int-l {
  181. rockchip,pins =
  182. <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
  183. };
  184. pmic_dvs2: pmic-dvs2 {
  185. rockchip,pins =
  186. <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
  187. };
  188. };
  189. usb2 {
  190. vcc5v0_host_en: vcc5v0-host-en {
  191. rockchip,pins =
  192. <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
  193. };
  194. };
  195. };