timer.c 2.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2009
  4. * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
  5. */
  6. #include <common.h>
  7. #include <asm/io.h>
  8. #include <asm/arch/hardware.h>
  9. #include <asm/arch/spr_gpt.h>
  10. #include <asm/arch/spr_misc.h>
  11. #define GPT_RESOLUTION (CONFIG_SPEAR_HZ_CLOCK / CONFIG_SPEAR_HZ)
  12. #define READ_TIMER() (readl(&gpt_regs_p->count) & GPT_FREE_RUNNING)
  13. static struct gpt_regs *const gpt_regs_p =
  14. (struct gpt_regs *)CONFIG_SPEAR_TIMERBASE;
  15. static struct misc_regs *const misc_regs_p =
  16. (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
  17. DECLARE_GLOBAL_DATA_PTR;
  18. #define timestamp gd->arch.tbl
  19. #define lastdec gd->arch.lastinc
  20. int timer_init(void)
  21. {
  22. u32 synth;
  23. /* Prescaler setting */
  24. #if defined(CONFIG_SPEAR3XX)
  25. writel(MISC_PRSC_CFG, &misc_regs_p->prsc2_clk_cfg);
  26. synth = MISC_GPT4SYNTH;
  27. #elif defined(CONFIG_SPEAR600)
  28. writel(MISC_PRSC_CFG, &misc_regs_p->prsc1_clk_cfg);
  29. synth = MISC_GPT3SYNTH;
  30. #else
  31. # error Incorrect config. Can only be SPEAR{600|300|310|320}
  32. #endif
  33. writel(readl(&misc_regs_p->periph_clk_cfg) | synth,
  34. &misc_regs_p->periph_clk_cfg);
  35. /* disable timers */
  36. writel(GPT_PRESCALER_1 | GPT_MODE_AUTO_RELOAD, &gpt_regs_p->control);
  37. /* load value for free running */
  38. writel(GPT_FREE_RUNNING, &gpt_regs_p->compare);
  39. /* auto reload, start timer */
  40. writel(readl(&gpt_regs_p->control) | GPT_ENABLE, &gpt_regs_p->control);
  41. /* Reset the timer */
  42. lastdec = READ_TIMER();
  43. timestamp = 0;
  44. return 0;
  45. }
  46. /*
  47. * timer without interrupts
  48. */
  49. ulong get_timer(ulong base)
  50. {
  51. return (get_timer_masked() / GPT_RESOLUTION) - base;
  52. }
  53. void __udelay(unsigned long usec)
  54. {
  55. ulong tmo;
  56. ulong start = get_timer_masked();
  57. ulong tenudelcnt = CONFIG_SPEAR_HZ_CLOCK / (1000 * 100);
  58. ulong rndoff;
  59. rndoff = (usec % 10) ? 1 : 0;
  60. /* tenudelcnt timer tick gives 10 microsecconds delay */
  61. tmo = ((usec / 10) + rndoff) * tenudelcnt;
  62. while ((ulong) (get_timer_masked() - start) < tmo)
  63. ;
  64. }
  65. ulong get_timer_masked(void)
  66. {
  67. ulong now = READ_TIMER();
  68. if (now >= lastdec) {
  69. /* normal mode */
  70. timestamp += now - lastdec;
  71. } else {
  72. /* we have an overflow ... */
  73. timestamp += now + GPT_FREE_RUNNING - lastdec;
  74. }
  75. lastdec = now;
  76. return timestamp;
  77. }
  78. void udelay_masked(unsigned long usec)
  79. {
  80. return udelay(usec);
  81. }
  82. /*
  83. * This function is derived from PowerPC code (read timebase as long long).
  84. * On ARM it just returns the timer value.
  85. */
  86. unsigned long long get_ticks(void)
  87. {
  88. return get_timer(0);
  89. }
  90. /*
  91. * This function is derived from PowerPC code (timebase clock frequency).
  92. * On ARM it returns the number of timer ticks per second.
  93. */
  94. ulong get_tbclk(void)
  95. {
  96. return CONFIG_SPEAR_HZ;
  97. }