at91sam9rl_devices.c 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2007-2008
  4. * Stelian Pop <stelian@popies.net>
  5. * Lead Tech Design <www.leadtechdesign.com>
  6. */
  7. #include <common.h>
  8. #include <asm/io.h>
  9. #include <asm/arch/at91_common.h>
  10. #include <asm/arch/clk.h>
  11. #include <asm/arch/gpio.h>
  12. /*
  13. * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
  14. * peripheral pins. Good to have if hardware is soldered optionally
  15. * or in case of SPI no slave is selected. Avoid lines to float
  16. * needlessly. Use a short local PUP define.
  17. *
  18. * Due to errata "TXD floats when CTS is inactive" pullups are always
  19. * on for TXD pins.
  20. */
  21. #ifdef CONFIG_AT91_GPIO_PULLUP
  22. # define PUP CONFIG_AT91_GPIO_PULLUP
  23. #else
  24. # define PUP 0
  25. #endif
  26. void at91_serial0_hw_init(void)
  27. {
  28. at91_set_a_periph(AT91_PIO_PORTA, 6, 1); /* TXD0 */
  29. at91_set_a_periph(AT91_PIO_PORTA, 7, PUP); /* RXD0 */
  30. at91_periph_clk_enable(ATMEL_ID_USART0);
  31. }
  32. void at91_serial1_hw_init(void)
  33. {
  34. at91_set_a_periph(AT91_PIO_PORTA, 11, 1); /* TXD1 */
  35. at91_set_a_periph(AT91_PIO_PORTA, 12, PUP); /* RXD1 */
  36. at91_periph_clk_enable(ATMEL_ID_USART1);
  37. }
  38. void at91_serial2_hw_init(void)
  39. {
  40. at91_set_a_periph(AT91_PIO_PORTA, 13, 1); /* TXD2 */
  41. at91_set_a_periph(AT91_PIO_PORTA, 14, PUP); /* RXD2 */
  42. at91_periph_clk_enable(ATMEL_ID_USART2);
  43. }
  44. void at91_seriald_hw_init(void)
  45. {
  46. at91_set_a_periph(AT91_PIO_PORTA, 21, PUP); /* DRXD */
  47. at91_set_a_periph(AT91_PIO_PORTA, 22, 1); /* DTXD */
  48. at91_periph_clk_enable(ATMEL_ID_SYS);
  49. }
  50. #ifdef CONFIG_ATMEL_SPI
  51. void at91_spi0_hw_init(unsigned long cs_mask)
  52. {
  53. at91_set_a_periph(AT91_PIO_PORTA, 25, PUP); /* SPI0_MISO */
  54. at91_set_a_periph(AT91_PIO_PORTA, 26, PUP); /* SPI0_MOSI */
  55. at91_set_a_periph(AT91_PIO_PORTA, 27, PUP); /* SPI0_SPCK */
  56. at91_periph_clk_enable(ATMEL_ID_SPI);
  57. if (cs_mask & (1 << 0)) {
  58. at91_set_a_periph(AT91_PIO_PORTA, 28, 1);
  59. }
  60. if (cs_mask & (1 << 1)) {
  61. at91_set_b_periph(AT91_PIO_PORTB, 7, 1);
  62. }
  63. if (cs_mask & (1 << 2)) {
  64. at91_set_a_periph(AT91_PIO_PORTD, 8, 1);
  65. }
  66. if (cs_mask & (1 << 3)) {
  67. at91_set_b_periph(AT91_PIO_PORTD, 9, 1);
  68. }
  69. if (cs_mask & (1 << 4)) {
  70. at91_set_pio_output(AT91_PIO_PORTA, 28, 1);
  71. }
  72. if (cs_mask & (1 << 5)) {
  73. at91_set_pio_output(AT91_PIO_PORTB, 7, 1);
  74. }
  75. if (cs_mask & (1 << 6)) {
  76. at91_set_pio_output(AT91_PIO_PORTD, 8, 1);
  77. }
  78. if (cs_mask & (1 << 7)) {
  79. at91_set_pio_output(AT91_PIO_PORTD, 9, 1);
  80. }
  81. }
  82. #endif
  83. #ifdef CONFIG_GENERIC_ATMEL_MCI
  84. void at91_mci_hw_init(void)
  85. {
  86. at91_set_a_periph(AT91_PIO_PORTA, 2, 0); /* MCI CLK */
  87. at91_set_a_periph(AT91_PIO_PORTA, 1, 0); /* MCI CDA */
  88. at91_set_a_periph(AT91_PIO_PORTA, 0, 0); /* MCI DA0 */
  89. at91_set_a_periph(AT91_PIO_PORTA, 3, 0); /* MCI DA1 */
  90. at91_set_a_periph(AT91_PIO_PORTA, 4, 0); /* MCI DA2 */
  91. at91_set_a_periph(AT91_PIO_PORTA, 5, 0); /* MCI DA3 */
  92. at91_periph_clk_enable(ATMEL_ID_MCI);
  93. }
  94. #endif