clk.h 1.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2010 Samsung Electronics
  4. * Minkyu Kang <mk7.kang@samsung.com>
  5. */
  6. #ifndef __ASM_ARM_ARCH_CLK_H_
  7. #define __ASM_ARM_ARCH_CLK_H_
  8. #define APLL 0
  9. #define MPLL 1
  10. #define EPLL 2
  11. #define HPLL 3
  12. #define VPLL 4
  13. #define BPLL 5
  14. #define RPLL 6
  15. #define SPLL 7
  16. #define CPLL 8
  17. #define DPLL 9
  18. #define IPLL 10
  19. #define MASK_PRE_RATIO(x) (0xff << ((x << 4) + 8))
  20. #define MASK_RATIO(x) (0xf << (x << 4))
  21. #define SET_PRE_RATIO(x, y) ((y & 0xff) << ((x << 4) + 8))
  22. #define SET_RATIO(x, y) ((y & 0xf) << (x << 4))
  23. enum pll_src_bit {
  24. EXYNOS_SRC_MPLL = 6,
  25. EXYNOS_SRC_EPLL,
  26. EXYNOS_SRC_VPLL,
  27. EXYNOS542X_SRC_MPLL = 3,
  28. EXYNOS542X_SRC_SPLL,
  29. EXYNOS542X_SRC_EPLL = 6,
  30. EXYNOS542X_SRC_RPLL,
  31. };
  32. unsigned long get_pll_clk(int pllreg);
  33. unsigned long get_arm_clk(void);
  34. unsigned long get_i2c_clk(void);
  35. unsigned long get_pwm_clk(void);
  36. unsigned long get_uart_clk(int dev_index);
  37. unsigned long get_mmc_clk(int dev_index);
  38. void set_mmc_clk(int dev_index, unsigned int div);
  39. unsigned long get_lcd_clk(void);
  40. void set_lcd_clk(void);
  41. void set_mipi_clk(void);
  42. int set_i2s_clk_source(unsigned int i2s_id);
  43. int set_i2s_clk_prescaler(unsigned int src_frq, unsigned int dst_frq,
  44. unsigned int i2s_id);
  45. int set_epll_clk(unsigned long rate);
  46. int set_spi_clk(int periph_id, unsigned int rate);
  47. /**
  48. * get the clk frequency of the required peripheral
  49. *
  50. * @param peripheral Peripheral id
  51. *
  52. * @return frequency of the peripheral clk
  53. */
  54. unsigned long clock_get_periph_rate(int peripheral);
  55. #endif