Sākums Izpētīt Palīdzība
Reģistrēties Pierakstīties
RD_Software
/
linux-arkmicro
2
0
Atdalīts 1
Faili Problēmas 0 Izmaiņu pieprasījumi 0 Vikivietne
Koks: 2f8627af68
Atzari Tagi
linux-arkmicro
/
u-boot
/
arch
/
arm
/
mach-exynos
/
include
/
mach
/
clock.h

clock.h 39 KB
Vēsture Neapstrādāts

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392 
  1. /* SPDX-License-Identifier: GPL-2.0+ */
    2. 

  2. /*
    3. 

  3.  * (C) Copyright 2010 Samsung Electronics
    4. 

  4.  * Minkyu Kang <mk7.kang@samsung.com>
    5. 

  5.  */
    6. 

  6. 

  7. #ifndef __ASM_ARM_ARCH_CLOCK_H_
    8. 

  8. #define __ASM_ARM_ARCH_CLOCK_H_
    9. 

  9. 

  10. #ifndef __ASSEMBLY__
    11. 

  11. struct exynos4_clock {
    12. 

  12. 	unsigned char	res1[0x4200];
    13. 

  13. 	unsigned int	src_leftbus;
    14. 

  14. 	unsigned char	res2[0x1fc];
    15. 

  15. 	unsigned int	mux_stat_leftbus;
    16. 

  16. 	unsigned char	res4[0xfc];
    17. 

  17. 	unsigned int	div_leftbus;
    18. 

  18. 	unsigned char	res5[0xfc];
    19. 

  19. 	unsigned int	div_stat_leftbus;
    20. 

  20. 	unsigned char	res6[0x1fc];
    21. 

  21. 	unsigned int	gate_ip_leftbus;
    22. 

  22. 	unsigned char	res7[0x1fc];
    23. 

  23. 	unsigned int	clkout_leftbus;
    24. 

  24. 	unsigned int	clkout_leftbus_div_stat;
    25. 

  25. 	unsigned char	res8[0x37f8];
    26. 

  26. 	unsigned int	src_rightbus;
    27. 

  27. 	unsigned char	res9[0x1fc];
    28. 

  28. 	unsigned int	mux_stat_rightbus;
    29. 

  29. 	unsigned char	res10[0xfc];
    30. 

  30. 	unsigned int	div_rightbus;
    31. 

  31. 	unsigned char	res11[0xfc];
    32. 

  32. 	unsigned int	div_stat_rightbus;
    33. 

  33. 	unsigned char	res12[0x1fc];
    34. 

  34. 	unsigned int	gate_ip_rightbus;
    35. 

  35. 	unsigned char	res13[0x1fc];
    36. 

  36. 	unsigned int	clkout_rightbus;
    37. 

  37. 	unsigned int	clkout_rightbus_div_stat;
    38. 

  38. 	unsigned char	res14[0x3608];
    39. 

  39. 	unsigned int	epll_lock;
    40. 

  40. 	unsigned char	res15[0xc];
    41. 

  41. 	unsigned int	vpll_lock;
    42. 

  42. 	unsigned char	res16[0xec];
    43. 

  43. 	unsigned int	epll_con0;
    44. 

  44. 	unsigned int	epll_con1;
    45. 

  45. 	unsigned char	res17[0x8];
    46. 

  46. 	unsigned int	vpll_con0;
    47. 

  47. 	unsigned int	vpll_con1;
    48. 

  48. 	unsigned char	res18[0xe8];
    49. 

  49. 	unsigned int	src_top0;
    50. 

  50. 	unsigned int	src_top1;
    51. 

  51. 	unsigned char	res19[0x8];
    52. 

  52. 	unsigned int	src_cam;
    53. 

  53. 	unsigned int	src_tv;
    54. 

  54. 	unsigned int	src_mfc;
    55. 

  55. 	unsigned int	src_g3d;
    56. 

  56. 	unsigned int	src_image;
    57. 

  57. 	unsigned int	src_lcd0;
    58. 

  58. 	unsigned int	src_lcd1;
    59. 

  59. 	unsigned int	src_maudio;
    60. 

  60. 	unsigned int	src_fsys;
    61. 

  61. 	unsigned char	res20[0xc];
    62. 

  62. 	unsigned int	src_peril0;
    63. 

  63. 	unsigned int	src_peril1;
    64. 

  64. 	unsigned char	res21[0xb8];
    65. 

  65. 	unsigned int	src_mask_top;
    66. 

  66. 	unsigned char	res22[0xc];
    67. 

  67. 	unsigned int	src_mask_cam;
    68. 

  68. 	unsigned int	src_mask_tv;
    69. 

  69. 	unsigned char	res23[0xc];
    70. 

  70. 	unsigned int	src_mask_lcd0;
    71. 

  71. 	unsigned int	src_mask_lcd1;
    72. 

  72. 	unsigned int	src_mask_maudio;
    73. 

  73. 	unsigned int	src_mask_fsys;
    74. 

  74. 	unsigned char	res24[0xc];
    75. 

  75. 	unsigned int	src_mask_peril0;
    76. 

  76. 	unsigned int	src_mask_peril1;
    77. 

  77. 	unsigned char	res25[0xb8];
    78. 

  78. 	unsigned int	mux_stat_top;
    79. 

  79. 	unsigned char	res26[0x14];
    80. 

  80. 	unsigned int	mux_stat_mfc;
    81. 

  81. 	unsigned int	mux_stat_g3d;
    82. 

  82. 	unsigned int	mux_stat_image;
    83. 

  83. 	unsigned char	res27[0xdc];
    84. 

  84. 	unsigned int	div_top;
    85. 

  85. 	unsigned char	res28[0xc];
    86. 

  86. 	unsigned int	div_cam;
    87. 

  87. 	unsigned int	div_tv;
    88. 

  88. 	unsigned int	div_mfc;
    89. 

  89. 	unsigned int	div_g3d;
    90. 

  90. 	unsigned int	div_image;
    91. 

  91. 	unsigned int	div_lcd0;
    92. 

  92. 	unsigned int	div_lcd1;
    93. 

  93. 	unsigned int	div_maudio;
    94. 

  94. 	unsigned int	div_fsys0;
    95. 

  95. 	unsigned int	div_fsys1;
    96. 

  96. 	unsigned int	div_fsys2;
    97. 

  97. 	unsigned int	div_fsys3;
    98. 

  98. 	unsigned int	div_peril0;
    99. 

  99. 	unsigned int	div_peril1;
    100. 

  100. 	unsigned int	div_peril2;
    101. 

  101. 	unsigned int	div_peril3;
    102. 

  102. 	unsigned int	div_peril4;
    103. 

  103. 	unsigned int	div_peril5;
    104. 

  104. 	unsigned char	res29[0x18];
    105. 

  105. 	unsigned int	div2_ratio;
    106. 

  106. 	unsigned char	res30[0x8c];
    107. 

  107. 	unsigned int	div_stat_top;
    108. 

  108. 	unsigned char	res31[0xc];
    109. 

  109. 	unsigned int	div_stat_cam;
    110. 

  110. 	unsigned int	div_stat_tv;
    111. 

  111. 	unsigned int	div_stat_mfc;
    112. 

  112. 	unsigned int	div_stat_g3d;
    113. 

  113. 	unsigned int	div_stat_image;
    114. 

  114. 	unsigned int	div_stat_lcd0;
    115. 

  115. 	unsigned int	div_stat_lcd1;
    116. 

  116. 	unsigned int	div_stat_maudio;
    117. 

  117. 	unsigned int	div_stat_fsys0;
    118. 

  118. 	unsigned int	div_stat_fsys1;
    119. 

  119. 	unsigned int	div_stat_fsys2;
    120. 

  120. 	unsigned int	div_stat_fsys3;
    121. 

  121. 	unsigned int	div_stat_peril0;
    122. 

  122. 	unsigned int	div_stat_peril1;
    123. 

  123. 	unsigned int	div_stat_peril2;
    124. 

  124. 	unsigned int	div_stat_peril3;
    125. 

  125. 	unsigned int	div_stat_peril4;
    126. 

  126. 	unsigned int	div_stat_peril5;
    127. 

  127. 	unsigned char	res32[0x18];
    128. 

  128. 	unsigned int	div2_stat;
    129. 

  129. 	unsigned char	res33[0x29c];
    130. 

  130. 	unsigned int	gate_ip_cam;
    131. 

  131. 	unsigned int	gate_ip_tv;
    132. 

  132. 	unsigned int	gate_ip_mfc;
    133. 

  133. 	unsigned int	gate_ip_g3d;
    134. 

  134. 	unsigned int	gate_ip_image;
    135. 

  135. 	unsigned int	gate_ip_lcd0;
    136. 

  136. 	unsigned int	gate_ip_lcd1;
    137. 

  137. 	unsigned char	res34[0x4];
    138. 

  138. 	unsigned int	gate_ip_fsys;
    139. 

  139. 	unsigned char	res35[0x8];
    140. 

  140. 	unsigned int	gate_ip_gps;
    141. 

  141. 	unsigned int	gate_ip_peril;
    142. 

  142. 	unsigned char	res36[0xc];
    143. 

  143. 	unsigned int	gate_ip_perir;
    144. 

  144. 	unsigned char	res37[0xc];
    145. 

  145. 	unsigned int	gate_block;
    146. 

  146. 	unsigned char	res38[0x8c];
    147. 

  147. 	unsigned int	clkout_cmu_top;
    148. 

  148. 	unsigned int	clkout_cmu_top_div_stat;
    149. 

  149. 	unsigned char	res39[0x37f8];
    150. 

  150. 	unsigned int	src_dmc;
    151. 

  151. 	unsigned char	res40[0xfc];
    152. 

  152. 	unsigned int	src_mask_dmc;
    153. 

  153. 	unsigned char	res41[0xfc];
    154. 

  154. 	unsigned int	mux_stat_dmc;
    155. 

  155. 	unsigned char	res42[0xfc];
    156. 

  156. 	unsigned int	div_dmc0;
    157. 

  157. 	unsigned int	div_dmc1;
    158. 

  158. 	unsigned char	res43[0xf8];
    159. 

  159. 	unsigned int	div_stat_dmc0;
    160. 

  160. 	unsigned int	div_stat_dmc1;
    161. 

  161. 	unsigned char	res44[0x2f8];
    162. 

  162. 	unsigned int	gate_ip_dmc;
    163. 

  163. 	unsigned char	res45[0xfc];
    164. 

  164. 	unsigned int	clkout_cmu_dmc;
    165. 

  165. 	unsigned int	clkout_cmu_dmc_div_stat;
    166. 

  166. 	unsigned char	res46[0x5f8];
    167. 

  167. 	unsigned int	dcgidx_map0;
    168. 

  168. 	unsigned int	dcgidx_map1;
    169. 

  169. 	unsigned int	dcgidx_map2;
    170. 

  170. 	unsigned char	res47[0x14];
    171. 

  171. 	unsigned int	dcgperf_map0;
    172. 

  172. 	unsigned int	dcgperf_map1;
    173. 

  173. 	unsigned char	res48[0x18];
    174. 

  174. 	unsigned int	dvcidx_map;
    175. 

  175. 	unsigned char	res49[0x1c];
    176. 

  176. 	unsigned int	freq_cpu;
    177. 

  177. 	unsigned int	freq_dpm;
    178. 

  178. 	unsigned char	res50[0x18];
    179. 

  179. 	unsigned int	dvsemclk_en;
    180. 

  180. 	unsigned int	maxperf;
    181. 

  181. 	unsigned char	res51[0x2f78];
    182. 

  182. 	unsigned int	apll_lock;
    183. 

  183. 	unsigned char	res52[0x4];
    184. 

  184. 	unsigned int	mpll_lock;
    185. 

  185. 	unsigned char	res53[0xf4];
    186. 

  186. 	unsigned int	apll_con0;
    187. 

  187. 	unsigned int	apll_con1;
    188. 

  188. 	unsigned int	mpll_con0;
    189. 

  189. 	unsigned int	mpll_con1;
    190. 

  190. 	unsigned char	res54[0xf0];
    191. 

  191. 	unsigned int	src_cpu;
    192. 

  192. 	unsigned char	res55[0x1fc];
    193. 

  193. 	unsigned int	mux_stat_cpu;
    194. 

  194. 	unsigned char	res56[0xfc];
    195. 

  195. 	unsigned int	div_cpu0;
    196. 

  196. 	unsigned int	div_cpu1;
    197. 

  197. 	unsigned char	res57[0xf8];
    198. 

  198. 	unsigned int	div_stat_cpu0;
    199. 

  199. 	unsigned int	div_stat_cpu1;
    200. 

  200. 	unsigned char	res58[0x3f8];
    201. 

  201. 	unsigned int	clkout_cmu_cpu;
    202. 

  202. 	unsigned int	clkout_cmu_cpu_div_stat;
    203. 

  203. 	unsigned char	res59[0x5f8];
    204. 

  204. 	unsigned int	armclk_stopctrl;
    205. 

  205. 	unsigned int	atclk_stopctrl;
    206. 

  206. 	unsigned char	res60[0x8];
    207. 

  207. 	unsigned int	parityfail_status;
    208. 

  208. 	unsigned int	parityfail_clear;
    209. 

  209. 	unsigned char	res61[0xe8];
    210. 

  210. 	unsigned int	apll_con0_l8;
    211. 

  211. 	unsigned int	apll_con0_l7;
    212. 

  212. 	unsigned int	apll_con0_l6;
    213. 

  213. 	unsigned int	apll_con0_l5;
    214. 

  214. 	unsigned int	apll_con0_l4;
    215. 

  215. 	unsigned int	apll_con0_l3;
    216. 

  216. 	unsigned int	apll_con0_l2;
    217. 

  217. 	unsigned int	apll_con0_l1;
    218. 

  218. 	unsigned int	iem_control;
    219. 

  219. 	unsigned char	res62[0xdc];
    220. 

  220. 	unsigned int	apll_con1_l8;
    221. 

  221. 	unsigned int	apll_con1_l7;
    222. 

  222. 	unsigned int	apll_con1_l6;
    223. 

  223. 	unsigned int	apll_con1_l5;
    224. 

  224. 	unsigned int	apll_con1_l4;
    225. 

  225. 	unsigned int	apll_con1_l3;
    226. 

  226. 	unsigned int	apll_con1_l2;
    227. 

  227. 	unsigned int	apll_con1_l1;
    228. 

  228. 	unsigned char	res63[0xe0];
    229. 

  229. 	unsigned int	div_iem_l8;
    230. 

  230. 	unsigned int	div_iem_l7;
    231. 

  231. 	unsigned int	div_iem_l6;
    232. 

  232. 	unsigned int	div_iem_l5;
    233. 

  233. 	unsigned int	div_iem_l4;
    234. 

  234. 	unsigned int	div_iem_l3;
    235. 

  235. 	unsigned int	div_iem_l2;
    236. 

  236. 	unsigned int	div_iem_l1;
    237. 

  237. };
    238. 

  238. 

  239. struct exynos4x12_clock {
    240. 

  240. 	unsigned char	res1[0x4200];
    241. 

  241. 	unsigned int	src_leftbus;
    242. 

  242. 	unsigned char	res2[0x1fc];
    243. 

  243. 	unsigned int	mux_stat_leftbus;
    244. 

  244. 	unsigned char	res3[0xfc];
    245. 

  245. 	unsigned int	div_leftbus;
    246. 

  246. 	unsigned char	res4[0xfc];
    247. 

  247. 	unsigned int	div_stat_leftbus;
    248. 

  248. 	unsigned char	res5[0x1fc];
    249. 

  249. 	unsigned int	gate_ip_leftbus;
    250. 

  250. 	unsigned char	res6[0x12c];
    251. 

  251. 	unsigned int	gate_ip_image;
    252. 

  252. 	unsigned char	res7[0xcc];
    253. 

  253. 	unsigned int	clkout_leftbus;
    254. 

  254. 	unsigned int	clkout_leftbus_div_stat;
    255. 

  255. 	unsigned char	res8[0x37f8];
    256. 

  256. 	unsigned int	src_rightbus;
    257. 

  257. 	unsigned char	res9[0x1fc];
    258. 

  258. 	unsigned int	mux_stat_rightbus;
    259. 

  259. 	unsigned char	res10[0xfc];
    260. 

  260. 	unsigned int	div_rightbus;
    261. 

  261. 	unsigned char	res11[0xfc];
    262. 

  262. 	unsigned int	div_stat_rightbus;
    263. 

  263. 	unsigned char	res12[0x1fc];
    264. 

  264. 	unsigned int	gate_ip_rightbus;
    265. 

  265. 	unsigned char	res13[0x15c];
    266. 

  266. 	unsigned int	gate_ip_perir;
    267. 

  267. 	unsigned char	res14[0x9c];
    268. 

  268. 	unsigned int	clkout_rightbus;
    269. 

  269. 	unsigned int	clkout_rightbus_div_stat;
    270. 

  270. 	unsigned char	res15[0x3608];
    271. 

  271. 	unsigned int	epll_lock;
    272. 

  272. 	unsigned char	res16[0xc];
    273. 

  273. 	unsigned int	vpll_lock;
    274. 

  274. 	unsigned char	res17[0xec];
    275. 

  275. 	unsigned int	epll_con0;
    276. 

  276. 	unsigned int	epll_con1;
    277. 

  277. 	unsigned int	epll_con2;
    278. 

  278. 	unsigned char	res18[0x4];
    279. 

  279. 	unsigned int	vpll_con0;
    280. 

  280. 	unsigned int	vpll_con1;
    281. 

  281. 	unsigned int	vpll_con2;
    282. 

  282. 	unsigned char	res19[0xe4];
    283. 

  283. 	unsigned int	src_top0;
    284. 

  284. 	unsigned int	src_top1;
    285. 

  285. 	unsigned char	res20[0x8];
    286. 

  286. 	unsigned int	src_cam;
    287. 

  287. 	unsigned int	src_tv;
    288. 

  288. 	unsigned int	src_mfc;
    289. 

  289. 	unsigned int	src_g3d;
    290. 

  290. 	unsigned char	res21[0x4];
    291. 

  291. 	unsigned int	src_lcd;
    292. 

  292. 	unsigned int	src_isp;
    293. 

  293. 	unsigned int	src_maudio;
    294. 

  294. 	unsigned int	src_fsys;
    295. 

  295. 	unsigned char	res22[0xc];
    296. 

  296. 	unsigned int	src_peril0;
    297. 

  297. 	unsigned int	src_peril1;
    298. 

  298. 	unsigned int	src_cam1;
    299. 

  299. 	unsigned char	res23[0xb4];
    300. 

  300. 	unsigned int	src_mask_top;
    301. 

  301. 	unsigned char	res24[0xc];
    302. 

  302. 	unsigned int	src_mask_cam;
    303. 

  303. 	unsigned int	src_mask_tv;
    304. 

  304. 	unsigned char	res25[0xc];
    305. 

  305. 	unsigned int	src_mask_lcd;
    306. 

  306. 	unsigned int	src_mask_isp;
    307. 

  307. 	unsigned int	src_mask_maudio;
    308. 

  308. 	unsigned int	src_mask_fsys;
    309. 

  309. 	unsigned char	res26[0xc];
    310. 

  310. 	unsigned int	src_mask_peril0;
    311. 

  311. 	unsigned int	src_mask_peril1;
    312. 

  312. 	unsigned char	res27[0xb8];
    313. 

  313. 	unsigned int	mux_stat_top0;
    314. 

  314. 	unsigned int	mux_stat_top1;
    315. 

  315. 	unsigned char	res28[0x10];
    316. 

  316. 	unsigned int	mux_stat_mfc;
    317. 

  317. 	unsigned int	mux_stat_g3d;
    318. 

  318. 	unsigned char	res29[0x28];
    319. 

  319. 	unsigned int	mux_stat_cam1;
    320. 

  320. 	unsigned char	res30[0xb4];
    321. 

  321. 	unsigned int	div_top;
    322. 

  322. 	unsigned char	res31[0xc];
    323. 

  323. 	unsigned int	div_cam;
    324. 

  324. 	unsigned int	div_tv;
    325. 

  325. 	unsigned int	div_mfc;
    326. 

  326. 	unsigned int	div_g3d;
    327. 

  327. 	unsigned char	res32[0x4];
    328. 

  328. 	unsigned int	div_lcd;
    329. 

  329. 	unsigned int	div_isp;
    330. 

  330. 	unsigned int	div_maudio;
    331. 

  331. 	unsigned int	div_fsys0;
    332. 

  332. 	unsigned int	div_fsys1;
    333. 

  333. 	unsigned int	div_fsys2;
    334. 

  334. 	unsigned int	div_fsys3;
    335. 

  335. 	unsigned int	div_peril0;
    336. 

  336. 	unsigned int	div_peril1;
    337. 

  337. 	unsigned int	div_peril2;
    338. 

  338. 	unsigned int	div_peril3;
    339. 

  339. 	unsigned int	div_peril4;
    340. 

  340. 	unsigned int	div_peril5;
    341. 

  341. 	unsigned int	div_cam1;
    342. 

  342. 	unsigned char	res33[0x14];
    343. 

  343. 	unsigned int	div2_ratio;
    344. 

  344. 	unsigned char	res34[0x8c];
    345. 

  345. 	unsigned int	div_stat_top;
    346. 

  346. 	unsigned char	res35[0xc];
    347. 

  347. 	unsigned int	div_stat_cam;
    348. 

  348. 	unsigned int	div_stat_tv;
    349. 

  349. 	unsigned int	div_stat_mfc;
    350. 

  350. 	unsigned int	div_stat_g3d;
    351. 

  351. 	unsigned char	res36[0x4];
    352. 

  352. 	unsigned int	div_stat_lcd;
    353. 

  353. 	unsigned int	div_stat_isp;
    354. 

  354. 	unsigned int	div_stat_maudio;
    355. 

  355. 	unsigned int	div_stat_fsys0;
    356. 

  356. 	unsigned int	div_stat_fsys1;
    357. 

  357. 	unsigned int	div_stat_fsys2;
    358. 

  358. 	unsigned int	div_stat_fsys3;
    359. 

  359. 	unsigned int	div_stat_peril0;
    360. 

  360. 	unsigned int	div_stat_peril1;
    361. 

  361. 	unsigned int	div_stat_peril2;
    362. 

  362. 	unsigned int	div_stat_peril3;
    363. 

  363. 	unsigned int	div_stat_peril4;
    364. 

  364. 	unsigned int	div_stat_peril5;
    365. 

  365. 	unsigned int	div_stat_cam1;
    366. 

  366. 	unsigned char	res37[0x14];
    367. 

  367. 	unsigned int	div2_stat;
    368. 

  368. 	unsigned char	res38[0x29c];
    369. 

  369. 	unsigned int	gate_ip_cam;
    370. 

  370. 	unsigned int	gate_ip_tv;
    371. 

  371. 	unsigned int	gate_ip_mfc;
    372. 

  372. 	unsigned int	gate_ip_g3d;
    373. 

  373. 	unsigned char	res39[0x4];
    374. 

  374. 	unsigned int	gate_ip_lcd;
    375. 

  375. 	unsigned int	gate_ip_isp;
    376. 

  376. 	unsigned char	res40[0x4];
    377. 

  377. 	unsigned int	gate_ip_fsys;
    378. 

  378. 	unsigned char	res41[0x8];
    379. 

  379. 	unsigned int	gate_ip_gps;
    380. 

  380. 	unsigned int	gate_ip_peril;
    381. 

  381. 	unsigned char	res42[0xc];
    382. 

  382. 	unsigned char	res43[0x4];
    383. 

  383. 	unsigned char	res44[0xc];
    384. 

  384. 	unsigned int	gate_block;
    385. 

  385. 	unsigned char	res45[0x8c];
    386. 

  386. 	unsigned int	clkout_cmu_top;
    387. 

  387. 	unsigned int	clkout_cmu_top_div_stat;
    388. 

  388. 	unsigned char	res46[0x3600];
    389. 

  389. 	unsigned int	mpll_lock;
    390. 

  390. 	unsigned char	res47[0xfc];
    391. 

  391. 	unsigned int	mpll_con0;
    392. 

  392. 	unsigned int	mpll_con1;
    393. 

  393. 	unsigned char	res48[0xf0];
    394. 

  394. 	unsigned int	src_dmc;
    395. 

  395. 	unsigned char	res49[0xfc];
    396. 

  396. 	unsigned int	src_mask_dmc;
    397. 

  397. 	unsigned char	res50[0xfc];
    398. 

  398. 	unsigned int	mux_stat_dmc;
    399. 

  399. 	unsigned char	res51[0xfc];
    400. 

  400. 	unsigned int	div_dmc0;
    401. 

  401. 	unsigned int	div_dmc1;
    402. 

  402. 	unsigned char	res52[0xf8];
    403. 

  403. 	unsigned int	div_stat_dmc0;
    404. 

  404. 	unsigned int	div_stat_dmc1;
    405. 

  405. 	unsigned char	res53[0xf8];
    406. 

  406. 	unsigned int	gate_bus_dmc0;
    407. 

  407. 	unsigned int	gate_bus_dmc1;
    408. 

  408. 	unsigned char	res54[0x1f8];
    409. 

  409. 	unsigned int	gate_ip_dmc0;
    410. 

  410. 	unsigned int	gate_ip_dmc1;
    411. 

  411. 	unsigned char	res55[0xf8];
    412. 

  412. 	unsigned int	clkout_cmu_dmc;
    413. 

  413. 	unsigned int	clkout_cmu_dmc_div_stat;
    414. 

  414. 	unsigned char	res56[0x5f8];
    415. 

  415. 	unsigned int	dcgidx_map0;
    416. 

  416. 	unsigned int	dcgidx_map1;
    417. 

  417. 	unsigned int	dcgidx_map2;
    418. 

  418. 	unsigned char	res57[0x14];
    419. 

  419. 	unsigned int	dcgperf_map0;
    420. 

  420. 	unsigned int	dcgperf_map1;
    421. 

  421. 	unsigned char	res58[0x18];
    422. 

  422. 	unsigned int	dvcidx_map;
    423. 

  423. 	unsigned char	res59[0x1c];
    424. 

  424. 	unsigned int	freq_cpu;
    425. 

  425. 	unsigned int	freq_dpm;
    426. 

  426. 	unsigned char	res60[0x18];
    427. 

  427. 	unsigned int	dvsemclk_en;
    428. 

  428. 	unsigned int	maxperf;
    429. 

  429. 	unsigned char	res61[0x8];
    430. 

  430. 	unsigned int	dmc_freq_ctrl;
    431. 

  431. 	unsigned int	dmc_pause_ctrl;
    432. 

  432. 	unsigned int	dddrphy_lock_ctrl;
    433. 

  433. 	unsigned int	c2c_state;
    434. 

  434. 	unsigned char	res62[0x2f60];
    435. 

  435. 	unsigned int	apll_lock;
    436. 

  436. 	unsigned char	res63[0x8];
    437. 

  437. 	unsigned char	res64[0xf4];
    438. 

  438. 	unsigned int	apll_con0;
    439. 

  439. 	unsigned int	apll_con1;
    440. 

  440. 	unsigned char	res65[0xf8];
    441. 

  441. 	unsigned int	src_cpu;
    442. 

  442. 	unsigned char	res66[0x1fc];
    443. 

  443. 	unsigned int	mux_stat_cpu;
    444. 

  444. 	unsigned char	res67[0xfc];
    445. 

  445. 	unsigned int	div_cpu0;
    446. 

  446. 	unsigned int	div_cpu1;
    447. 

  447. 	unsigned char	res68[0xf8];
    448. 

  448. 	unsigned int	div_stat_cpu0;
    449. 

  449. 	unsigned int	div_stat_cpu1;
    450. 

  450. 	unsigned char	res69[0x2f8];
    451. 

  451. 	unsigned int	clk_gate_ip_cpu;
    452. 

  452. 	unsigned char	res70[0xfc];
    453. 

  453. 	unsigned int	clkout_cmu_cpu;
    454. 

  454. 	unsigned int	clkout_cmu_cpu_div_stat;
    455. 

  455. 	unsigned char	res71[0x5f8];
    456. 

  456. 	unsigned int	armclk_stopctrl;
    457. 

  457. 	unsigned int	atclk_stopctrl;
    458. 

  458. 	unsigned char	res72[0x10];
    459. 

  459. 	unsigned char	res73[0x8];
    460. 

  460. 	unsigned int	pwr_ctrl;
    461. 

  461. 	unsigned int	pwr_ctrl2;
    462. 

  462. 	unsigned char	res74[0xd8];
    463. 

  463. 	unsigned int	apll_con0_l8;
    464. 

  464. 	unsigned int	apll_con0_l7;
    465. 

  465. 	unsigned int	apll_con0_l6;
    466. 

  466. 	unsigned int	apll_con0_l5;
    467. 

  467. 	unsigned int	apll_con0_l4;
    468. 

  468. 	unsigned int	apll_con0_l3;
    469. 

  469. 	unsigned int	apll_con0_l2;
    470. 

  470. 	unsigned int	apll_con0_l1;
    471. 

  471. 	unsigned int	iem_control;
    472. 

  472. 	unsigned char	res75[0xdc];
    473. 

  473. 	unsigned int	apll_con1_l8;
    474. 

  474. 	unsigned int	apll_con1_l7;
    475. 

  475. 	unsigned int	apll_con1_l6;
    476. 

  476. 	unsigned int	apll_con1_l5;
    477. 

  477. 	unsigned int	apll_con1_l4;
    478. 

  478. 	unsigned int	apll_con1_l3;
    479. 

  479. 	unsigned int	apll_con1_l2;
    480. 

  480. 	unsigned int	apll_con1_l1;
    481. 

  481. 	unsigned char	res76[0xe0];
    482. 

  482. 	unsigned int	div_iem_l8;
    483. 

  483. 	unsigned int	div_iem_l7;
    484. 

  484. 	unsigned int	div_iem_l6;
    485. 

  485. 	unsigned int	div_iem_l5;
    486. 

  486. 	unsigned int	div_iem_l4;
    487. 

  487. 	unsigned int	div_iem_l3;
    488. 

  488. 	unsigned int	div_iem_l2;
    489. 

  489. 	unsigned int	div_iem_l1;
    490. 

  490. 	unsigned char	res77[0xe0];
    491. 

  491. 	unsigned int	l2_status;
    492. 

  492. 	unsigned char	res78[0xc];
    493. 

  493. 	unsigned int	cpu_status;
    494. 

  494. 	unsigned char	res79[0xc];
    495. 

  495. 	unsigned int	ptm_status;
    496. 

  496. 	unsigned char	res80[0x2edc];
    497. 

  497. 	unsigned int	div_isp0;
    498. 

  498. 	unsigned int	div_isp1;
    499. 

  499. 	unsigned char	res81[0xf8];
    500. 

  500. 	unsigned int	div_stat_isp0;
    501. 

  501. 	unsigned int	div_stat_isp1;
    502. 

  502. 	unsigned char	res82[0x3f8];
    503. 

  503. 	unsigned int	gate_ip_isp0;
    504. 

  504. 	unsigned int	gate_ip_isp1;
    505. 

  505. 	unsigned char	res83[0x1f8];
    506. 

  506. 	unsigned int	clkout_cmu_isp;
    507. 

  507. 	unsigned int	clkout_cmu_ispd_div_stat;
    508. 

  508. 	unsigned char	res84[0xf8];
    509. 

  509. 	unsigned int	cmu_isp_spar0;
    510. 

  510. 	unsigned int	cmu_isp_spar1;
    511. 

  511. 	unsigned int	cmu_isp_spar2;
    512. 

  512. 	unsigned int	cmu_isp_spar3;
    513. 

  513. };
    514. 

  514. 

  515. struct exynos5_clock {
    516. 

  516. 	unsigned int	apll_lock;
    517. 

  517. 	unsigned char	res1[0xfc];
    518. 

  518. 	unsigned int	apll_con0;
    519. 

  519. 	unsigned int	apll_con1;
    520. 

  520. 	unsigned char	res2[0xf8];
    521. 

  521. 	unsigned int	src_cpu;
    522. 

  522. 	unsigned char	res3[0x1fc];
    523. 

  523. 	unsigned int	mux_stat_cpu;
    524. 

  524. 	unsigned char	res4[0xfc];
    525. 

  525. 	unsigned int	div_cpu0;
    526. 

  526. 	unsigned int	div_cpu1;
    527. 

  527. 	unsigned char	res5[0xf8];
    528. 

  528. 	unsigned int	div_stat_cpu0;
    529. 

  529. 	unsigned int	div_stat_cpu1;
    530. 

  530. 	unsigned char	res6[0x1f8];
    531. 

  531. 	unsigned int	gate_sclk_cpu;
    532. 

  532. 	unsigned char	res7[0x1fc];
    533. 

  533. 	unsigned int	clkout_cmu_cpu;
    534. 

  534. 	unsigned int	clkout_cmu_cpu_div_stat;
    535. 

  535. 	unsigned char	res8[0x5f8];
    536. 

  536. 	unsigned int	armclk_stopctrl;
    537. 

  537. 	unsigned char	res9[0x0c];
    538. 

  538. 	unsigned int	parityfail_status;
    539. 

  539. 	unsigned int	parityfail_clear;
    540. 

  540. 	unsigned char	res10[0x8];
    541. 

  541. 	unsigned int	pwr_ctrl;
    542. 

  542. 	unsigned int	pwr_ctr2;
    543. 

  543. 	unsigned char	res11[0xd8];
    544. 

  544. 	unsigned int	apll_con0_l8;
    545. 

  545. 	unsigned int	apll_con0_l7;
    546. 

  546. 	unsigned int	apll_con0_l6;
    547. 

  547. 	unsigned int	apll_con0_l5;
    548. 

  548. 	unsigned int	apll_con0_l4;
    549. 

  549. 	unsigned int	apll_con0_l3;
    550. 

  550. 	unsigned int	apll_con0_l2;
    551. 

  551. 	unsigned int	apll_con0_l1;
    552. 

  552. 	unsigned int	iem_control;
    553. 

  553. 	unsigned char	res12[0xdc];
    554. 

  554. 	unsigned int	apll_con1_l8;
    555. 

  555. 	unsigned int	apll_con1_l7;
    556. 

  556. 	unsigned int	apll_con1_l6;
    557. 

  557. 	unsigned int	apll_con1_l5;
    558. 

  558. 	unsigned int	apll_con1_l4;
    559. 

  559. 	unsigned int	apll_con1_l3;
    560. 

  560. 	unsigned int	apll_con1_l2;
    561. 

  561. 	unsigned int	apll_con1_l1;
    562. 

  562. 	unsigned char	res13[0xe0];
    563. 

  563. 	unsigned int	div_iem_l8;
    564. 

  564. 	unsigned int	div_iem_l7;
    565. 

  565. 	unsigned int	div_iem_l6;
    566. 

  566. 	unsigned int	div_iem_l5;
    567. 

  567. 	unsigned int	div_iem_l4;
    568. 

  568. 	unsigned int	div_iem_l3;
    569. 

  569. 	unsigned int	div_iem_l2;
    570. 

  570. 	unsigned int	div_iem_l1;
    571. 

  571. 	unsigned char	res14[0x2ce0];
    572. 

  572. 	unsigned int	mpll_lock;
    573. 

  573. 	unsigned char	res15[0xfc];
    574. 

  574. 	unsigned int	mpll_con0;
    575. 

  575. 	unsigned int	mpll_con1;
    576. 

  576. 	unsigned char	res16[0xf8];
    577. 

  577. 	unsigned int	src_core0;
    578. 

  578. 	unsigned int	src_core1;
    579. 

  579. 	unsigned char	res17[0xf8];
    580. 

  580. 	unsigned int	src_mask_core;
    581. 

  581. 	unsigned char	res18[0x100];
    582. 

  582. 	unsigned int	mux_stat_core1;
    583. 

  583. 	unsigned char	res19[0xf8];
    584. 

  584. 	unsigned int	div_core0;
    585. 

  585. 	unsigned int	div_core1;
    586. 

  586. 	unsigned int	div_sysrgt;
    587. 

  587. 	unsigned char	res20[0xf4];
    588. 

  588. 	unsigned int	div_stat_core0;
    589. 

  589. 	unsigned int	div_stat_core1;
    590. 

  590. 	unsigned int	div_stat_sysrgt;
    591. 

  591. 	unsigned char	res21[0x2f4];
    592. 

  592. 	unsigned int	gate_ip_core;
    593. 

  593. 	unsigned int	gate_ip_sysrgt;
    594. 

  594. 	unsigned char	res22[0x8];
    595. 

  595. 	unsigned int	c2c_monitor;
    596. 

  596. 	unsigned char	res23[0xec];
    597. 

  597. 	unsigned int	clkout_cmu_core;
    598. 

  598. 	unsigned int	clkout_cmu_core_div_stat;
    599. 

  599. 	unsigned char	res24[0x5f8];
    600. 

  600. 	unsigned int	dcgidx_map0;
    601. 

  601. 	unsigned int	dcgidx_map1;
    602. 

  602. 	unsigned int	dcgidx_map2;
    603. 

  603. 	unsigned char	res25[0x14];
    604. 

  604. 	unsigned int	dcgperf_map0;
    605. 

  605. 	unsigned int	dcgperf_map1;
    606. 

  606. 	unsigned char	res26[0x18];
    607. 

  607. 	unsigned int	dvcidx_map;
    608. 

  608. 	unsigned char	res27[0x1c];
    609. 

  609. 	unsigned int	freq_cpu;
    610. 

  610. 	unsigned int	freq_dpm;
    611. 

  611. 	unsigned char	res28[0x18];
    612. 

  612. 	unsigned int	dvsemclk_en;
    613. 

  613. 	unsigned int	maxperf;
    614. 

  614. 	unsigned char	res29[0xf78];
    615. 

  615. 	unsigned int	c2c_config;
    616. 

  616. 	unsigned char	res30[0x24fc];
    617. 

  617. 	unsigned int	div_acp;
    618. 

  618. 	unsigned char	res31[0xfc];
    619. 

  619. 	unsigned int	div_stat_acp;
    620. 

  620. 	unsigned char	res32[0x1fc];
    621. 

  621. 	unsigned int	gate_ip_acp;
    622. 

  622. 	unsigned char	res33[0xfc];
    623. 

  623. 	unsigned int	div_syslft;
    624. 

  624. 	unsigned char	res34[0xc];
    625. 

  625. 	unsigned int	div_stat_syslft;
    626. 

  626. 	unsigned char	res35[0x1c];
    627. 

  627. 	unsigned int	gate_ip_syslft;
    628. 

  628. 	unsigned char	res36[0xcc];
    629. 

  629. 	unsigned int	clkout_cmu_acp;
    630. 

  630. 	unsigned int	clkout_cmu_acp_div_stat;
    631. 

  631. 	unsigned char	res37[0x8];
    632. 

  632. 	unsigned int	ufmc_config;
    633. 

  633. 	unsigned char	res38[0x38ec];
    634. 

  634. 	unsigned int	div_isp0;
    635. 

  635. 	unsigned int	div_isp1;
    636. 

  636. 	unsigned int	div_isp2;
    637. 

  637. 	unsigned char	res39[0xf4];
    638. 

  638. 	unsigned int	div_stat_isp0;
    639. 

  639. 	unsigned int	div_stat_isp1;
    640. 

  640. 	unsigned int	div_stat_isp2;
    641. 

  641. 	unsigned char	res40[0x3f4];
    642. 

  642. 	unsigned int	gate_ip_isp0;
    643. 

  643. 	unsigned int	gate_ip_isp1;
    644. 

  644. 	unsigned char	res41[0xf8];
    645. 

  645. 	unsigned int	gate_sclk_isp;
    646. 

  646. 	unsigned char	res42[0xc];
    647. 

  647. 	unsigned int	mcuisp_pwr_ctrl;
    648. 

  648. 	unsigned char	res43[0xec];
    649. 

  649. 	unsigned int	clkout_cmu_isp;
    650. 

  650. 	unsigned int	clkout_cmu_isp_div_stat;
    651. 

  651. 	unsigned char	res44[0x3618];
    652. 

  652. 	unsigned int	cpll_lock;
    653. 

  653. 	unsigned char	res45[0xc];
    654. 

  654. 	unsigned int	epll_lock;
    655. 

  655. 	unsigned char	res46[0xc];
    656. 

  656. 	unsigned int	vpll_lock;
    657. 

  657. 	unsigned char	res47[0xc];
    658. 

  658. 	unsigned int	gpll_lock;
    659. 

  659. 	unsigned char	res48[0xcc];
    660. 

  660. 	unsigned int	cpll_con0;
    661. 

  661. 	unsigned int	cpll_con1;
    662. 

  662. 	unsigned char	res49[0x8];
    663. 

  663. 	unsigned int	epll_con0;
    664. 

  664. 	unsigned int	epll_con1;
    665. 

  665. 	unsigned int	epll_con2;
    666. 

  666. 	unsigned char	res50[0x4];
    667. 

  667. 	unsigned int	vpll_con0;
    668. 

  668. 	unsigned int	vpll_con1;
    669. 

  669. 	unsigned int	vpll_con2;
    670. 

  670. 	unsigned char	res51[0x4];
    671. 

  671. 	unsigned int	gpll_con0;
    672. 

  672. 	unsigned int	gpll_con1;
    673. 

  673. 	unsigned char	res52[0xb8];
    674. 

  674. 	unsigned int	src_top0;
    675. 

  675. 	unsigned int	src_top1;
    676. 

  676. 	unsigned int	src_top2;
    677. 

  677. 	unsigned int	src_top3;
    678. 

  678. 	unsigned int	src_gscl;
    679. 

  679. 	unsigned char	res53[0x8];
    680. 

  680. 	unsigned int	src_disp1_0;
    681. 

  681. 	unsigned char	res54[0x10];
    682. 

  682. 	unsigned int	src_mau;
    683. 

  683. 	unsigned int	src_fsys;
    684. 

  684. 	unsigned int	src_gen;
    685. 

  685. 	unsigned char	res55[0x4];
    686. 

  686. 	unsigned int	src_peric0;
    687. 

  687. 	unsigned int	src_peric1;
    688. 

  688. 	unsigned char	res56[0x18];
    689. 

  689. 	unsigned int	sclk_src_isp;
    690. 

  690. 	unsigned char	res57[0x9c];
    691. 

  691. 	unsigned int	src_mask_top;
    692. 

  692. 	unsigned char	res58[0xc];
    693. 

  693. 	unsigned int	src_mask_gscl;
    694. 

  694. 	unsigned char	res59[0x8];
    695. 

  695. 	unsigned int	src_mask_disp1_0;
    696. 

  696. 	unsigned char	res60[0x4];
    697. 

  697. 	unsigned int	src_mask_mau;
    698. 

  698. 	unsigned char	res61[0x8];
    699. 

  699. 	unsigned int	src_mask_fsys;
    700. 

  700. 	unsigned int	src_mask_gen;
    701. 

  701. 	unsigned char	res62[0x8];
    702. 

  702. 	unsigned int	src_mask_peric0;
    703. 

  703. 	unsigned int	src_mask_peric1;
    704. 

  704. 	unsigned char	res63[0x18];
    705. 

  705. 	unsigned int	src_mask_isp;
    706. 

  706. 	unsigned char	res67[0x9c];
    707. 

  707. 	unsigned int	mux_stat_top0;
    708. 

  708. 	unsigned int	mux_stat_top1;
    709. 

  709. 	unsigned int	mux_stat_top2;
    710. 

  710. 	unsigned int	mux_stat_top3;
    711. 

  711. 	unsigned char	res68[0xf0];
    712. 

  712. 	unsigned int	div_top0;
    713. 

  713. 	unsigned int	div_top1;
    714. 

  714. 	unsigned char	res69[0x8];
    715. 

  715. 	unsigned int	div_gscl;
    716. 

  716. 	unsigned char	res70[0x8];
    717. 

  717. 	unsigned int	div_disp1_0;
    718. 

  718. 	unsigned char	res71[0xc];
    719. 

  719. 	unsigned int	div_gen;
    720. 

  720. 	unsigned char	res72[0x4];
    721. 

  721. 	unsigned int	div_mau;
    722. 

  722. 	unsigned int	div_fsys0;
    723. 

  723. 	unsigned int	div_fsys1;
    724. 

  724. 	unsigned int	div_fsys2;
    725. 

  725. 	unsigned char	res73[0x4];
    726. 

  726. 	unsigned int	div_peric0;
    727. 

  727. 	unsigned int	div_peric1;
    728. 

  728. 	unsigned int	div_peric2;
    729. 

  729. 	unsigned int	div_peric3;
    730. 

  730. 	unsigned int	div_peric4;
    731. 

  731. 	unsigned int	div_peric5;
    732. 

  732. 	unsigned char	res74[0x10];
    733. 

  733. 	unsigned int	sclk_div_isp;
    734. 

  734. 	unsigned char	res75[0xc];
    735. 

  735. 	unsigned int	div2_ratio0;
    736. 

  736. 	unsigned int	div2_ratio1;
    737. 

  737. 	unsigned char	res76[0x8];
    738. 

  738. 	unsigned int	div4_ratio;
    739. 

  739. 	unsigned char	res77[0x6c];
    740. 

  740. 	unsigned int	div_stat_top0;
    741. 

  741. 	unsigned int	div_stat_top1;
    742. 

  742. 	unsigned char	res78[0x8];
    743. 

  743. 	unsigned int	div_stat_gscl;
    744. 

  744. 	unsigned char	res79[0x8];
    745. 

  745. 	unsigned int	div_stat_disp1_0;
    746. 

  746. 	unsigned char	res80[0xc];
    747. 

  747. 	unsigned int	div_stat_gen;
    748. 

  748. 	unsigned char	res81[0x4];
    749. 

  749. 	unsigned int	div_stat_mau;
    750. 

  750. 	unsigned int	div_stat_fsys0;
    751. 

  751. 	unsigned int	div_stat_fsys1;
    752. 

  752. 	unsigned int	div_stat_fsys2;
    753. 

  753. 	unsigned char	res82[0x4];
    754. 

  754. 	unsigned int	div_stat_peric0;
    755. 

  755. 	unsigned int	div_stat_peric1;
    756. 

  756. 	unsigned int	div_stat_peric2;
    757. 

  757. 	unsigned int	div_stat_peric3;
    758. 

  758. 	unsigned int	div_stat_peric4;
    759. 

  759. 	unsigned int	div_stat_peric5;
    760. 

  760. 	unsigned char	res83[0x10];
    761. 

  761. 	unsigned int	sclk_div_stat_isp;
    762. 

  762. 	unsigned char	res84[0xc];
    763. 

  763. 	unsigned int	div2_stat0;
    764. 

  764. 	unsigned int	div2_stat1;
    765. 

  765. 	unsigned char	res85[0x8];
    766. 

  766. 	unsigned int	div4_stat;
    767. 

  767. 	unsigned char	res86[0x184];
    768. 

  768. 	unsigned int	gate_top_sclk_disp1;
    769. 

  769. 	unsigned int	gate_top_sclk_gen;
    770. 

  770. 	unsigned char	res87[0xc];
    771. 

  771. 	unsigned int	gate_top_sclk_mau;
    772. 

  772. 	unsigned int	gate_top_sclk_fsys;
    773. 

  773. 	unsigned char	res88[0xc];
    774. 

  774. 	unsigned int	gate_top_sclk_peric;
    775. 

  775. 	unsigned char	res89[0x1c];
    776. 

  776. 	unsigned int	gate_top_sclk_isp;
    777. 

  777. 	unsigned char	res90[0xac];
    778. 

  778. 	unsigned int	gate_ip_gscl;
    779. 

  779. 	unsigned char	res91[0x4];
    780. 

  780. 	unsigned int	gate_ip_disp1;
    781. 

  781. 	unsigned int	gate_ip_mfc;
    782. 

  782. 	unsigned int	gate_ip_g3d;
    783. 

  783. 	unsigned int	gate_ip_gen;
    784. 

  784. 	unsigned char	res92[0xc];
    785. 

  785. 	unsigned int	gate_ip_fsys;
    786. 

  786. 	unsigned char	res93[0x8];
    787. 

  787. 	unsigned int	gate_ip_peric;
    788. 

  788. 	unsigned char	res94[0xc];
    789. 

  789. 	unsigned int	gate_ip_peris;
    790. 

  790. 	unsigned char	res95[0x1c];
    791. 

  791. 	unsigned int	gate_block;
    792. 

  792. 	unsigned char	res96[0x1c];
    793. 

  793. 	unsigned int	mcuiop_pwr_ctrl;
    794. 

  794. 	unsigned char	res97[0x5c];
    795. 

  795. 	unsigned int	clkout_cmu_top;
    796. 

  796. 	unsigned int	clkout_cmu_top_div_stat;
    797. 

  797. 	unsigned char	res98[0x37f8];
    798. 

  798. 	unsigned int	src_lex;
    799. 

  799. 	unsigned char	res99[0x1fc];
    800. 

  800. 	unsigned int	mux_stat_lex;
    801. 

  801. 	unsigned char	res100[0xfc];
    802. 

  802. 	unsigned int	div_lex;
    803. 

  803. 	unsigned char	res101[0xfc];
    804. 

  804. 	unsigned int	div_stat_lex;
    805. 

  805. 	unsigned char	res102[0x1fc];
    806. 

  806. 	unsigned int	gate_ip_lex;
    807. 

  807. 	unsigned char	res103[0x1fc];
    808. 

  808. 	unsigned int	clkout_cmu_lex;
    809. 

  809. 	unsigned int	clkout_cmu_lex_div_stat;
    810. 

  810. 	unsigned char	res104[0x3af8];
    811. 

  811. 	unsigned int	div_r0x;
    812. 

  812. 	unsigned char	res105[0xfc];
    813. 

  813. 	unsigned int	div_stat_r0x;
    814. 

  814. 	unsigned char	res106[0x1fc];
    815. 

  815. 	unsigned int	gate_ip_r0x;
    816. 

  816. 	unsigned char	res107[0x1fc];
    817. 

  817. 	unsigned int	clkout_cmu_r0x;
    818. 

  818. 	unsigned int	clkout_cmu_r0x_div_stat;
    819. 

  819. 	unsigned char	res108[0x3af8];
    820. 

  820. 	unsigned int	div_r1x;
    821. 

  821. 	unsigned char	res109[0xfc];
    822. 

  822. 	unsigned int	div_stat_r1x;
    823. 

  823. 	unsigned char	res110[0x1fc];
    824. 

  824. 	unsigned int	gate_ip_r1x;
    825. 

  825. 	unsigned char	res111[0x1fc];
    826. 

  826. 	unsigned int	clkout_cmu_r1x;
    827. 

  827. 	unsigned int	clkout_cmu_r1x_div_stat;
    828. 

  828. 	unsigned char	res112[0x3608];
    829. 

  829. 	unsigned int	bpll_lock;
    830. 

  830. 	unsigned char	res113[0xfc];
    831. 

  831. 	unsigned int	bpll_con0;
    832. 

  832. 	unsigned int	bpll_con1;
    833. 

  833. 	unsigned char	res114[0xe8];
    834. 

  834. 	unsigned int	src_cdrex;
    835. 

  835. 	unsigned char	res115[0x1fc];
    836. 

  836. 	unsigned int	mux_stat_cdrex;
    837. 

  837. 	unsigned char	res116[0xfc];
    838. 

  838. 	unsigned int	div_cdrex;
    839. 

  839. 	unsigned char	res117[0xfc];
    840. 

  840. 	unsigned int	div_stat_cdrex;
    841. 

  841. 	unsigned char	res118[0x2fc];
    842. 

  842. 	unsigned int	gate_ip_cdrex;
    843. 

  843. 	unsigned char	res119[0x10];
    844. 

  844. 	unsigned int	dmc_freq_ctrl;
    845. 

  845. 	unsigned char	res120[0x4];
    846. 

  846. 	unsigned int	drex2_pause;
    847. 

  847. 	unsigned char	res121[0xe0];
    848. 

  848. 	unsigned int	clkout_cmu_cdrex;
    849. 

  849. 	unsigned int	clkout_cmu_cdrex_div_stat;
    850. 

  850. 	unsigned char	res122[0x8];
    851. 

  851. 	unsigned int	lpddr3phy_ctrl;
    852. 

  852. 	unsigned int	lpddr3phy_con0;
    853. 

  853. 	unsigned int	lpddr3phy_con1;
    854. 

  854. 	unsigned int	lpddr3phy_con2;
    855. 

  855. 	unsigned int	lpddr3phy_con3;
    856. 

  856. 	unsigned int	pll_div2_sel;
    857. 

  857. 	unsigned char	res123[0xf5d8];
    858. 

  858. };
    859. 

  859. 

  860. struct exynos5420_clock {
    861. 

  861. 	unsigned int	apll_lock;			/* 0x10010000 */
    862. 

  862. 	unsigned char	res1[0xfc];
    863. 

  863. 	unsigned int	apll_con0;
    864. 

  864. 	unsigned int	apll_con1;
    865. 

  865. 	unsigned char	res2[0xf8];
    866. 

  866. 	unsigned int	src_cpu;
    867. 

  867. 	unsigned char	res3[0x1fc];
    868. 

  868. 	unsigned int	mux_stat_cpu;
    869. 

  869. 	unsigned char	res4[0xfc];
    870. 

  870. 	unsigned int	div_cpu0;		/* 0x10010500 */
    871. 

  871. 	unsigned int	div_cpu1;
    872. 

  872. 	unsigned char	res5[0xf8];
    873. 

  873. 	unsigned int	div_stat_cpu0;
    874. 

  874. 	unsigned int	div_stat_cpu1;
    875. 

  875. 	unsigned char	res6[0xf8];
    876. 

  876. 	unsigned int	gate_bus_cpu;
    877. 

  877. 	unsigned char	res7[0xfc];
    878. 

  878. 	unsigned int	gate_sclk_cpu;
    879. 

  879. 	unsigned char	res8[0x1fc];
    880. 

  880. 	unsigned int	clkout_cmu_cpu;		/* 0x10010a00 */
    881. 

  881. 	unsigned int	clkout_cmu_cpu_div_stat;
    882. 

  882. 	unsigned char	res9[0x5f8];
    883. 

  883. 	unsigned int	armclk_stopctrl;
    884. 

  884. 	unsigned char	res10[0x4];
    885. 

  885. 	unsigned int	arm_ema_ctrl;
    886. 

  886. 	unsigned int	arm_ema_status;
    887. 

  887. 	unsigned char	res11[0x10];
    888. 

  888. 	unsigned int	pwr_ctrl;
    889. 

  889. 	unsigned int	pwr_ctrl2;
    890. 

  890. 	unsigned char	res12[0xd8];
    891. 

  891. 	unsigned int	apll_con0_l8;		/* 0x1001100 */
    892. 

  892. 	unsigned int	apll_con0_l7;
    893. 

  893. 	unsigned int	apll_con0_l6;
    894. 

  894. 	unsigned int	apll_con0_l5;
    895. 

  895. 	unsigned int	apll_con0_l4;
    896. 

  896. 	unsigned int	apll_con0_l3;
    897. 

  897. 	unsigned int	apll_con0_l2;
    898. 

  898. 	unsigned int	apll_con0_l1;
    899. 

  899. 	unsigned int	iem_control;
    900. 

  900. 	unsigned char	res13[0xdc];
    901. 

  901. 	unsigned int	apll_con1_l8;		/* 0x10011200 */
    902. 

  902. 	unsigned int	apll_con1_l7;
    903. 

  903. 	unsigned int	apll_con1_l6;
    904. 

  904. 	unsigned int	apll_con1_l5;
    905. 

  905. 	unsigned int	apll_con1_l4;
    906. 

  906. 	unsigned int	apll_con1_l3;
    907. 

  907. 	unsigned int	apll_con1_l2;
    908. 

  908. 	unsigned int	apll_con1_l1;
    909. 

  909. 	unsigned char	res14[0xe0];
    910. 

  910. 	unsigned int	clkdiv_iem_l8;
    911. 

  911. 	unsigned int	clkdiv_iem_l7;		/* 0x10011304 */
    912. 

  912. 	unsigned int	clkdiv_iem_l6;
    913. 

  913. 	unsigned int	clkdiv_iem_l5;
    914. 

  914. 	unsigned int	clkdiv_iem_l4;
    915. 

  915. 	unsigned int	clkdiv_iem_l3;
    916. 

  916. 	unsigned int	clkdiv_iem_l2;
    917. 

  917. 	unsigned int	clkdiv_iem_l1;
    918. 

  918. 	unsigned char	res15[0xe0];
    919. 

  919. 	unsigned int	l2_status;
    920. 

  920. 	unsigned char	res16[0x0c];
    921. 

  921. 	unsigned int	cpu_status;		/* 0x10011410 */
    922. 

  922. 	unsigned char	res17[0x0c];
    923. 

  923. 	unsigned int	ptm_status;
    924. 

  924. 	unsigned char	res18[0xbdc];
    925. 

  925. 	unsigned int	cmu_cpu_spare0;
    926. 

  926. 	unsigned int	cmu_cpu_spare1;
    927. 

  927. 	unsigned int	cmu_cpu_spare2;
    928. 

  928. 	unsigned int	cmu_cpu_spare3;
    929. 

  929. 	unsigned int	cmu_cpu_spare4;
    930. 

  930. 	unsigned char	res19[0x1fdc];
    931. 

  931. 	unsigned int	cmu_cpu_version;
    932. 

  932. 	unsigned char	res20[0x20c];
    933. 

  933. 	unsigned int	src_cperi0;		/* 0x10014200 */
    934. 

  934. 	unsigned int	src_cperi1;
    935. 

  935. 	unsigned char	res21[0xf8];
    936. 

  936. 	unsigned int	src_mask_cperi;
    937. 

  937. 	unsigned char	res22[0x100];
    938. 

  938. 	unsigned int	mux_stat_cperi1;
    939. 

  939. 	unsigned char	res23[0xfc];
    940. 

  940. 	unsigned int	div_cperi1;
    941. 

  941. 	unsigned char	res24[0xfc];
    942. 

  942. 	unsigned int	div_stat_cperi1;
    943. 

  943. 	unsigned char	res25[0xf8];
    944. 

  944. 	unsigned int	gate_bus_cperi0;	/* 0x10014700 */
    945. 

  945. 	unsigned int	gate_bus_cperi1;
    946. 

  946. 	unsigned char	res26[0xf8];
    947. 

  947. 	unsigned int	gate_sclk_cperi;
    948. 

  948. 	unsigned char	res27[0xfc];
    949. 

  949. 	unsigned int	gate_ip_cperi;
    950. 

  950. 	unsigned char	res28[0xfc];
    951. 

  951. 	unsigned int	clkout_cmu_cperi;
    952. 

  952. 	unsigned int	clkout_cmu_cperi_div_stat;
    953. 

  953. 	unsigned char	res29[0x5f8];
    954. 

  954. 	unsigned int	dcgidx_map0;		/* 0x10015000 */
    955. 

  955. 	unsigned int	dcgidx_map1;
    956. 

  956. 	unsigned int	dcgidx_map2;
    957. 

  957. 	unsigned char	res30[0x14];
    958. 

  958. 	unsigned int	dcgperf_map0;
    959. 

  959. 	unsigned int	dcgperf_map1;
    960. 

  960. 	unsigned char	res31[0x18];
    961. 

  961. 	unsigned int	dvcidx_map;
    962. 

  962. 	unsigned char	res32[0x1c];
    963. 

  963. 	unsigned int	freq_cpu;
    964. 

  964. 	unsigned int	freq_dpm;
    965. 

  965. 	unsigned char	res33[0x18];
    966. 

  966. 	unsigned int	dvsemclk_en;		/* 0x10015080 */
    967. 

  967. 	unsigned int	maxperf;
    968. 

  968. 	unsigned char	res34[0x2e78];
    969. 

  969. 	unsigned int	cmu_cperi_spare0;
    970. 

  970. 	unsigned int	cmu_cperi_spare1;
    971. 

  971. 	unsigned int	cmu_cperi_spare2;
    972. 

  972. 	unsigned int	cmu_cperi_spare3;
    973. 

  973. 	unsigned int	cmu_cperi_spare4;
    974. 

  974. 	unsigned int	cmu_cperi_spare5;
    975. 

  975. 	unsigned int	cmu_cperi_spare6;
    976. 

  976. 	unsigned int	cmu_cperi_spare7;
    977. 

  977. 	unsigned int	cmu_cperi_spare8;
    978. 

  978. 	unsigned char	res35[0xcc];
    979. 

  979. 	unsigned int	cmu_cperi_version;		/* 0x10017ff0 */
    980. 

  980. 	unsigned char	res36[0x50c];
    981. 

  981. 	unsigned int	div_g2d;
    982. 

  982. 	unsigned char	res37[0xfc];
    983. 

  983. 	unsigned int	div_stat_g2d;
    984. 

  984. 	unsigned char	res38[0xfc];
    985. 

  985. 	unsigned int	gate_bus_g2d;
    986. 

  986. 	unsigned char	res39[0xfc];
    987. 

  987. 	unsigned int	gate_ip_g2d;
    988. 

  988. 	unsigned char	res40[0x1fc];
    989. 

  989. 	unsigned int	clkout_cmu_g2d;
    990. 

  990. 	unsigned int	clkout_cmu_g2d_div_stat;	/* 0x10018a04 */
    991. 

  991. 	unsigned char	res41[0xf8];
    992. 

  992. 	unsigned int	cmu_g2d_spare0;
    993. 

  993. 	unsigned int	cmu_g2d_spare1;
    994. 

  994. 	unsigned int	cmu_g2d_spare2;
    995. 

  995. 	unsigned int	cmu_g2d_spare3;
    996. 

  996. 	unsigned int	cmu_g2d_spare4;
    997. 

  997. 	unsigned char	res42[0x34dc];
    998. 

  998. 	unsigned int	cmu_g2d_version;
    999. 

  999. 	unsigned char	res43[0x30c];
    1000. 

  1000. 	unsigned int	div_cmu_isp0;
    1001. 

  1001. 	unsigned int	div_cmu_isp1;
    1002. 

  1002. 	unsigned int	div_isp2;		/* 0x1001c308 */
    1003. 

  1003. 	unsigned char	res44[0xf4];
    1004. 

  1004. 	unsigned int	div_stat_cmu_isp0;
    1005. 

  1005. 	unsigned int	div_stat_cmu_isp1;
    1006. 

  1006. 	unsigned int	div_stat_isp2;
    1007. 

  1007. 	unsigned char	res45[0x2f4];
    1008. 

  1008. 	unsigned int	gate_bus_isp0;
    1009. 

  1009. 	unsigned int	gate_bus_isp1;
    1010. 

  1010. 	unsigned int	gate_bus_isp2;
    1011. 

  1011. 	unsigned int	gate_bus_isp3;
    1012. 

  1012. 	unsigned char	res46[0xf0];
    1013. 

  1013. 	unsigned int	gate_ip_isp0;
    1014. 

  1014. 	unsigned int	gate_ip_isp1;
    1015. 

  1015. 	unsigned char	res47[0xf8];
    1016. 

  1016. 	unsigned int	gate_sclk_isp;
    1017. 

  1017. 	unsigned char	res48[0x0c];
    1018. 

  1018. 	unsigned int	mcuisp_pwr_ctrl;		/* 0x1001c910 */
    1019. 

  1019. 	unsigned char	res49[0x0ec];
    1020. 

  1020. 	unsigned int	clkout_cmu_isp;
    1021. 

  1021. 	unsigned int	clkout_cmu_isp_div_stat;
    1022. 

  1022. 	unsigned char	res50[0xf8];
    1023. 

  1023. 	unsigned int	cmu_isp_spare0;
    1024. 

  1024. 	unsigned int	cmu_isp_spare1;
    1025. 

  1025. 	unsigned int	cmu_isp_spare2;
    1026. 

  1026. 	unsigned int	cmu_isp_spare3;
    1027. 

  1027. 	unsigned char	res51[0x34e0];
    1028. 

  1028. 	unsigned int	cmu_isp_version;
    1029. 

  1029. 	unsigned char	res52[0x2c];
    1030. 

  1030. 	unsigned int	cpll_lock;			/* 10020020 */
    1031. 

  1031. 	unsigned char	res53[0xc];
    1032. 

  1032. 	unsigned int	dpll_lock;
    1033. 

  1033. 	unsigned char	res54[0xc];
    1034. 

  1034. 	unsigned int	epll_lock;
    1035. 

  1035. 	unsigned char	res55[0xc];
    1036. 

  1036. 	unsigned int	rpll_lock;
    1037. 

  1037. 	unsigned char	res56[0xc];
    1038. 

  1038. 	unsigned int	ipll_lock;
    1039. 

  1039. 	unsigned char	res57[0xc];
    1040. 

  1040. 	unsigned int	spll_lock;
    1041. 

  1041. 	unsigned char	res58[0xc];
    1042. 

  1042. 	unsigned int	vpll_lock;
    1043. 

  1043. 	unsigned char	res59[0xc];
    1044. 

  1044. 	unsigned int	mpll_lock;
    1045. 

  1045. 	unsigned char	res60[0x8c];
    1046. 

  1046. 	unsigned int	cpll_con0;			/* 10020120 */
    1047. 

  1047. 	unsigned int	cpll_con1;
    1048. 

  1048. 	unsigned int	dpll_con0;
    1049. 

  1049. 	unsigned int	dpll_con1;
    1050. 

  1050. 	unsigned int	epll_con0;
    1051. 

  1051. 	unsigned int	epll_con1;
    1052. 

  1052. 	unsigned int	epll_con2;
    1053. 

  1053. 	unsigned char	res601[0x4];
    1054. 

  1054. 	unsigned int	rpll_con0;
    1055. 

  1055. 	unsigned int	rpll_con1;
    1056. 

  1056. 	unsigned int	rpll_con2;
    1057. 

  1057. 	unsigned char	res602[0x4];
    1058. 

  1058. 	unsigned int	ipll_con0;
    1059. 

  1059. 	unsigned int	ipll_con1;
    1060. 

  1060. 	unsigned char	res61[0x8];
    1061. 

  1061. 	unsigned int	spll_con0;
    1062. 

  1062. 	unsigned int	spll_con1;
    1063. 

  1063. 	unsigned char	res62[0x8];
    1064. 

  1064. 	unsigned int	vpll_con0;
    1065. 

  1065. 	unsigned int	vpll_con1;
    1066. 

  1066. 	unsigned char	res63[0x8];
    1067. 

  1067. 	unsigned int	mpll_con0;
    1068. 

  1068. 	unsigned int	mpll_con1;
    1069. 

  1069. 	unsigned char	res64[0x78];
    1070. 

  1070. 	unsigned int	src_top0;		/* 0x10020200 */
    1071. 

  1071. 	unsigned int	src_top1;
    1072. 

  1072. 	unsigned int	src_top2;
    1073. 

  1073. 	unsigned int	src_top3;
    1074. 

  1074. 	unsigned int	src_top4;
    1075. 

  1075. 	unsigned int	src_top5;
    1076. 

  1076. 	unsigned int	src_top6;
    1077. 

  1077. 	unsigned int	src_top7;
    1078. 

  1078. 	unsigned char	res65[0xc];
    1079. 

  1079. 	unsigned int	src_disp10;		/* 0x1002022c */
    1080. 

  1080. 	unsigned char	res66[0x10];
    1081. 

  1081. 	unsigned int	src_mau;
    1082. 

  1082. 	unsigned int	src_fsys;
    1083. 

  1083. 	unsigned char	res67[0x8];
    1084. 

  1084. 	unsigned int	src_peric0;
    1085. 

  1085. 	unsigned int	src_peric1;
    1086. 

  1086. 	unsigned char	res68[0x18];
    1087. 

  1087. 	unsigned int	src_isp;
    1088. 

  1088. 	unsigned char	res69[0x0c];
    1089. 

  1089. 	unsigned int	src_top10;
    1090. 

  1090. 	unsigned int	src_top11;
    1091. 

  1091. 	unsigned int	src_top12;
    1092. 

  1092. 	unsigned char	res70[0x74];
    1093. 

  1093. 	unsigned int	src_mask_top0;
    1094. 

  1094. 	unsigned int	src_mask_top1;
    1095. 

  1095. 	unsigned int	src_mask_top2;
    1096. 

  1096. 	unsigned char	res71[0x10];
    1097. 

  1097. 	unsigned int	src_mask_top7;
    1098. 

  1098. 	unsigned char	res72[0xc];
    1099. 

  1099. 	unsigned int	src_mask_disp10;	/* 0x1002032c */
    1100. 

  1100. 	unsigned char	res73[0x4];
    1101. 

  1101. 	unsigned int	src_mask_mau;
    1102. 

  1102. 	unsigned char	res74[0x8];
    1103. 

  1103. 	unsigned int	src_mask_fsys;
    1104. 

  1104. 	unsigned char	res75[0xc];
    1105. 

  1105. 	unsigned int	src_mask_peric0;
    1106. 

  1106. 	unsigned int	src_mask_peric1;
    1107. 

  1107. 	unsigned char	res76[0x18];
    1108. 

  1108. 	unsigned int	src_mask_isp;
    1109. 

  1109. 	unsigned char	res77[0x8c];
    1110. 

  1110. 	unsigned int	mux_stat_top0;		/* 0x10020400 */
    1111. 

  1111. 	unsigned int	mux_stat_top1;
    1112. 

  1112. 	unsigned int	mux_stat_top2;
    1113. 

  1113. 	unsigned int	mux_stat_top3;
    1114. 

  1114. 	unsigned int	mux_stat_top4;
    1115. 

  1115. 	unsigned int	mux_stat_top5;
    1116. 

  1116. 	unsigned int	mux_stat_top6;
    1117. 

  1117. 	unsigned int	mux_stat_top7;
    1118. 

  1118. 	unsigned char	res78[0x60];
    1119. 

  1119. 	unsigned int	mux_stat_top10;
    1120. 

  1120. 	unsigned int	mux_stat_top11;
    1121. 

  1121. 	unsigned int	mux_stat_top12;
    1122. 

  1122. 	unsigned char	res79[0x74];
    1123. 

  1123. 	unsigned int	div_top0;		/* 0x10020500 */
    1124. 

  1124. 	unsigned int	div_top1;
    1125. 

  1125. 	unsigned int	div_top2;
    1126. 

  1126. 	unsigned char	res80[0x20];
    1127. 

  1127. 	unsigned int	div_disp10;
    1128. 

  1128. 	unsigned char	res81[0x14];
    1129. 

  1129. 	unsigned int	div_mau;
    1130. 

  1130. 	unsigned int	div_fsys0;
    1131. 

  1131. 	unsigned int	div_fsys1;
    1132. 

  1132. 	unsigned int	div_fsys2;
    1133. 

  1133. 	unsigned char	res82[0x4];
    1134. 

  1134. 	unsigned int	div_peric0;
    1135. 

  1135. 	unsigned int	div_peric1;
    1136. 

  1136. 	unsigned int	div_peric2;
    1137. 

  1137. 	unsigned int	div_peric3;
    1138. 

  1138. 	unsigned int	div_peric4;		/* 0x10020568 */
    1139. 

  1139. 	unsigned char	res83[0x14];
    1140. 

  1140. 	unsigned int	div_isp0;
    1141. 

  1141. 	unsigned int	div_isp1;
    1142. 

  1142. 	unsigned char	res84[0x8];
    1143. 

  1143. 	unsigned int	clkdiv2_ratio;
    1144. 

  1144. 	unsigned char	res850[0xc];
    1145. 

  1145. 	unsigned int	clkdiv4_ratio;
    1146. 

  1146. 	unsigned char	res85[0x5c];
    1147. 

  1147. 	unsigned int	div_stat_top0;
    1148. 

  1148. 	unsigned int	div_stat_top1;
    1149. 

  1149. 	unsigned int	div_stat_top2;
    1150. 

  1150. 	unsigned char	res86[0x20];
    1151. 

  1151. 	unsigned int	div_stat_disp10;
    1152. 

  1152. 	unsigned char	res87[0x14];
    1153. 

  1153. 	unsigned int	div_stat_mau;		/* 0x10020644 */
    1154. 

  1154. 	unsigned int	div_stat_fsys0;
    1155. 

  1155. 	unsigned int	div_stat_fsys1;
    1156. 

  1156. 	unsigned int	div_stat_fsys2;
    1157. 

  1157. 	unsigned char	res88[0x4];
    1158. 

  1158. 	unsigned int	div_stat_peric0;
    1159. 

  1159. 	unsigned int	div_stat_peric1;
    1160. 

  1160. 	unsigned int	div_stat_peric2;
    1161. 

  1161. 	unsigned int	div_stat_peric3;
    1162. 

  1162. 	unsigned int	div_stat_peric4;
    1163. 

  1163. 	unsigned char	res89[0x14];
    1164. 

  1164. 	unsigned int	div_stat_isp0;
    1165. 

  1165. 	unsigned int	div_stat_isp1;
    1166. 

  1166. 	unsigned char	res90[0x8];
    1167. 

  1167. 	unsigned int	clkdiv2_stat0;
    1168. 

  1168. 	unsigned char	res91[0xc];
    1169. 

  1169. 	unsigned int	clkdiv4_stat;
    1170. 

  1170. 	unsigned char	res92[0x5c];
    1171. 

  1171. 	unsigned int	gate_bus_top;		/* 0x10020700 */
    1172. 

  1172. 	unsigned char	res93[0xc];
    1173. 

  1173. 	unsigned int	gate_bus_gscl0;
    1174. 

  1174. 	unsigned char	res94[0xc];
    1175. 

  1175. 	unsigned int	gate_bus_gscl1;
    1176. 

  1176. 	unsigned char	res95[0x4];
    1177. 

  1177. 	unsigned int	gate_bus_disp1;
    1178. 

  1178. 	unsigned char	res96[0x4];
    1179. 

  1179. 	unsigned int	gate_bus_wcore;
    1180. 

  1180. 	unsigned int	gate_bus_mfc;
    1181. 

  1181. 	unsigned int	gate_bus_g3d;
    1182. 

  1182. 	unsigned int	gate_bus_gen;
    1183. 

  1183. 	unsigned int	gate_bus_fsys0;
    1184. 

  1184. 	unsigned int	gate_bus_fsys1;
    1185. 

  1185. 	unsigned int	gate_bus_fsys2;
    1186. 

  1186. 	unsigned int	gate_bus_mscl;
    1187. 

  1187. 	unsigned int	gate_bus_peric;
    1188. 

  1188. 	unsigned int	gate_bus_peric1;
    1189. 

  1189. 	unsigned char	res97[0x8];
    1190. 

  1190. 	unsigned int	gate_bus_peris0;
    1191. 

  1191. 	unsigned int	gate_bus_peris1;	/* 0x10020764 */
    1192. 

  1192. 	unsigned char	res98[0x8];
    1193. 

  1193. 	unsigned int	gate_bus_noc;
    1194. 

  1194. 	unsigned char	res99[0xac];
    1195. 

  1195. 	unsigned int	gate_top_sclk_gscl;
    1196. 

  1196. 	unsigned char	res1000[0x4];
    1197. 

  1197. 	unsigned int	gate_top_sclk_disp1;
    1198. 

  1198. 	unsigned char	res100[0x10];
    1199. 

  1199. 	unsigned int	gate_top_sclk_mau;
    1200. 

  1200. 	unsigned int	gate_top_sclk_fsys;
    1201. 

  1201. 	unsigned char	res101[0xc];
    1202. 

  1202. 	unsigned int	gate_top_sclk_peric;
    1203. 

  1203. 	unsigned char	res102[0xc];
    1204. 

  1204. 	unsigned int	gate_top_sclk_cperi;
    1205. 

  1205. 	unsigned char	res103[0xc];
    1206. 

  1206. 	unsigned int	gate_top_sclk_isp;
    1207. 

  1207. 	unsigned char	res104[0x9c];
    1208. 

  1208. 	unsigned int	gate_ip_gscl0;
    1209. 

  1209. 	unsigned char	res105[0xc];
    1210. 

  1210. 	unsigned int	gate_ip_gscl1;
    1211. 

  1211. 	unsigned char	res106[0x4];
    1212. 

  1212. 	unsigned int	gate_ip_disp1;
    1213. 

  1213. 	unsigned int	gate_ip_mfc;
    1214. 

  1214. 	unsigned int	gate_ip_g3d;
    1215. 

  1215. 	unsigned int	gate_ip_gen;		/* 0x10020934 */
    1216. 

  1216. 	unsigned char	res107[0xc];
    1217. 

  1217. 	unsigned int	gate_ip_fsys;
    1218. 

  1218. 	unsigned char	res108[0x8];
    1219. 

  1219. 	unsigned int	gate_ip_peric;
    1220. 

  1220. 	unsigned char	res109[0xc];
    1221. 

  1221. 	unsigned int	gate_ip_peris;
    1222. 

  1222. 	unsigned char	res110[0xc];
    1223. 

  1223. 	unsigned int	gate_ip_mscl;
    1224. 

  1224. 	unsigned char	res111[0xc];
    1225. 

  1225. 	unsigned int	gate_ip_block;
    1226. 

  1226. 	unsigned char	res112[0xc];
    1227. 

  1227. 	unsigned int	bypass;
    1228. 

  1228. 	unsigned char	res113[0x6c];
    1229. 

  1229. 	unsigned int	clkout_cmu_top;
    1230. 

  1230. 	unsigned int	clkout_cmu_top_div_stat;
    1231. 

  1231. 	unsigned char	res114[0xf8];
    1232. 

  1232. 	unsigned int	clkout_top_spare0;
    1233. 

  1233. 	unsigned int	clkout_top_spare1;
    1234. 

  1234. 	unsigned int	clkout_top_spare2;
    1235. 

  1235. 	unsigned int	clkout_top_spare3;
    1236. 

  1236. 	unsigned char	res115[0x34e0];
    1237. 

  1237. 	unsigned int	clkout_top_version;
    1238. 

  1238. 	unsigned char	res116[0xc01c];
    1239. 

  1239. 	unsigned int	bpll_lock;			/* 0x10030010 */
    1240. 

  1240. 	unsigned char	res117[0xfc];
    1241. 

  1241. 	unsigned int	bpll_con0;
    1242. 

  1242. 	unsigned int	bpll_con1;
    1243. 

  1243. 	unsigned char	res118[0xe8];
    1244. 

  1244. 	unsigned int	src_cdrex;
    1245. 

  1245. 	unsigned char	res119[0x1fc];
    1246. 

  1246. 	unsigned int	mux_stat_cdrex;
    1247. 

  1247. 	unsigned char	res120[0xfc];
    1248. 

  1248. 	unsigned int	div_cdrex0;
    1249. 

  1249. 	unsigned int	div_cdrex1;
    1250. 

  1250. 	unsigned char	res121[0xf8];
    1251. 

  1251. 	unsigned int	div_stat_cdrex;
    1252. 

  1252. 	unsigned char	res1211[0xfc];
    1253. 

  1253. 	unsigned int	gate_bus_cdrex;
    1254. 

  1254. 	unsigned int	gate_bus_cdrex1;
    1255. 

  1255. 	unsigned char	res122[0x1f8];
    1256. 

  1256. 	unsigned int	gate_ip_cdrex;
    1257. 

  1257. 	unsigned char	res123[0x10];
    1258. 

  1258. 	unsigned int	dmc_freq_ctrl;		/* 0x10030914 */
    1259. 

  1259. 	unsigned char	res124[0x4];
    1260. 

  1260. 	unsigned int	pause;
    1261. 

  1261. 	unsigned int	ddrphy_lock_ctrl;
    1262. 

  1262. 	unsigned char	res125[0xdc];
    1263. 

  1263. 	unsigned int	clkout_cmu_cdrex;
    1264. 

  1264. 	unsigned int	clkout_cmu_cdrex_div_stat;
    1265. 

  1265. 	unsigned char	res126[0x8];
    1266. 

  1266. 	unsigned int	lpddr3phy_ctrl;
    1267. 

  1267. 	unsigned int	lpddr3phy_con0;
    1268. 

  1268. 	unsigned int	lpddr3phy_con1;
    1269. 

  1269. 	unsigned int	lpddr3phy_con2;
    1270. 

  1270. 	unsigned int	lpddr3phy_con3;
    1271. 

  1271. 	unsigned int	lpddr3phy_con4;
    1272. 

  1272. 	unsigned int	lpddr3phy_con5;		/* 0x10030a28 */
    1273. 

  1273. 	unsigned int	pll_div2_sel;
    1274. 

  1274. 	unsigned char	res127[0xd0];
    1275. 

  1275. 	unsigned int	cmu_cdrex_spare0;
    1276. 

  1276. 	unsigned int	cmu_cdrex_spare1;
    1277. 

  1277. 	unsigned int	cmu_cdrex_spare2;
    1278. 

  1278. 	unsigned int	cmu_cdrex_spare3;
    1279. 

  1279. 	unsigned int	cmu_cdrex_spare4;
    1280. 

  1280. 	unsigned char	res128[0x34dc];
    1281. 

  1281. 	unsigned int	cmu_cdrex_version;		/* 0x10033ff0 */
    1282. 

  1282. 	unsigned char	res129[0x400c];
    1283. 

  1283. 	unsigned int	kpll_lock;
    1284. 

  1284. 	unsigned char	res130[0xfc];
    1285. 

  1285. 	unsigned int	kpll_con0;
    1286. 

  1286. 	unsigned int	kpll_con1;
    1287. 

  1287. 	unsigned char	res131[0xf8];
    1288. 

  1288. 	unsigned int	src_kfc;
    1289. 

  1289. 	unsigned char	res132[0x1fc];
    1290. 

  1290. 	unsigned int	mux_stat_kfc;		/* 0x10038400 */
    1291. 

  1291. 	unsigned char	res133[0xfc];
    1292. 

  1292. 	unsigned int	div_kfc0;
    1293. 

  1293. 	unsigned char	res134[0xfc];
    1294. 

  1294. 	unsigned int	div_stat_kfc0;
    1295. 

  1295. 	unsigned char	res135[0xfc];
    1296. 

  1296. 	unsigned int	gate_bus_cpu_kfc;
    1297. 

  1297. 	unsigned char	res136[0xfc];
    1298. 

  1298. 	unsigned int	gate_sclk_cpu_kfc;
    1299. 

  1299. 	unsigned char	res137[0x1fc];
    1300. 

  1300. 	unsigned int	clkout_cmu_kfc;
    1301. 

  1301. 	unsigned int	clkout_cmu_kfc_div_stat;	/* 0x10038a04 */
    1302. 

  1302. 	unsigned char	res138[0x5f8];
    1303. 

  1303. 	unsigned int	armclk_stopctrl_kfc;
    1304. 

  1304. 	unsigned char	res139[0x4];
    1305. 

  1305. 	unsigned int	armclk_ema_ctrl_kfc;
    1306. 

  1306. 	unsigned int	armclk_ema_status_kfc;
    1307. 

  1307. 	unsigned char	res140[0x10];
    1308. 

  1308. 	unsigned int	pwr_ctrl_kfc;
    1309. 

  1309. 	unsigned int	pwr_ctrl2_kfc;
    1310. 

  1310. 	unsigned char	res141[0xd8];
    1311. 

  1311. 	unsigned int	kpll_con0_l8;
    1312. 

  1312. 	unsigned int	kpll_con0_l7;
    1313. 

  1313. 	unsigned int	kpll_con0_l6;
    1314. 

  1314. 	unsigned int	kpll_con0_l5;
    1315. 

  1315. 	unsigned int	kpll_con0_l4;
    1316. 

  1316. 	unsigned int	kpll_con0_l3;
    1317. 

  1317. 	unsigned int	kpll_con0_l2;
    1318. 

  1318. 	unsigned int	kpll_con0_l1;
    1319. 

  1319. 	unsigned int	iem_control_kfc;		/* 0x10039120 */
    1320. 

  1320. 	unsigned char	res142[0xdc];
    1321. 

  1321. 	unsigned int	kpll_con1_l8;
    1322. 

  1322. 	unsigned int	kpll_con1_l7;
    1323. 

  1323. 	unsigned int	kpll_con1_l6;
    1324. 

  1324. 	unsigned int	kpll_con1_l5;
    1325. 

  1325. 	unsigned int	kpll_con1_l4;
    1326. 

  1326. 	unsigned int	kpll_con1_l3;
    1327. 

  1327. 	unsigned int	kpll_con1_l2;
    1328. 

  1328. 	unsigned int	kpll_con1_l1;
    1329. 

  1329. 	unsigned char	res143[0xe0];
    1330. 

  1330. 	unsigned int	clkdiv_iem_l8_kfc;		/* 0x10039300 */
    1331. 

  1331. 	unsigned int	clkdiv_iem_l7_kfc;
    1332. 

  1332. 	unsigned int	clkdiv_iem_l6_kfc;
    1333. 

  1333. 	unsigned int	clkdiv_iem_l5_kfc;
    1334. 

  1334. 	unsigned int	clkdiv_iem_l4_kfc;
    1335. 

  1335. 	unsigned int	clkdiv_iem_l3_kfc;
    1336. 

  1336. 	unsigned int	clkdiv_iem_l2_kfc;
    1337. 

  1337. 	unsigned int	clkdiv_iem_l1_kfc;
    1338. 

  1338. 	unsigned char	res144[0xe0];
    1339. 

  1339. 	unsigned int	l2_status_kfc;
    1340. 

  1340. 	unsigned char	res145[0xc];
    1341. 

  1341. 	unsigned int	cpu_status_kfc;		/* 0x10039410 */
    1342. 

  1342. 	unsigned char	res146[0xc];
    1343. 

  1343. 	unsigned int	ptm_status_kfc;
    1344. 

  1344. 	unsigned char	res147[0xbdc];
    1345. 

  1345. 	unsigned int	cmu_kfc_spare0;
    1346. 

  1346. 	unsigned int	cmu_kfc_spare1;
    1347. 

  1347. 	unsigned int	cmu_kfc_spare2;
    1348. 

  1348. 	unsigned int	cmu_kfc_spare3;
    1349. 

  1349. 	unsigned int	cmu_kfc_spare4;
    1350. 

  1350. 	unsigned char	res148[0x1fdc];
    1351. 

  1351. 	unsigned int	cmu_kfc_version;		/* 0x1003bff0 */
    1352. 

  1352. };
    1353. 

  1353. 

  1354. /* structure for epll configuration used in audio clock configuration */
    1355. 

  1355. struct set_epll_con_val {
    1356. 

  1356. 	unsigned int freq_out;		/* frequency out */
    1357. 

  1357. 	unsigned int en_lock_det;	/* enable lock detect */
    1358. 

  1358. 	unsigned int m_div;		/* m divider value */
    1359. 

  1359. 	unsigned int p_div;		/* p divider value */
    1360. 

  1360. 	unsigned int s_div;		/* s divider value */
    1361. 

  1361. 	unsigned int k_dsm;		/* k value of delta signal modulator */
    1362. 

  1362. };
    1363. 

  1363. #endif
    1364. 

  1364. 

  1365. #define MPLL_FOUT_SEL_SHIFT	4
    1366. 

  1366. #define EXYNOS5_EPLLCON0_LOCKED_SHIFT	29  /* EPLL Locked bit position*/
    1367. 

  1367. #define TIMEOUT_EPLL_LOCK		1000
    1368. 

  1368. 

  1369. #define AUDIO_0_RATIO_MASK		0x0f
    1370. 

  1370. #define AUDIO_1_RATIO_MASK		0x0f
    1371. 

  1371. 

  1372. #define AUDIO0_SEL_MASK			0xf
    1373. 

  1373. #define AUDIO1_SEL_MASK			0xf
    1374. 

  1374. 

  1375. #define CLK_SRC_SCLK_EPLL		0x7
    1376. 

  1376. #define CLK_SRC_MOUT_EPLL		(1<<12)
    1377. 

  1377. #define AUDIO_CLKMUX_ASS		(1<<0)
    1378. 

  1378. 

  1379. /* CON0 bit-fields */
    1380. 

  1380. #define EPLL_CON0_MDIV_MASK		0x1ff
    1381. 

  1381. #define EPLL_CON0_PDIV_MASK		0x3f
    1382. 

  1382. #define EPLL_CON0_SDIV_MASK		0x7
    1383. 

  1383. #define EPLL_CON0_MDIV_SHIFT		16
    1384. 

  1384. #define EPLL_CON0_PDIV_SHIFT		8
    1385. 

  1385. #define EPLL_CON0_SDIV_SHIFT		0
    1386. 

  1386. #define EPLL_CON0_LOCK_DET_EN_SHIFT	28
    1387. 

  1387. #define EPLL_CON0_LOCK_DET_EN_MASK	1
    1388. 

  1388. 

  1389. #define MPLL_FOUT_SEL_MASK	0x1
    1390. 

  1390. #define BPLL_FOUT_SEL_SHIFT	0
    1391. 

  1391. #define BPLL_FOUT_SEL_MASK	0x1
    1392. 

  1392. #endif
    1393.