pmu.c 1.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. * (C) Copyright 2010,2011 NVIDIA Corporation <www.nvidia.com>
  5. */
  6. #include <common.h>
  7. #include <i2c.h>
  8. #include <tps6586x.h>
  9. #include <asm/io.h>
  10. #include <asm/arch/tegra.h>
  11. #include <asm/arch-tegra/ap.h>
  12. #include <asm/arch-tegra/tegra_i2c.h>
  13. #include <asm/arch-tegra/sys_proto.h>
  14. #define VDD_CORE_NOMINAL_T25 0x17 /* 1.3v */
  15. #define VDD_CPU_NOMINAL_T25 0x10 /* 1.125v */
  16. #define VDD_CORE_NOMINAL_T20 0x16 /* 1.275v */
  17. #define VDD_CPU_NOMINAL_T20 0x0f /* 1.1v */
  18. #define VDD_RELATION 0x02 /* 50mv */
  19. #define VDD_TRANSITION_STEP 0x06 /* 150mv */
  20. #define VDD_TRANSITION_RATE 0x06 /* 3.52mv/us */
  21. #define PMI_I2C_ADDRESS 0x34 /* chip requires this address */
  22. int pmu_set_nominal(void)
  23. {
  24. struct udevice *bus, *dev;
  25. int core, cpu;
  26. int ret;
  27. /* by default, the table has been filled with T25 settings */
  28. switch (tegra_get_chip_sku()) {
  29. case TEGRA_SOC_T20:
  30. core = VDD_CORE_NOMINAL_T20;
  31. cpu = VDD_CPU_NOMINAL_T20;
  32. break;
  33. case TEGRA_SOC_T25:
  34. core = VDD_CORE_NOMINAL_T25;
  35. cpu = VDD_CPU_NOMINAL_T25;
  36. break;
  37. default:
  38. debug("%s: Unknown SKU id\n", __func__);
  39. return -1;
  40. }
  41. ret = tegra_i2c_get_dvc_bus(&bus);
  42. if (ret) {
  43. debug("%s: Cannot find DVC I2C bus\n", __func__);
  44. return ret;
  45. }
  46. ret = i2c_get_chip(bus, PMI_I2C_ADDRESS, 1, &dev);
  47. if (ret) {
  48. debug("%s: Cannot find DVC I2C chip\n", __func__);
  49. return ret;
  50. }
  51. tps6586x_init(dev);
  52. tps6586x_set_pwm_mode(TPS6586X_PWM_SM1);
  53. return tps6586x_adjust_sm0_sm1(core, cpu, VDD_TRANSITION_STEP,
  54. VDD_TRANSITION_RATE, VDD_RELATION);
  55. }