thunderx.c 2.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /**
  3. * (C) Copyright 2014, Cavium Inc.
  4. **/
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <malloc.h>
  8. #include <errno.h>
  9. #include <linux/compiler.h>
  10. #include <cavium/atf.h>
  11. #include <asm/armv8/mmu.h>
  12. #if !CONFIG_IS_ENABLED(OF_CONTROL)
  13. #include <dm/platform_data/serial_pl01x.h>
  14. static const struct pl01x_serial_platdata serial0 = {
  15. .base = CONFIG_SYS_SERIAL0,
  16. .type = TYPE_PL011,
  17. .clock = 0,
  18. .skip_init = true,
  19. };
  20. U_BOOT_DEVICE(thunderx_serial0) = {
  21. .name = "serial_pl01x",
  22. .platdata = &serial0,
  23. };
  24. static const struct pl01x_serial_platdata serial1 = {
  25. .base = CONFIG_SYS_SERIAL1,
  26. .type = TYPE_PL011,
  27. .clock = 0,
  28. .skip_init = true,
  29. };
  30. U_BOOT_DEVICE(thunderx_serial1) = {
  31. .name = "serial_pl01x",
  32. .platdata = &serial1,
  33. };
  34. #endif
  35. DECLARE_GLOBAL_DATA_PTR;
  36. static struct mm_region thunderx_mem_map[] = {
  37. {
  38. .virt = 0x000000000000UL,
  39. .phys = 0x000000000000UL,
  40. .size = 0x40000000000UL,
  41. .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_NON_SHARE,
  42. }, {
  43. .virt = 0x800000000000UL,
  44. .phys = 0x800000000000UL,
  45. .size = 0x40000000000UL,
  46. .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  47. PTE_BLOCK_NON_SHARE,
  48. }, {
  49. .virt = 0x840000000000UL,
  50. .phys = 0x840000000000UL,
  51. .size = 0x40000000000UL,
  52. .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  53. PTE_BLOCK_NON_SHARE,
  54. }, {
  55. /* List terminator */
  56. 0,
  57. }
  58. };
  59. struct mm_region *mem_map = thunderx_mem_map;
  60. int board_init(void)
  61. {
  62. return 0;
  63. }
  64. int timer_init(void)
  65. {
  66. return 0;
  67. }
  68. int dram_init(void)
  69. {
  70. ssize_t node_count = atf_node_count();
  71. ssize_t dram_size;
  72. int node;
  73. printf("Initializing\nNodes in system: %zd\n", node_count);
  74. gd->ram_size = 0;
  75. for (node = 0; node < node_count; node++) {
  76. dram_size = atf_dram_size(node);
  77. printf("Node %d: %zd MBytes of DRAM\n", node, dram_size >> 20);
  78. gd->ram_size += dram_size;
  79. }
  80. gd->ram_size -= MEM_BASE;
  81. *(unsigned long *)CPU_RELEASE_ADDR = 0;
  82. puts("DRAM size:");
  83. return 0;
  84. }
  85. /*
  86. * Board specific reset that is system reset.
  87. */
  88. void reset_cpu(ulong addr)
  89. {
  90. }
  91. /*
  92. * Board specific ethernet initialization routine.
  93. */
  94. int board_eth_init(bd_t *bis)
  95. {
  96. int rc = 0;
  97. return rc;
  98. }
  99. #ifdef CONFIG_PCI
  100. void pci_init_board(void)
  101. {
  102. printf("DEBUG: PCI Init TODO *****\n");
  103. }
  104. #endif