ls1088a_qixis.h 994 B

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2017 NXP
  4. */
  5. #ifndef __LS1088AQDS_QIXIS_H__
  6. #define __LS1088AQDS_QIXIS_H__
  7. /* Definitions of QIXIS Registers for LS1088AQDS */
  8. /* SYSCLK */
  9. #define QIXIS_SYSCLK_66 0x0
  10. #define QIXIS_SYSCLK_83 0x1
  11. #define QIXIS_SYSCLK_100 0x2
  12. #define QIXIS_SYSCLK_125 0x3
  13. #define QIXIS_SYSCLK_133 0x4
  14. #define QIXIS_SYSCLK_150 0x5
  15. #define QIXIS_SYSCLK_160 0x6
  16. #define QIXIS_SYSCLK_166 0x7
  17. /* DDRCLK */
  18. #define QIXIS_DDRCLK_66 0x0
  19. #define QIXIS_DDRCLK_100 0x1
  20. #define QIXIS_DDRCLK_125 0x2
  21. #define QIXIS_DDRCLK_133 0x3
  22. /* BRDCFG2 - SD clock*/
  23. #define QIXIS_SDCLK1_100 0x0
  24. #define QIXIS_SDCLK1_125 0x1
  25. #define QIXIS_SDCLK1_165 0x2
  26. #define QIXIS_SDCLK1_100_SP 0x3
  27. #define BRDCFG4_EMISEL_MASK 0xE0
  28. #define BRDCFG4_EMISEL_SHIFT 5
  29. #define BRDCFG9_SFPTX_MASK 0x10
  30. #define BRDCFG9_SFPTX_SHIFT 4
  31. /* Definitions of QIXIS Registers for LS1088ARDB */
  32. /* BRDCFG5 */
  33. #define BRDCFG5_SPISDHC_MASK 0x0C
  34. #define BRDCFG5_FORCE_SD 0x08
  35. #endif