clk-mt2712-vdec.c 2.4 KB

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  1. /*
  2. * Copyright (c) 2017 MediaTek Inc.
  3. * Author: Weiyi Lu <weiyi.lu@mediatek.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include <linux/clk-provider.h>
  15. #include <linux/platform_device.h>
  16. #include "clk-mtk.h"
  17. #include "clk-gate.h"
  18. #include <dt-bindings/clock/mt2712-clk.h>
  19. static const struct mtk_gate_regs vdec0_cg_regs = {
  20. .set_ofs = 0x0,
  21. .clr_ofs = 0x4,
  22. .sta_ofs = 0x0,
  23. };
  24. static const struct mtk_gate_regs vdec1_cg_regs = {
  25. .set_ofs = 0x8,
  26. .clr_ofs = 0xc,
  27. .sta_ofs = 0x8,
  28. };
  29. #define GATE_VDEC0(_id, _name, _parent, _shift) { \
  30. .id = _id, \
  31. .name = _name, \
  32. .parent_name = _parent, \
  33. .regs = &vdec0_cg_regs, \
  34. .shift = _shift, \
  35. .ops = &mtk_clk_gate_ops_setclr_inv, \
  36. }
  37. #define GATE_VDEC1(_id, _name, _parent, _shift) { \
  38. .id = _id, \
  39. .name = _name, \
  40. .parent_name = _parent, \
  41. .regs = &vdec1_cg_regs, \
  42. .shift = _shift, \
  43. .ops = &mtk_clk_gate_ops_setclr_inv, \
  44. }
  45. static const struct mtk_gate vdec_clks[] = {
  46. /* VDEC0 */
  47. GATE_VDEC0(CLK_VDEC_CKEN, "vdec_cken", "vdec_sel", 0),
  48. /* VDEC1 */
  49. GATE_VDEC1(CLK_VDEC_LARB1_CKEN, "vdec_larb1_cken", "vdec_sel", 0),
  50. GATE_VDEC1(CLK_VDEC_IMGRZ_CKEN, "vdec_imgrz_cken", "vdec_sel", 1),
  51. };
  52. static int clk_mt2712_vdec_probe(struct platform_device *pdev)
  53. {
  54. struct clk_onecell_data *clk_data;
  55. int r;
  56. struct device_node *node = pdev->dev.of_node;
  57. clk_data = mtk_alloc_clk_data(CLK_VDEC_NR_CLK);
  58. mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks),
  59. clk_data);
  60. r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
  61. if (r != 0)
  62. pr_err("%s(): could not register clock provider: %d\n",
  63. __func__, r);
  64. return r;
  65. }
  66. static const struct of_device_id of_match_clk_mt2712_vdec[] = {
  67. { .compatible = "mediatek,mt2712-vdecsys", },
  68. {}
  69. };
  70. static struct platform_driver clk_mt2712_vdec_drv = {
  71. .probe = clk_mt2712_vdec_probe,
  72. .driver = {
  73. .name = "clk-mt2712-vdec",
  74. .of_match_table = of_match_clk_mt2712_vdec,
  75. },
  76. };
  77. builtin_platform_driver(clk_mt2712_vdec_drv);