pll.h 2.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // Spreadtrum pll clock driver
  4. //
  5. // Copyright (C) 2015~2017 Spreadtrum, Inc.
  6. // Author: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
  7. #ifndef _SPRD_PLL_H_
  8. #define _SPRD_PLL_H_
  9. #include "common.h"
  10. struct reg_cfg {
  11. u32 val;
  12. u32 msk;
  13. };
  14. struct clk_bit_field {
  15. u8 shift;
  16. u8 width;
  17. };
  18. enum {
  19. PLL_LOCK_DONE,
  20. PLL_DIV_S,
  21. PLL_MOD_EN,
  22. PLL_SDM_EN,
  23. PLL_REFIN,
  24. PLL_IBIAS,
  25. PLL_N,
  26. PLL_NINT,
  27. PLL_KINT,
  28. PLL_PREDIV,
  29. PLL_POSTDIV,
  30. PLL_FACT_MAX
  31. };
  32. /*
  33. * struct sprd_pll - definition of adjustable pll clock
  34. *
  35. * @reg: registers used to set the configuration of pll clock,
  36. * reg[0] shows how many registers this pll clock uses.
  37. * @itable: pll ibias table, itable[0] means how many items this
  38. * table includes
  39. * @udelay delay time after setting rate
  40. * @factors used to calculate the pll clock rate
  41. * @fvco: fvco threshold rate
  42. * @fflag: fvco flag
  43. */
  44. struct sprd_pll {
  45. u32 regs_num;
  46. const u64 *itable;
  47. const struct clk_bit_field *factors;
  48. u16 udelay;
  49. u16 k1;
  50. u16 k2;
  51. u16 fflag;
  52. u64 fvco;
  53. struct sprd_clk_common common;
  54. };
  55. #define SPRD_PLL_WITH_ITABLE_K_FVCO(_struct, _name, _parent, _reg, \
  56. _regs_num, _itable, _factors, \
  57. _udelay, _k1, _k2, _fflag, _fvco) \
  58. struct sprd_pll _struct = { \
  59. .regs_num = _regs_num, \
  60. .itable = _itable, \
  61. .factors = _factors, \
  62. .udelay = _udelay, \
  63. .k1 = _k1, \
  64. .k2 = _k2, \
  65. .fflag = _fflag, \
  66. .fvco = _fvco, \
  67. .common = { \
  68. .regmap = NULL, \
  69. .reg = _reg, \
  70. .hw.init = CLK_HW_INIT(_name, \
  71. _parent, \
  72. &sprd_pll_ops, \
  73. 0), \
  74. }, \
  75. }
  76. #define SPRD_PLL_WITH_ITABLE_K(_struct, _name, _parent, _reg, \
  77. _regs_num, _itable, _factors, \
  78. _udelay, _k1, _k2) \
  79. SPRD_PLL_WITH_ITABLE_K_FVCO(_struct, _name, _parent, _reg, \
  80. _regs_num, _itable, _factors, \
  81. _udelay, _k1, _k2, 0, 0)
  82. #define SPRD_PLL_WITH_ITABLE_1K(_struct, _name, _parent, _reg, \
  83. _regs_num, _itable, _factors, _udelay) \
  84. SPRD_PLL_WITH_ITABLE_K_FVCO(_struct, _name, _parent, _reg, \
  85. _regs_num, _itable, _factors, \
  86. _udelay, 1000, 1000, 0, 0)
  87. static inline struct sprd_pll *hw_to_sprd_pll(struct clk_hw *hw)
  88. {
  89. struct sprd_clk_common *common = hw_to_sprd_clk_common(hw);
  90. return container_of(common, struct sprd_pll, common);
  91. }
  92. extern const struct clk_ops sprd_pll_ops;
  93. #endif /* _SPRD_PLL_H_ */