fsl_dcu_drm_drv.c 9.3 KB

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  1. /*
  2. * Copyright 2015 Freescale Semiconductor, Inc.
  3. *
  4. * Freescale DCU drm device driver
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/clk.h>
  12. #include <linux/clk-provider.h>
  13. #include <linux/console.h>
  14. #include <linux/io.h>
  15. #include <linux/mfd/syscon.h>
  16. #include <linux/mm.h>
  17. #include <linux/module.h>
  18. #include <linux/of_platform.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/pm.h>
  21. #include <linux/pm_runtime.h>
  22. #include <linux/regmap.h>
  23. #include <drm/drmP.h>
  24. #include <drm/drm_atomic_helper.h>
  25. #include <drm/drm_crtc_helper.h>
  26. #include <drm/drm_fb_cma_helper.h>
  27. #include <drm/drm_gem_cma_helper.h>
  28. #include <drm/drm_modeset_helper.h>
  29. #include "fsl_dcu_drm_crtc.h"
  30. #include "fsl_dcu_drm_drv.h"
  31. #include "fsl_tcon.h"
  32. static int legacyfb_depth = 24;
  33. module_param(legacyfb_depth, int, 0444);
  34. static bool fsl_dcu_drm_is_volatile_reg(struct device *dev, unsigned int reg)
  35. {
  36. if (reg == DCU_INT_STATUS || reg == DCU_UPDATE_MODE)
  37. return true;
  38. return false;
  39. }
  40. static const struct regmap_config fsl_dcu_regmap_config = {
  41. .reg_bits = 32,
  42. .reg_stride = 4,
  43. .val_bits = 32,
  44. .volatile_reg = fsl_dcu_drm_is_volatile_reg,
  45. };
  46. static void fsl_dcu_irq_uninstall(struct drm_device *dev)
  47. {
  48. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  49. regmap_write(fsl_dev->regmap, DCU_INT_STATUS, ~0);
  50. regmap_write(fsl_dev->regmap, DCU_INT_MASK, ~0);
  51. }
  52. static int fsl_dcu_load(struct drm_device *dev, unsigned long flags)
  53. {
  54. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  55. int ret;
  56. ret = fsl_dcu_drm_modeset_init(fsl_dev);
  57. if (ret < 0) {
  58. dev_err(dev->dev, "failed to initialize mode setting\n");
  59. return ret;
  60. }
  61. ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
  62. if (ret < 0) {
  63. dev_err(dev->dev, "failed to initialize vblank\n");
  64. goto done;
  65. }
  66. ret = drm_irq_install(dev, fsl_dev->irq);
  67. if (ret < 0) {
  68. dev_err(dev->dev, "failed to install IRQ handler\n");
  69. goto done;
  70. }
  71. if (legacyfb_depth != 16 && legacyfb_depth != 24 &&
  72. legacyfb_depth != 32) {
  73. dev_warn(dev->dev,
  74. "Invalid legacyfb_depth. Defaulting to 24bpp\n");
  75. legacyfb_depth = 24;
  76. }
  77. fsl_dev->fbdev = drm_fbdev_cma_init(dev, legacyfb_depth, 1);
  78. if (IS_ERR(fsl_dev->fbdev)) {
  79. ret = PTR_ERR(fsl_dev->fbdev);
  80. fsl_dev->fbdev = NULL;
  81. goto done;
  82. }
  83. return 0;
  84. done:
  85. drm_kms_helper_poll_fini(dev);
  86. if (fsl_dev->fbdev)
  87. drm_fbdev_cma_fini(fsl_dev->fbdev);
  88. drm_mode_config_cleanup(dev);
  89. drm_irq_uninstall(dev);
  90. dev->dev_private = NULL;
  91. return ret;
  92. }
  93. static void fsl_dcu_unload(struct drm_device *dev)
  94. {
  95. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  96. drm_atomic_helper_shutdown(dev);
  97. drm_kms_helper_poll_fini(dev);
  98. if (fsl_dev->fbdev)
  99. drm_fbdev_cma_fini(fsl_dev->fbdev);
  100. drm_mode_config_cleanup(dev);
  101. drm_irq_uninstall(dev);
  102. dev->dev_private = NULL;
  103. }
  104. static irqreturn_t fsl_dcu_drm_irq(int irq, void *arg)
  105. {
  106. struct drm_device *dev = arg;
  107. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  108. unsigned int int_status;
  109. int ret;
  110. ret = regmap_read(fsl_dev->regmap, DCU_INT_STATUS, &int_status);
  111. if (ret) {
  112. dev_err(dev->dev, "read DCU_INT_STATUS failed\n");
  113. return IRQ_NONE;
  114. }
  115. if (int_status & DCU_INT_STATUS_VBLANK)
  116. drm_handle_vblank(dev, 0);
  117. regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status);
  118. return IRQ_HANDLED;
  119. }
  120. static void fsl_dcu_drm_lastclose(struct drm_device *dev)
  121. {
  122. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  123. drm_fbdev_cma_restore_mode(fsl_dev->fbdev);
  124. }
  125. DEFINE_DRM_GEM_CMA_FOPS(fsl_dcu_drm_fops);
  126. static struct drm_driver fsl_dcu_drm_driver = {
  127. .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET
  128. | DRIVER_PRIME | DRIVER_ATOMIC,
  129. .lastclose = fsl_dcu_drm_lastclose,
  130. .load = fsl_dcu_load,
  131. .unload = fsl_dcu_unload,
  132. .irq_handler = fsl_dcu_drm_irq,
  133. .irq_preinstall = fsl_dcu_irq_uninstall,
  134. .irq_uninstall = fsl_dcu_irq_uninstall,
  135. .gem_free_object_unlocked = drm_gem_cma_free_object,
  136. .gem_vm_ops = &drm_gem_cma_vm_ops,
  137. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  138. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  139. .gem_prime_import = drm_gem_prime_import,
  140. .gem_prime_export = drm_gem_prime_export,
  141. .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
  142. .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
  143. .gem_prime_vmap = drm_gem_cma_prime_vmap,
  144. .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
  145. .gem_prime_mmap = drm_gem_cma_prime_mmap,
  146. .dumb_create = drm_gem_cma_dumb_create,
  147. .fops = &fsl_dcu_drm_fops,
  148. .name = "fsl-dcu-drm",
  149. .desc = "Freescale DCU DRM",
  150. .date = "20160425",
  151. .major = 1,
  152. .minor = 1,
  153. };
  154. #ifdef CONFIG_PM_SLEEP
  155. static int fsl_dcu_drm_pm_suspend(struct device *dev)
  156. {
  157. struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
  158. int ret;
  159. if (!fsl_dev)
  160. return 0;
  161. disable_irq(fsl_dev->irq);
  162. ret = drm_mode_config_helper_suspend(fsl_dev->drm);
  163. if (ret) {
  164. enable_irq(fsl_dev->irq);
  165. return ret;
  166. }
  167. clk_disable_unprepare(fsl_dev->clk);
  168. return 0;
  169. }
  170. static int fsl_dcu_drm_pm_resume(struct device *dev)
  171. {
  172. struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
  173. int ret;
  174. if (!fsl_dev)
  175. return 0;
  176. ret = clk_prepare_enable(fsl_dev->clk);
  177. if (ret < 0) {
  178. dev_err(dev, "failed to enable dcu clk\n");
  179. return ret;
  180. }
  181. if (fsl_dev->tcon)
  182. fsl_tcon_bypass_enable(fsl_dev->tcon);
  183. fsl_dcu_drm_init_planes(fsl_dev->drm);
  184. enable_irq(fsl_dev->irq);
  185. drm_mode_config_helper_resume(fsl_dev->drm);
  186. return 0;
  187. }
  188. #endif
  189. static const struct dev_pm_ops fsl_dcu_drm_pm_ops = {
  190. SET_SYSTEM_SLEEP_PM_OPS(fsl_dcu_drm_pm_suspend, fsl_dcu_drm_pm_resume)
  191. };
  192. static const struct fsl_dcu_soc_data fsl_dcu_ls1021a_data = {
  193. .name = "ls1021a",
  194. .total_layer = 16,
  195. .max_layer = 4,
  196. .layer_regs = LS1021A_LAYER_REG_NUM,
  197. };
  198. static const struct fsl_dcu_soc_data fsl_dcu_vf610_data = {
  199. .name = "vf610",
  200. .total_layer = 64,
  201. .max_layer = 6,
  202. .layer_regs = VF610_LAYER_REG_NUM,
  203. };
  204. static const struct of_device_id fsl_dcu_of_match[] = {
  205. {
  206. .compatible = "fsl,ls1021a-dcu",
  207. .data = &fsl_dcu_ls1021a_data,
  208. }, {
  209. .compatible = "fsl,vf610-dcu",
  210. .data = &fsl_dcu_vf610_data,
  211. }, {
  212. },
  213. };
  214. MODULE_DEVICE_TABLE(of, fsl_dcu_of_match);
  215. static int fsl_dcu_drm_probe(struct platform_device *pdev)
  216. {
  217. struct fsl_dcu_drm_device *fsl_dev;
  218. struct drm_device *drm;
  219. struct device *dev = &pdev->dev;
  220. struct resource *res;
  221. void __iomem *base;
  222. struct drm_driver *driver = &fsl_dcu_drm_driver;
  223. struct clk *pix_clk_in;
  224. char pix_clk_name[32];
  225. const char *pix_clk_in_name;
  226. const struct of_device_id *id;
  227. int ret;
  228. u8 div_ratio_shift = 0;
  229. fsl_dev = devm_kzalloc(dev, sizeof(*fsl_dev), GFP_KERNEL);
  230. if (!fsl_dev)
  231. return -ENOMEM;
  232. id = of_match_node(fsl_dcu_of_match, pdev->dev.of_node);
  233. if (!id)
  234. return -ENODEV;
  235. fsl_dev->soc = id->data;
  236. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  237. base = devm_ioremap_resource(dev, res);
  238. if (IS_ERR(base)) {
  239. ret = PTR_ERR(base);
  240. return ret;
  241. }
  242. fsl_dev->irq = platform_get_irq(pdev, 0);
  243. if (fsl_dev->irq < 0) {
  244. dev_err(dev, "failed to get irq\n");
  245. return fsl_dev->irq;
  246. }
  247. fsl_dev->regmap = devm_regmap_init_mmio(dev, base,
  248. &fsl_dcu_regmap_config);
  249. if (IS_ERR(fsl_dev->regmap)) {
  250. dev_err(dev, "regmap init failed\n");
  251. return PTR_ERR(fsl_dev->regmap);
  252. }
  253. fsl_dev->clk = devm_clk_get(dev, "dcu");
  254. if (IS_ERR(fsl_dev->clk)) {
  255. dev_err(dev, "failed to get dcu clock\n");
  256. return PTR_ERR(fsl_dev->clk);
  257. }
  258. ret = clk_prepare_enable(fsl_dev->clk);
  259. if (ret < 0) {
  260. dev_err(dev, "failed to enable dcu clk\n");
  261. return ret;
  262. }
  263. pix_clk_in = devm_clk_get(dev, "pix");
  264. if (IS_ERR(pix_clk_in)) {
  265. /* legancy binding, use dcu clock as pixel clock input */
  266. pix_clk_in = fsl_dev->clk;
  267. }
  268. if (of_property_read_bool(dev->of_node, "big-endian"))
  269. div_ratio_shift = 24;
  270. pix_clk_in_name = __clk_get_name(pix_clk_in);
  271. snprintf(pix_clk_name, sizeof(pix_clk_name), "%s_pix", pix_clk_in_name);
  272. fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name,
  273. pix_clk_in_name, 0, base + DCU_DIV_RATIO,
  274. div_ratio_shift, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL);
  275. if (IS_ERR(fsl_dev->pix_clk)) {
  276. dev_err(dev, "failed to register pix clk\n");
  277. ret = PTR_ERR(fsl_dev->pix_clk);
  278. goto disable_clk;
  279. }
  280. fsl_dev->tcon = fsl_tcon_init(dev);
  281. drm = drm_dev_alloc(driver, dev);
  282. if (IS_ERR(drm)) {
  283. ret = PTR_ERR(drm);
  284. goto unregister_pix_clk;
  285. }
  286. fsl_dev->dev = dev;
  287. fsl_dev->drm = drm;
  288. fsl_dev->np = dev->of_node;
  289. drm->dev_private = fsl_dev;
  290. dev_set_drvdata(dev, fsl_dev);
  291. ret = drm_dev_register(drm, 0);
  292. if (ret < 0)
  293. goto unref;
  294. return 0;
  295. unref:
  296. drm_dev_unref(drm);
  297. unregister_pix_clk:
  298. clk_unregister(fsl_dev->pix_clk);
  299. disable_clk:
  300. clk_disable_unprepare(fsl_dev->clk);
  301. return ret;
  302. }
  303. static int fsl_dcu_drm_remove(struct platform_device *pdev)
  304. {
  305. struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev);
  306. drm_dev_unregister(fsl_dev->drm);
  307. drm_dev_unref(fsl_dev->drm);
  308. clk_disable_unprepare(fsl_dev->clk);
  309. clk_unregister(fsl_dev->pix_clk);
  310. return 0;
  311. }
  312. static struct platform_driver fsl_dcu_drm_platform_driver = {
  313. .probe = fsl_dcu_drm_probe,
  314. .remove = fsl_dcu_drm_remove,
  315. .driver = {
  316. .name = "fsl-dcu",
  317. .pm = &fsl_dcu_drm_pm_ops,
  318. .of_match_table = fsl_dcu_of_match,
  319. },
  320. };
  321. module_platform_driver(fsl_dcu_drm_platform_driver);
  322. MODULE_DESCRIPTION("Freescale DCU DRM Driver");
  323. MODULE_LICENSE("GPL");