psb_intel_lvds.c 23 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828
  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * You should have received a copy of the GNU General Public License along with
  14. * this program; if not, write to the Free Software Foundation, Inc.,
  15. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  16. *
  17. * Authors:
  18. * Eric Anholt <eric@anholt.net>
  19. * Dave Airlie <airlied@linux.ie>
  20. * Jesse Barnes <jesse.barnes@intel.com>
  21. */
  22. #include <linux/i2c.h>
  23. #include <drm/drmP.h>
  24. #include "intel_bios.h"
  25. #include "psb_drv.h"
  26. #include "psb_intel_drv.h"
  27. #include "psb_intel_reg.h"
  28. #include "power.h"
  29. #include <linux/pm_runtime.h>
  30. /*
  31. * LVDS I2C backlight control macros
  32. */
  33. #define BRIGHTNESS_MAX_LEVEL 100
  34. #define BRIGHTNESS_MASK 0xFF
  35. #define BLC_I2C_TYPE 0x01
  36. #define BLC_PWM_TYPT 0x02
  37. #define BLC_POLARITY_NORMAL 0
  38. #define BLC_POLARITY_INVERSE 1
  39. #define PSB_BLC_MAX_PWM_REG_FREQ (0xFFFE)
  40. #define PSB_BLC_MIN_PWM_REG_FREQ (0x2)
  41. #define PSB_BLC_PWM_PRECISION_FACTOR (10)
  42. #define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
  43. #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
  44. struct psb_intel_lvds_priv {
  45. /*
  46. * Saved LVDO output states
  47. */
  48. uint32_t savePP_ON;
  49. uint32_t savePP_OFF;
  50. uint32_t saveLVDS;
  51. uint32_t savePP_CONTROL;
  52. uint32_t savePP_CYCLE;
  53. uint32_t savePFIT_CONTROL;
  54. uint32_t savePFIT_PGM_RATIOS;
  55. uint32_t saveBLC_PWM_CTL;
  56. struct psb_intel_i2c_chan *i2c_bus;
  57. struct psb_intel_i2c_chan *ddc_bus;
  58. };
  59. /*
  60. * Returns the maximum level of the backlight duty cycle field.
  61. */
  62. static u32 psb_intel_lvds_get_max_backlight(struct drm_device *dev)
  63. {
  64. struct drm_psb_private *dev_priv = dev->dev_private;
  65. u32 ret;
  66. if (gma_power_begin(dev, false)) {
  67. ret = REG_READ(BLC_PWM_CTL);
  68. gma_power_end(dev);
  69. } else /* Powered off, use the saved value */
  70. ret = dev_priv->regs.saveBLC_PWM_CTL;
  71. /* Top 15bits hold the frequency mask */
  72. ret = (ret & BACKLIGHT_MODULATION_FREQ_MASK) >>
  73. BACKLIGHT_MODULATION_FREQ_SHIFT;
  74. ret *= 2; /* Return a 16bit range as needed for setting */
  75. if (ret == 0)
  76. dev_err(dev->dev, "BL bug: Reg %08x save %08X\n",
  77. REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL);
  78. return ret;
  79. }
  80. /*
  81. * Set LVDS backlight level by I2C command
  82. *
  83. * FIXME: at some point we need to both track this for PM and also
  84. * disable runtime pm on MRST if the brightness is nil (ie blanked)
  85. */
  86. static int psb_lvds_i2c_set_brightness(struct drm_device *dev,
  87. unsigned int level)
  88. {
  89. struct drm_psb_private *dev_priv =
  90. (struct drm_psb_private *)dev->dev_private;
  91. struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
  92. u8 out_buf[2];
  93. unsigned int blc_i2c_brightness;
  94. struct i2c_msg msgs[] = {
  95. {
  96. .addr = lvds_i2c_bus->slave_addr,
  97. .flags = 0,
  98. .len = 2,
  99. .buf = out_buf,
  100. }
  101. };
  102. blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
  103. BRIGHTNESS_MASK /
  104. BRIGHTNESS_MAX_LEVEL);
  105. if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
  106. blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
  107. out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
  108. out_buf[1] = (u8)blc_i2c_brightness;
  109. if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1) {
  110. dev_dbg(dev->dev, "I2C set brightness.(command, value) (%d, %d)\n",
  111. dev_priv->lvds_bl->brightnesscmd,
  112. blc_i2c_brightness);
  113. return 0;
  114. }
  115. dev_err(dev->dev, "I2C transfer error\n");
  116. return -1;
  117. }
  118. static int psb_lvds_pwm_set_brightness(struct drm_device *dev, int level)
  119. {
  120. struct drm_psb_private *dev_priv =
  121. (struct drm_psb_private *)dev->dev_private;
  122. u32 max_pwm_blc;
  123. u32 blc_pwm_duty_cycle;
  124. max_pwm_blc = psb_intel_lvds_get_max_backlight(dev);
  125. /*BLC_PWM_CTL Should be initiated while backlight device init*/
  126. BUG_ON(max_pwm_blc == 0);
  127. blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
  128. if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
  129. blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
  130. blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
  131. REG_WRITE(BLC_PWM_CTL,
  132. (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
  133. (blc_pwm_duty_cycle));
  134. dev_info(dev->dev, "Backlight lvds set brightness %08x\n",
  135. (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
  136. (blc_pwm_duty_cycle));
  137. return 0;
  138. }
  139. /*
  140. * Set LVDS backlight level either by I2C or PWM
  141. */
  142. void psb_intel_lvds_set_brightness(struct drm_device *dev, int level)
  143. {
  144. struct drm_psb_private *dev_priv = dev->dev_private;
  145. dev_dbg(dev->dev, "backlight level is %d\n", level);
  146. if (!dev_priv->lvds_bl) {
  147. dev_err(dev->dev, "NO LVDS backlight info\n");
  148. return;
  149. }
  150. if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
  151. psb_lvds_i2c_set_brightness(dev, level);
  152. else
  153. psb_lvds_pwm_set_brightness(dev, level);
  154. }
  155. /*
  156. * Sets the backlight level.
  157. *
  158. * level: backlight level, from 0 to psb_intel_lvds_get_max_backlight().
  159. */
  160. static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level)
  161. {
  162. struct drm_psb_private *dev_priv = dev->dev_private;
  163. u32 blc_pwm_ctl;
  164. if (gma_power_begin(dev, false)) {
  165. blc_pwm_ctl = REG_READ(BLC_PWM_CTL);
  166. blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
  167. REG_WRITE(BLC_PWM_CTL,
  168. (blc_pwm_ctl |
  169. (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
  170. dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
  171. (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
  172. gma_power_end(dev);
  173. } else {
  174. blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
  175. ~BACKLIGHT_DUTY_CYCLE_MASK;
  176. dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
  177. (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
  178. }
  179. }
  180. /*
  181. * Sets the power state for the panel.
  182. */
  183. static void psb_intel_lvds_set_power(struct drm_device *dev, bool on)
  184. {
  185. struct drm_psb_private *dev_priv = dev->dev_private;
  186. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  187. u32 pp_status;
  188. if (!gma_power_begin(dev, true)) {
  189. dev_err(dev->dev, "set power, chip off!\n");
  190. return;
  191. }
  192. if (on) {
  193. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
  194. POWER_TARGET_ON);
  195. do {
  196. pp_status = REG_READ(PP_STATUS);
  197. } while ((pp_status & PP_ON) == 0);
  198. psb_intel_lvds_set_backlight(dev,
  199. mode_dev->backlight_duty_cycle);
  200. } else {
  201. psb_intel_lvds_set_backlight(dev, 0);
  202. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
  203. ~POWER_TARGET_ON);
  204. do {
  205. pp_status = REG_READ(PP_STATUS);
  206. } while (pp_status & PP_ON);
  207. }
  208. gma_power_end(dev);
  209. }
  210. static void psb_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
  211. {
  212. struct drm_device *dev = encoder->dev;
  213. if (mode == DRM_MODE_DPMS_ON)
  214. psb_intel_lvds_set_power(dev, true);
  215. else
  216. psb_intel_lvds_set_power(dev, false);
  217. /* XXX: We never power down the LVDS pairs. */
  218. }
  219. static void psb_intel_lvds_save(struct drm_connector *connector)
  220. {
  221. struct drm_device *dev = connector->dev;
  222. struct drm_psb_private *dev_priv =
  223. (struct drm_psb_private *)dev->dev_private;
  224. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  225. struct psb_intel_lvds_priv *lvds_priv =
  226. (struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
  227. lvds_priv->savePP_ON = REG_READ(LVDSPP_ON);
  228. lvds_priv->savePP_OFF = REG_READ(LVDSPP_OFF);
  229. lvds_priv->saveLVDS = REG_READ(LVDS);
  230. lvds_priv->savePP_CONTROL = REG_READ(PP_CONTROL);
  231. lvds_priv->savePP_CYCLE = REG_READ(PP_CYCLE);
  232. /*lvds_priv->savePP_DIVISOR = REG_READ(PP_DIVISOR);*/
  233. lvds_priv->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
  234. lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL);
  235. lvds_priv->savePFIT_PGM_RATIOS = REG_READ(PFIT_PGM_RATIOS);
  236. /*TODO: move backlight_duty_cycle to psb_intel_lvds_priv*/
  237. dev_priv->backlight_duty_cycle = (dev_priv->regs.saveBLC_PWM_CTL &
  238. BACKLIGHT_DUTY_CYCLE_MASK);
  239. /*
  240. * If the light is off at server startup,
  241. * just make it full brightness
  242. */
  243. if (dev_priv->backlight_duty_cycle == 0)
  244. dev_priv->backlight_duty_cycle =
  245. psb_intel_lvds_get_max_backlight(dev);
  246. dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
  247. lvds_priv->savePP_ON,
  248. lvds_priv->savePP_OFF,
  249. lvds_priv->saveLVDS,
  250. lvds_priv->savePP_CONTROL,
  251. lvds_priv->savePP_CYCLE,
  252. lvds_priv->saveBLC_PWM_CTL);
  253. }
  254. static void psb_intel_lvds_restore(struct drm_connector *connector)
  255. {
  256. struct drm_device *dev = connector->dev;
  257. u32 pp_status;
  258. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  259. struct psb_intel_lvds_priv *lvds_priv =
  260. (struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
  261. dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
  262. lvds_priv->savePP_ON,
  263. lvds_priv->savePP_OFF,
  264. lvds_priv->saveLVDS,
  265. lvds_priv->savePP_CONTROL,
  266. lvds_priv->savePP_CYCLE,
  267. lvds_priv->saveBLC_PWM_CTL);
  268. REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL);
  269. REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL);
  270. REG_WRITE(PFIT_PGM_RATIOS, lvds_priv->savePFIT_PGM_RATIOS);
  271. REG_WRITE(LVDSPP_ON, lvds_priv->savePP_ON);
  272. REG_WRITE(LVDSPP_OFF, lvds_priv->savePP_OFF);
  273. /*REG_WRITE(PP_DIVISOR, lvds_priv->savePP_DIVISOR);*/
  274. REG_WRITE(PP_CYCLE, lvds_priv->savePP_CYCLE);
  275. REG_WRITE(PP_CONTROL, lvds_priv->savePP_CONTROL);
  276. REG_WRITE(LVDS, lvds_priv->saveLVDS);
  277. if (lvds_priv->savePP_CONTROL & POWER_TARGET_ON) {
  278. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
  279. POWER_TARGET_ON);
  280. do {
  281. pp_status = REG_READ(PP_STATUS);
  282. } while ((pp_status & PP_ON) == 0);
  283. } else {
  284. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
  285. ~POWER_TARGET_ON);
  286. do {
  287. pp_status = REG_READ(PP_STATUS);
  288. } while (pp_status & PP_ON);
  289. }
  290. }
  291. enum drm_mode_status psb_intel_lvds_mode_valid(struct drm_connector *connector,
  292. struct drm_display_mode *mode)
  293. {
  294. struct drm_psb_private *dev_priv = connector->dev->dev_private;
  295. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  296. struct drm_display_mode *fixed_mode =
  297. dev_priv->mode_dev.panel_fixed_mode;
  298. if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
  299. fixed_mode = dev_priv->mode_dev.panel_fixed_mode2;
  300. /* just in case */
  301. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  302. return MODE_NO_DBLESCAN;
  303. /* just in case */
  304. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  305. return MODE_NO_INTERLACE;
  306. if (fixed_mode) {
  307. if (mode->hdisplay > fixed_mode->hdisplay)
  308. return MODE_PANEL;
  309. if (mode->vdisplay > fixed_mode->vdisplay)
  310. return MODE_PANEL;
  311. }
  312. return MODE_OK;
  313. }
  314. bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder,
  315. const struct drm_display_mode *mode,
  316. struct drm_display_mode *adjusted_mode)
  317. {
  318. struct drm_device *dev = encoder->dev;
  319. struct drm_psb_private *dev_priv = dev->dev_private;
  320. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  321. struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
  322. struct drm_encoder *tmp_encoder;
  323. struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
  324. struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
  325. if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
  326. panel_fixed_mode = mode_dev->panel_fixed_mode2;
  327. /* PSB requires the LVDS is on pipe B, MRST has only one pipe anyway */
  328. if (!IS_MRST(dev) && gma_crtc->pipe == 0) {
  329. pr_err("Can't support LVDS on pipe A\n");
  330. return false;
  331. }
  332. if (IS_MRST(dev) && gma_crtc->pipe != 0) {
  333. pr_err("Must use PIPE A\n");
  334. return false;
  335. }
  336. /* Should never happen!! */
  337. list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
  338. head) {
  339. if (tmp_encoder != encoder
  340. && tmp_encoder->crtc == encoder->crtc) {
  341. pr_err("Can't enable LVDS and another encoder on the same pipe\n");
  342. return false;
  343. }
  344. }
  345. /*
  346. * If we have timings from the BIOS for the panel, put them in
  347. * to the adjusted mode. The CRTC will be set up for this mode,
  348. * with the panel scaling set up to source from the H/VDisplay
  349. * of the original mode.
  350. */
  351. if (panel_fixed_mode != NULL) {
  352. adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
  353. adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
  354. adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
  355. adjusted_mode->htotal = panel_fixed_mode->htotal;
  356. adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
  357. adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
  358. adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
  359. adjusted_mode->vtotal = panel_fixed_mode->vtotal;
  360. adjusted_mode->clock = panel_fixed_mode->clock;
  361. drm_mode_set_crtcinfo(adjusted_mode,
  362. CRTC_INTERLACE_HALVE_V);
  363. }
  364. /*
  365. * XXX: It would be nice to support lower refresh rates on the
  366. * panels to reduce power consumption, and perhaps match the
  367. * user's requested refresh rate.
  368. */
  369. return true;
  370. }
  371. static void psb_intel_lvds_prepare(struct drm_encoder *encoder)
  372. {
  373. struct drm_device *dev = encoder->dev;
  374. struct drm_psb_private *dev_priv = dev->dev_private;
  375. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  376. if (!gma_power_begin(dev, true))
  377. return;
  378. mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
  379. mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
  380. BACKLIGHT_DUTY_CYCLE_MASK);
  381. psb_intel_lvds_set_power(dev, false);
  382. gma_power_end(dev);
  383. }
  384. static void psb_intel_lvds_commit(struct drm_encoder *encoder)
  385. {
  386. struct drm_device *dev = encoder->dev;
  387. struct drm_psb_private *dev_priv = dev->dev_private;
  388. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  389. if (mode_dev->backlight_duty_cycle == 0)
  390. mode_dev->backlight_duty_cycle =
  391. psb_intel_lvds_get_max_backlight(dev);
  392. psb_intel_lvds_set_power(dev, true);
  393. }
  394. static void psb_intel_lvds_mode_set(struct drm_encoder *encoder,
  395. struct drm_display_mode *mode,
  396. struct drm_display_mode *adjusted_mode)
  397. {
  398. struct drm_device *dev = encoder->dev;
  399. struct drm_psb_private *dev_priv = dev->dev_private;
  400. u32 pfit_control;
  401. /*
  402. * The LVDS pin pair will already have been turned on in the
  403. * psb_intel_crtc_mode_set since it has a large impact on the DPLL
  404. * settings.
  405. */
  406. /*
  407. * Enable automatic panel scaling so that non-native modes fill the
  408. * screen. Should be enabled before the pipe is enabled, according to
  409. * register description and PRM.
  410. */
  411. if (mode->hdisplay != adjusted_mode->hdisplay ||
  412. mode->vdisplay != adjusted_mode->vdisplay)
  413. pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
  414. HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
  415. HORIZ_INTERP_BILINEAR);
  416. else
  417. pfit_control = 0;
  418. if (dev_priv->lvds_dither)
  419. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  420. REG_WRITE(PFIT_CONTROL, pfit_control);
  421. }
  422. /*
  423. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  424. */
  425. static int psb_intel_lvds_get_modes(struct drm_connector *connector)
  426. {
  427. struct drm_device *dev = connector->dev;
  428. struct drm_psb_private *dev_priv = dev->dev_private;
  429. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  430. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  431. struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv;
  432. int ret = 0;
  433. if (!IS_MRST(dev))
  434. ret = psb_intel_ddc_get_modes(connector, &lvds_priv->i2c_bus->adapter);
  435. if (ret)
  436. return ret;
  437. if (mode_dev->panel_fixed_mode != NULL) {
  438. struct drm_display_mode *mode =
  439. drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
  440. drm_mode_probed_add(connector, mode);
  441. return 1;
  442. }
  443. return 0;
  444. }
  445. /**
  446. * psb_intel_lvds_destroy - unregister and free LVDS structures
  447. * @connector: connector to free
  448. *
  449. * Unregister the DDC bus for this connector then free the driver private
  450. * structure.
  451. */
  452. void psb_intel_lvds_destroy(struct drm_connector *connector)
  453. {
  454. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  455. struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv;
  456. psb_intel_i2c_destroy(lvds_priv->ddc_bus);
  457. drm_connector_unregister(connector);
  458. drm_connector_cleanup(connector);
  459. kfree(connector);
  460. }
  461. int psb_intel_lvds_set_property(struct drm_connector *connector,
  462. struct drm_property *property,
  463. uint64_t value)
  464. {
  465. struct drm_encoder *encoder = connector->encoder;
  466. if (!encoder)
  467. return -1;
  468. if (!strcmp(property->name, "scaling mode")) {
  469. struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
  470. uint64_t curval;
  471. if (!crtc)
  472. goto set_prop_error;
  473. switch (value) {
  474. case DRM_MODE_SCALE_FULLSCREEN:
  475. break;
  476. case DRM_MODE_SCALE_NO_SCALE:
  477. break;
  478. case DRM_MODE_SCALE_ASPECT:
  479. break;
  480. default:
  481. goto set_prop_error;
  482. }
  483. if (drm_object_property_get_value(&connector->base,
  484. property,
  485. &curval))
  486. goto set_prop_error;
  487. if (curval == value)
  488. goto set_prop_done;
  489. if (drm_object_property_set_value(&connector->base,
  490. property,
  491. value))
  492. goto set_prop_error;
  493. if (crtc->saved_mode.hdisplay != 0 &&
  494. crtc->saved_mode.vdisplay != 0) {
  495. if (!drm_crtc_helper_set_mode(encoder->crtc,
  496. &crtc->saved_mode,
  497. encoder->crtc->x,
  498. encoder->crtc->y,
  499. encoder->crtc->primary->fb))
  500. goto set_prop_error;
  501. }
  502. } else if (!strcmp(property->name, "backlight")) {
  503. if (drm_object_property_set_value(&connector->base,
  504. property,
  505. value))
  506. goto set_prop_error;
  507. else
  508. gma_backlight_set(encoder->dev, value);
  509. } else if (!strcmp(property->name, "DPMS")) {
  510. const struct drm_encoder_helper_funcs *hfuncs
  511. = encoder->helper_private;
  512. hfuncs->dpms(encoder, value);
  513. }
  514. set_prop_done:
  515. return 0;
  516. set_prop_error:
  517. return -1;
  518. }
  519. static const struct drm_encoder_helper_funcs psb_intel_lvds_helper_funcs = {
  520. .dpms = psb_intel_lvds_encoder_dpms,
  521. .mode_fixup = psb_intel_lvds_mode_fixup,
  522. .prepare = psb_intel_lvds_prepare,
  523. .mode_set = psb_intel_lvds_mode_set,
  524. .commit = psb_intel_lvds_commit,
  525. };
  526. const struct drm_connector_helper_funcs
  527. psb_intel_lvds_connector_helper_funcs = {
  528. .get_modes = psb_intel_lvds_get_modes,
  529. .mode_valid = psb_intel_lvds_mode_valid,
  530. .best_encoder = gma_best_encoder,
  531. };
  532. const struct drm_connector_funcs psb_intel_lvds_connector_funcs = {
  533. .dpms = drm_helper_connector_dpms,
  534. .fill_modes = drm_helper_probe_single_connector_modes,
  535. .set_property = psb_intel_lvds_set_property,
  536. .destroy = psb_intel_lvds_destroy,
  537. };
  538. static void psb_intel_lvds_enc_destroy(struct drm_encoder *encoder)
  539. {
  540. drm_encoder_cleanup(encoder);
  541. }
  542. const struct drm_encoder_funcs psb_intel_lvds_enc_funcs = {
  543. .destroy = psb_intel_lvds_enc_destroy,
  544. };
  545. /**
  546. * psb_intel_lvds_init - setup LVDS connectors on this device
  547. * @dev: drm device
  548. *
  549. * Create the connector, register the LVDS DDC bus, and try to figure out what
  550. * modes we can display on the LVDS panel (if present).
  551. */
  552. void psb_intel_lvds_init(struct drm_device *dev,
  553. struct psb_intel_mode_device *mode_dev)
  554. {
  555. struct gma_encoder *gma_encoder;
  556. struct gma_connector *gma_connector;
  557. struct psb_intel_lvds_priv *lvds_priv;
  558. struct drm_connector *connector;
  559. struct drm_encoder *encoder;
  560. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  561. struct drm_crtc *crtc;
  562. struct drm_psb_private *dev_priv = dev->dev_private;
  563. u32 lvds;
  564. int pipe;
  565. gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
  566. if (!gma_encoder) {
  567. dev_err(dev->dev, "gma_encoder allocation error\n");
  568. return;
  569. }
  570. gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
  571. if (!gma_connector) {
  572. dev_err(dev->dev, "gma_connector allocation error\n");
  573. goto failed_encoder;
  574. }
  575. lvds_priv = kzalloc(sizeof(struct psb_intel_lvds_priv), GFP_KERNEL);
  576. if (!lvds_priv) {
  577. dev_err(dev->dev, "LVDS private allocation error\n");
  578. goto failed_connector;
  579. }
  580. gma_encoder->dev_priv = lvds_priv;
  581. connector = &gma_connector->base;
  582. gma_connector->save = psb_intel_lvds_save;
  583. gma_connector->restore = psb_intel_lvds_restore;
  584. encoder = &gma_encoder->base;
  585. drm_connector_init(dev, connector,
  586. &psb_intel_lvds_connector_funcs,
  587. DRM_MODE_CONNECTOR_LVDS);
  588. drm_encoder_init(dev, encoder,
  589. &psb_intel_lvds_enc_funcs,
  590. DRM_MODE_ENCODER_LVDS, NULL);
  591. gma_connector_attach_encoder(gma_connector, gma_encoder);
  592. gma_encoder->type = INTEL_OUTPUT_LVDS;
  593. drm_encoder_helper_add(encoder, &psb_intel_lvds_helper_funcs);
  594. drm_connector_helper_add(connector,
  595. &psb_intel_lvds_connector_helper_funcs);
  596. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  597. connector->interlace_allowed = false;
  598. connector->doublescan_allowed = false;
  599. /*Attach connector properties*/
  600. drm_object_attach_property(&connector->base,
  601. dev->mode_config.scaling_mode_property,
  602. DRM_MODE_SCALE_FULLSCREEN);
  603. drm_object_attach_property(&connector->base,
  604. dev_priv->backlight_property,
  605. BRIGHTNESS_MAX_LEVEL);
  606. /*
  607. * Set up I2C bus
  608. * FIXME: distroy i2c_bus when exit
  609. */
  610. lvds_priv->i2c_bus = psb_intel_i2c_create(dev, GPIOB, "LVDSBLC_B");
  611. if (!lvds_priv->i2c_bus) {
  612. dev_printk(KERN_ERR,
  613. &dev->pdev->dev, "I2C bus registration failed.\n");
  614. goto failed_blc_i2c;
  615. }
  616. lvds_priv->i2c_bus->slave_addr = 0x2C;
  617. dev_priv->lvds_i2c_bus = lvds_priv->i2c_bus;
  618. /*
  619. * LVDS discovery:
  620. * 1) check for EDID on DDC
  621. * 2) check for VBT data
  622. * 3) check to see if LVDS is already on
  623. * if none of the above, no panel
  624. * 4) make sure lid is open
  625. * if closed, act like it's not there for now
  626. */
  627. /* Set up the DDC bus. */
  628. lvds_priv->ddc_bus = psb_intel_i2c_create(dev, GPIOC, "LVDSDDC_C");
  629. if (!lvds_priv->ddc_bus) {
  630. dev_printk(KERN_ERR, &dev->pdev->dev,
  631. "DDC bus registration " "failed.\n");
  632. goto failed_ddc;
  633. }
  634. /*
  635. * Attempt to get the fixed panel mode from DDC. Assume that the
  636. * preferred mode is the right one.
  637. */
  638. mutex_lock(&dev->mode_config.mutex);
  639. psb_intel_ddc_get_modes(connector, &lvds_priv->ddc_bus->adapter);
  640. list_for_each_entry(scan, &connector->probed_modes, head) {
  641. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  642. mode_dev->panel_fixed_mode =
  643. drm_mode_duplicate(dev, scan);
  644. DRM_DEBUG_KMS("Using mode from DDC\n");
  645. goto out; /* FIXME: check for quirks */
  646. }
  647. }
  648. /* Failed to get EDID, what about VBT? do we need this? */
  649. if (dev_priv->lfp_lvds_vbt_mode) {
  650. mode_dev->panel_fixed_mode =
  651. drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  652. if (mode_dev->panel_fixed_mode) {
  653. mode_dev->panel_fixed_mode->type |=
  654. DRM_MODE_TYPE_PREFERRED;
  655. DRM_DEBUG_KMS("Using mode from VBT\n");
  656. goto out;
  657. }
  658. }
  659. /*
  660. * If we didn't get EDID, try checking if the panel is already turned
  661. * on. If so, assume that whatever is currently programmed is the
  662. * correct mode.
  663. */
  664. lvds = REG_READ(LVDS);
  665. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  666. crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
  667. if (crtc && (lvds & LVDS_PORT_EN)) {
  668. mode_dev->panel_fixed_mode =
  669. psb_intel_crtc_mode_get(dev, crtc);
  670. if (mode_dev->panel_fixed_mode) {
  671. mode_dev->panel_fixed_mode->type |=
  672. DRM_MODE_TYPE_PREFERRED;
  673. DRM_DEBUG_KMS("Using pre-programmed mode\n");
  674. goto out; /* FIXME: check for quirks */
  675. }
  676. }
  677. /* If we still don't have a mode after all that, give up. */
  678. if (!mode_dev->panel_fixed_mode) {
  679. dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n");
  680. goto failed_find;
  681. }
  682. /*
  683. * Blacklist machines with BIOSes that list an LVDS panel without
  684. * actually having one.
  685. */
  686. out:
  687. mutex_unlock(&dev->mode_config.mutex);
  688. drm_connector_register(connector);
  689. return;
  690. failed_find:
  691. mutex_unlock(&dev->mode_config.mutex);
  692. psb_intel_i2c_destroy(lvds_priv->ddc_bus);
  693. failed_ddc:
  694. psb_intel_i2c_destroy(lvds_priv->i2c_bus);
  695. failed_blc_i2c:
  696. drm_encoder_cleanup(encoder);
  697. drm_connector_cleanup(connector);
  698. failed_connector:
  699. kfree(gma_connector);
  700. failed_encoder:
  701. kfree(gma_encoder);
  702. }