panel-samsung-s6e63j0x03.c 12 KB

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  1. /*
  2. * MIPI-DSI based S6E63J0X03 AMOLED lcd 1.63 inch panel driver.
  3. *
  4. * Copyright (c) 2014-2017 Samsung Electronics Co., Ltd
  5. *
  6. * Inki Dae <inki.dae@samsung.com>
  7. * Hoegeun Kwon <hoegeun.kwon@samsung.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <drm/drmP.h>
  14. #include <drm/drm_mipi_dsi.h>
  15. #include <drm/drm_panel.h>
  16. #include <linux/backlight.h>
  17. #include <linux/gpio/consumer.h>
  18. #include <linux/regulator/consumer.h>
  19. #include <video/mipi_display.h>
  20. #define MCS_LEVEL2_KEY 0xf0
  21. #define MCS_MTP_KEY 0xf1
  22. #define MCS_MTP_SET3 0xd4
  23. #define MAX_BRIGHTNESS 100
  24. #define DEFAULT_BRIGHTNESS 80
  25. #define NUM_GAMMA_STEPS 9
  26. #define GAMMA_CMD_CNT 28
  27. #define FIRST_COLUMN 20
  28. struct s6e63j0x03 {
  29. struct device *dev;
  30. struct drm_panel panel;
  31. struct backlight_device *bl_dev;
  32. struct regulator_bulk_data supplies[2];
  33. struct gpio_desc *reset_gpio;
  34. };
  35. static const struct drm_display_mode default_mode = {
  36. .clock = 4649,
  37. .hdisplay = 320,
  38. .hsync_start = 320 + 1,
  39. .hsync_end = 320 + 1 + 1,
  40. .htotal = 320 + 1 + 1 + 1,
  41. .vdisplay = 320,
  42. .vsync_start = 320 + 150,
  43. .vsync_end = 320 + 150 + 1,
  44. .vtotal = 320 + 150 + 1 + 2,
  45. .vrefresh = 30,
  46. .flags = 0,
  47. };
  48. static const unsigned char gamma_tbl[NUM_GAMMA_STEPS][GAMMA_CMD_CNT] = {
  49. { /* Gamma 10 */
  50. MCS_MTP_SET3,
  51. 0x00, 0x00, 0x00, 0x7f, 0x7f, 0x7f, 0x52, 0x6b, 0x6f, 0x26,
  52. 0x28, 0x2d, 0x28, 0x26, 0x27, 0x33, 0x34, 0x32, 0x36, 0x36,
  53. 0x35, 0x00, 0xab, 0x00, 0xae, 0x00, 0xbf
  54. },
  55. { /* gamma 30 */
  56. MCS_MTP_SET3,
  57. 0x00, 0x00, 0x00, 0x70, 0x7f, 0x7f, 0x4e, 0x64, 0x69, 0x26,
  58. 0x27, 0x2a, 0x28, 0x29, 0x27, 0x31, 0x32, 0x31, 0x35, 0x34,
  59. 0x35, 0x00, 0xc4, 0x00, 0xca, 0x00, 0xdc
  60. },
  61. { /* gamma 60 */
  62. MCS_MTP_SET3,
  63. 0x00, 0x00, 0x00, 0x65, 0x7b, 0x7d, 0x5f, 0x67, 0x68, 0x2a,
  64. 0x28, 0x29, 0x28, 0x2a, 0x27, 0x31, 0x2f, 0x30, 0x34, 0x33,
  65. 0x34, 0x00, 0xd9, 0x00, 0xe4, 0x00, 0xf5
  66. },
  67. { /* gamma 90 */
  68. MCS_MTP_SET3,
  69. 0x00, 0x00, 0x00, 0x4d, 0x6f, 0x71, 0x67, 0x6a, 0x6c, 0x29,
  70. 0x28, 0x28, 0x28, 0x29, 0x27, 0x30, 0x2e, 0x30, 0x32, 0x31,
  71. 0x31, 0x00, 0xea, 0x00, 0xf6, 0x01, 0x09
  72. },
  73. { /* gamma 120 */
  74. MCS_MTP_SET3,
  75. 0x00, 0x00, 0x00, 0x3d, 0x66, 0x68, 0x69, 0x69, 0x69, 0x28,
  76. 0x28, 0x27, 0x28, 0x28, 0x27, 0x30, 0x2e, 0x2f, 0x31, 0x31,
  77. 0x30, 0x00, 0xf9, 0x01, 0x05, 0x01, 0x1b
  78. },
  79. { /* gamma 150 */
  80. MCS_MTP_SET3,
  81. 0x00, 0x00, 0x00, 0x31, 0x51, 0x53, 0x66, 0x66, 0x67, 0x28,
  82. 0x29, 0x27, 0x28, 0x27, 0x27, 0x2e, 0x2d, 0x2e, 0x31, 0x31,
  83. 0x30, 0x01, 0x04, 0x01, 0x11, 0x01, 0x29
  84. },
  85. { /* gamma 200 */
  86. MCS_MTP_SET3,
  87. 0x00, 0x00, 0x00, 0x2f, 0x4f, 0x51, 0x67, 0x65, 0x65, 0x29,
  88. 0x2a, 0x28, 0x27, 0x25, 0x26, 0x2d, 0x2c, 0x2c, 0x30, 0x30,
  89. 0x30, 0x01, 0x14, 0x01, 0x23, 0x01, 0x3b
  90. },
  91. { /* gamma 240 */
  92. MCS_MTP_SET3,
  93. 0x00, 0x00, 0x00, 0x2c, 0x4d, 0x50, 0x65, 0x63, 0x64, 0x2a,
  94. 0x2c, 0x29, 0x26, 0x24, 0x25, 0x2c, 0x2b, 0x2b, 0x30, 0x30,
  95. 0x30, 0x01, 0x1e, 0x01, 0x2f, 0x01, 0x47
  96. },
  97. { /* gamma 300 */
  98. MCS_MTP_SET3,
  99. 0x00, 0x00, 0x00, 0x38, 0x61, 0x64, 0x65, 0x63, 0x64, 0x28,
  100. 0x2a, 0x27, 0x26, 0x23, 0x25, 0x2b, 0x2b, 0x2a, 0x30, 0x2f,
  101. 0x30, 0x01, 0x2d, 0x01, 0x3f, 0x01, 0x57
  102. }
  103. };
  104. static inline struct s6e63j0x03 *panel_to_s6e63j0x03(struct drm_panel *panel)
  105. {
  106. return container_of(panel, struct s6e63j0x03, panel);
  107. }
  108. static inline ssize_t s6e63j0x03_dcs_write_seq(struct s6e63j0x03 *ctx,
  109. const void *seq, size_t len)
  110. {
  111. struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
  112. return mipi_dsi_dcs_write_buffer(dsi, seq, len);
  113. }
  114. #define s6e63j0x03_dcs_write_seq_static(ctx, seq...) \
  115. ({ \
  116. static const u8 d[] = { seq }; \
  117. s6e63j0x03_dcs_write_seq(ctx, d, ARRAY_SIZE(d)); \
  118. })
  119. static inline int s6e63j0x03_enable_lv2_command(struct s6e63j0x03 *ctx)
  120. {
  121. return s6e63j0x03_dcs_write_seq_static(ctx, MCS_LEVEL2_KEY, 0x5a, 0x5a);
  122. }
  123. static inline int s6e63j0x03_apply_mtp_key(struct s6e63j0x03 *ctx, bool on)
  124. {
  125. if (on)
  126. return s6e63j0x03_dcs_write_seq_static(ctx,
  127. MCS_MTP_KEY, 0x5a, 0x5a);
  128. return s6e63j0x03_dcs_write_seq_static(ctx, MCS_MTP_KEY, 0xa5, 0xa5);
  129. }
  130. static int s6e63j0x03_power_on(struct s6e63j0x03 *ctx)
  131. {
  132. int ret;
  133. ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
  134. if (ret < 0)
  135. return ret;
  136. msleep(30);
  137. gpiod_set_value(ctx->reset_gpio, 1);
  138. usleep_range(1000, 2000);
  139. gpiod_set_value(ctx->reset_gpio, 0);
  140. usleep_range(5000, 6000);
  141. return 0;
  142. }
  143. static int s6e63j0x03_power_off(struct s6e63j0x03 *ctx)
  144. {
  145. return regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
  146. }
  147. static unsigned int s6e63j0x03_get_brightness_index(unsigned int brightness)
  148. {
  149. unsigned int index;
  150. index = brightness / (MAX_BRIGHTNESS / NUM_GAMMA_STEPS);
  151. if (index >= NUM_GAMMA_STEPS)
  152. index = NUM_GAMMA_STEPS - 1;
  153. return index;
  154. }
  155. static int s6e63j0x03_update_gamma(struct s6e63j0x03 *ctx,
  156. unsigned int brightness)
  157. {
  158. struct backlight_device *bl_dev = ctx->bl_dev;
  159. unsigned int index = s6e63j0x03_get_brightness_index(brightness);
  160. int ret;
  161. ret = s6e63j0x03_apply_mtp_key(ctx, true);
  162. if (ret < 0)
  163. return ret;
  164. ret = s6e63j0x03_dcs_write_seq(ctx, gamma_tbl[index], GAMMA_CMD_CNT);
  165. if (ret < 0)
  166. return ret;
  167. ret = s6e63j0x03_apply_mtp_key(ctx, false);
  168. if (ret < 0)
  169. return ret;
  170. bl_dev->props.brightness = brightness;
  171. return 0;
  172. }
  173. static int s6e63j0x03_set_brightness(struct backlight_device *bl_dev)
  174. {
  175. struct s6e63j0x03 *ctx = bl_get_data(bl_dev);
  176. unsigned int brightness = bl_dev->props.brightness;
  177. return s6e63j0x03_update_gamma(ctx, brightness);
  178. }
  179. static const struct backlight_ops s6e63j0x03_bl_ops = {
  180. .update_status = s6e63j0x03_set_brightness,
  181. };
  182. static int s6e63j0x03_disable(struct drm_panel *panel)
  183. {
  184. struct s6e63j0x03 *ctx = panel_to_s6e63j0x03(panel);
  185. struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
  186. int ret;
  187. ret = mipi_dsi_dcs_set_display_off(dsi);
  188. if (ret < 0)
  189. return ret;
  190. ctx->bl_dev->props.power = FB_BLANK_NORMAL;
  191. ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
  192. if (ret < 0)
  193. return ret;
  194. msleep(120);
  195. return 0;
  196. }
  197. static int s6e63j0x03_unprepare(struct drm_panel *panel)
  198. {
  199. struct s6e63j0x03 *ctx = panel_to_s6e63j0x03(panel);
  200. int ret;
  201. ret = s6e63j0x03_power_off(ctx);
  202. if (ret < 0)
  203. return ret;
  204. ctx->bl_dev->props.power = FB_BLANK_POWERDOWN;
  205. return 0;
  206. }
  207. static int s6e63j0x03_panel_init(struct s6e63j0x03 *ctx)
  208. {
  209. struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
  210. int ret;
  211. ret = s6e63j0x03_enable_lv2_command(ctx);
  212. if (ret < 0)
  213. return ret;
  214. ret = s6e63j0x03_apply_mtp_key(ctx, true);
  215. if (ret < 0)
  216. return ret;
  217. /* set porch adjustment */
  218. ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xf2, 0x1c, 0x28);
  219. if (ret < 0)
  220. return ret;
  221. /* set frame freq */
  222. ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xb5, 0x00, 0x02, 0x00);
  223. if (ret < 0)
  224. return ret;
  225. /* set caset, paset */
  226. ret = mipi_dsi_dcs_set_column_address(dsi, FIRST_COLUMN,
  227. default_mode.hdisplay - 1 + FIRST_COLUMN);
  228. if (ret < 0)
  229. return ret;
  230. ret = mipi_dsi_dcs_set_page_address(dsi, 0, default_mode.vdisplay - 1);
  231. if (ret < 0)
  232. return ret;
  233. /* set ltps timming 0, 1 */
  234. ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xf8, 0x08, 0x08, 0x08, 0x17,
  235. 0x00, 0x2a, 0x02, 0x26, 0x00, 0x00, 0x02, 0x00, 0x00);
  236. if (ret < 0)
  237. return ret;
  238. ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xf7, 0x02);
  239. if (ret < 0)
  240. return ret;
  241. /* set param pos te_edge */
  242. ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xb0, 0x01);
  243. if (ret < 0)
  244. return ret;
  245. /* set te rising edge */
  246. ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xe2, 0x0f);
  247. if (ret < 0)
  248. return ret;
  249. /* set param pos default */
  250. ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xb0, 0x00);
  251. if (ret < 0)
  252. return ret;
  253. ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
  254. if (ret < 0)
  255. return ret;
  256. ret = s6e63j0x03_apply_mtp_key(ctx, false);
  257. if (ret < 0)
  258. return ret;
  259. return 0;
  260. }
  261. static int s6e63j0x03_prepare(struct drm_panel *panel)
  262. {
  263. struct s6e63j0x03 *ctx = panel_to_s6e63j0x03(panel);
  264. int ret;
  265. ret = s6e63j0x03_power_on(ctx);
  266. if (ret < 0)
  267. return ret;
  268. ret = s6e63j0x03_panel_init(ctx);
  269. if (ret < 0)
  270. goto err;
  271. ctx->bl_dev->props.power = FB_BLANK_NORMAL;
  272. return 0;
  273. err:
  274. s6e63j0x03_power_off(ctx);
  275. return ret;
  276. }
  277. static int s6e63j0x03_enable(struct drm_panel *panel)
  278. {
  279. struct s6e63j0x03 *ctx = panel_to_s6e63j0x03(panel);
  280. struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
  281. int ret;
  282. msleep(120);
  283. ret = s6e63j0x03_apply_mtp_key(ctx, true);
  284. if (ret < 0)
  285. return ret;
  286. /* set elvss_cond */
  287. ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xb1, 0x00, 0x09);
  288. if (ret < 0)
  289. return ret;
  290. /* set pos */
  291. ret = s6e63j0x03_dcs_write_seq_static(ctx,
  292. MIPI_DCS_SET_ADDRESS_MODE, 0x40);
  293. if (ret < 0)
  294. return ret;
  295. /* set default white brightness */
  296. ret = mipi_dsi_dcs_set_display_brightness(dsi, 0x00ff);
  297. if (ret < 0)
  298. return ret;
  299. /* set white ctrl */
  300. ret = s6e63j0x03_dcs_write_seq_static(ctx,
  301. MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20);
  302. if (ret < 0)
  303. return ret;
  304. /* set acl off */
  305. ret = s6e63j0x03_dcs_write_seq_static(ctx,
  306. MIPI_DCS_WRITE_POWER_SAVE, 0x00);
  307. if (ret < 0)
  308. return ret;
  309. ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
  310. if (ret < 0)
  311. return ret;
  312. ret = s6e63j0x03_apply_mtp_key(ctx, false);
  313. if (ret < 0)
  314. return ret;
  315. ret = mipi_dsi_dcs_set_display_on(dsi);
  316. if (ret < 0)
  317. return ret;
  318. ctx->bl_dev->props.power = FB_BLANK_UNBLANK;
  319. return 0;
  320. }
  321. static int s6e63j0x03_get_modes(struct drm_panel *panel)
  322. {
  323. struct drm_connector *connector = panel->connector;
  324. struct drm_display_mode *mode;
  325. mode = drm_mode_duplicate(panel->drm, &default_mode);
  326. if (!mode) {
  327. DRM_ERROR("failed to add mode %ux%ux@%u\n",
  328. default_mode.hdisplay, default_mode.vdisplay,
  329. default_mode.vrefresh);
  330. return -ENOMEM;
  331. }
  332. drm_mode_set_name(mode);
  333. mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
  334. drm_mode_probed_add(connector, mode);
  335. connector->display_info.width_mm = 29;
  336. connector->display_info.height_mm = 29;
  337. return 1;
  338. }
  339. static const struct drm_panel_funcs s6e63j0x03_funcs = {
  340. .disable = s6e63j0x03_disable,
  341. .unprepare = s6e63j0x03_unprepare,
  342. .prepare = s6e63j0x03_prepare,
  343. .enable = s6e63j0x03_enable,
  344. .get_modes = s6e63j0x03_get_modes,
  345. };
  346. static int s6e63j0x03_probe(struct mipi_dsi_device *dsi)
  347. {
  348. struct device *dev = &dsi->dev;
  349. struct s6e63j0x03 *ctx;
  350. int ret;
  351. ctx = devm_kzalloc(dev, sizeof(struct s6e63j0x03), GFP_KERNEL);
  352. if (!ctx)
  353. return -ENOMEM;
  354. mipi_dsi_set_drvdata(dsi, ctx);
  355. ctx->dev = dev;
  356. dsi->lanes = 1;
  357. dsi->format = MIPI_DSI_FMT_RGB888;
  358. dsi->mode_flags = MIPI_DSI_MODE_EOT_PACKET;
  359. ctx->supplies[0].supply = "vdd3";
  360. ctx->supplies[1].supply = "vci";
  361. ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ctx->supplies),
  362. ctx->supplies);
  363. if (ret < 0) {
  364. dev_err(dev, "failed to get regulators: %d\n", ret);
  365. return ret;
  366. }
  367. ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
  368. if (IS_ERR(ctx->reset_gpio)) {
  369. dev_err(dev, "cannot get reset-gpio: %ld\n",
  370. PTR_ERR(ctx->reset_gpio));
  371. return PTR_ERR(ctx->reset_gpio);
  372. }
  373. drm_panel_init(&ctx->panel);
  374. ctx->panel.dev = dev;
  375. ctx->panel.funcs = &s6e63j0x03_funcs;
  376. ctx->bl_dev = backlight_device_register("s6e63j0x03", dev, ctx,
  377. &s6e63j0x03_bl_ops, NULL);
  378. if (IS_ERR(ctx->bl_dev)) {
  379. dev_err(dev, "failed to register backlight device\n");
  380. return PTR_ERR(ctx->bl_dev);
  381. }
  382. ctx->bl_dev->props.max_brightness = MAX_BRIGHTNESS;
  383. ctx->bl_dev->props.brightness = DEFAULT_BRIGHTNESS;
  384. ctx->bl_dev->props.power = FB_BLANK_POWERDOWN;
  385. ret = drm_panel_add(&ctx->panel);
  386. if (ret < 0)
  387. goto unregister_backlight;
  388. ret = mipi_dsi_attach(dsi);
  389. if (ret < 0)
  390. goto remove_panel;
  391. return ret;
  392. remove_panel:
  393. drm_panel_remove(&ctx->panel);
  394. unregister_backlight:
  395. backlight_device_unregister(ctx->bl_dev);
  396. return ret;
  397. }
  398. static int s6e63j0x03_remove(struct mipi_dsi_device *dsi)
  399. {
  400. struct s6e63j0x03 *ctx = mipi_dsi_get_drvdata(dsi);
  401. mipi_dsi_detach(dsi);
  402. drm_panel_remove(&ctx->panel);
  403. backlight_device_unregister(ctx->bl_dev);
  404. return 0;
  405. }
  406. static const struct of_device_id s6e63j0x03_of_match[] = {
  407. { .compatible = "samsung,s6e63j0x03" },
  408. { }
  409. };
  410. MODULE_DEVICE_TABLE(of, s6e63j0x03_of_match);
  411. static struct mipi_dsi_driver s6e63j0x03_driver = {
  412. .probe = s6e63j0x03_probe,
  413. .remove = s6e63j0x03_remove,
  414. .driver = {
  415. .name = "panel_samsung_s6e63j0x03",
  416. .of_match_table = s6e63j0x03_of_match,
  417. },
  418. };
  419. module_mipi_dsi_driver(s6e63j0x03_driver);
  420. MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>");
  421. MODULE_AUTHOR("Hoegeun Kwon <hoegeun.kwon@samsung.com>");
  422. MODULE_DESCRIPTION("MIPI-DSI based s6e63j0x03 AMOLED LCD Panel Driver");
  423. MODULE_LICENSE("GPL v2");