rockchip_lvds.c 16 KB

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  1. /*
  2. * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
  3. * Author:
  4. * Mark Yao <mark.yao@rock-chips.com>
  5. * Sandy Huang <hjc@rock-chips.com>
  6. *
  7. * This software is licensed under the terms of the GNU General Public
  8. * License version 2, as published by the Free Software Foundation, and
  9. * may be copied, distributed, and modified under those terms.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. #include <drm/drmP.h>
  17. #include <drm/drm_atomic_helper.h>
  18. #include <drm/drm_crtc_helper.h>
  19. #include <drm/drm_dp_helper.h>
  20. #include <drm/drm_panel.h>
  21. #include <drm/drm_of.h>
  22. #include <linux/component.h>
  23. #include <linux/clk.h>
  24. #include <linux/mfd/syscon.h>
  25. #include <linux/of_graph.h>
  26. #include <linux/pinctrl/devinfo.h>
  27. #include <linux/pm_runtime.h>
  28. #include <linux/regmap.h>
  29. #include <linux/reset.h>
  30. #include "rockchip_drm_drv.h"
  31. #include "rockchip_drm_vop.h"
  32. #include "rockchip_lvds.h"
  33. #define DISPLAY_OUTPUT_RGB 0
  34. #define DISPLAY_OUTPUT_LVDS 1
  35. #define DISPLAY_OUTPUT_DUAL_LVDS 2
  36. #define connector_to_lvds(c) \
  37. container_of(c, struct rockchip_lvds, connector)
  38. #define encoder_to_lvds(c) \
  39. container_of(c, struct rockchip_lvds, encoder)
  40. /**
  41. * rockchip_lvds_soc_data - rockchip lvds Soc private data
  42. * @ch1_offset: lvds channel 1 registe offset
  43. * grf_soc_con6: general registe offset for LVDS contrl
  44. * grf_soc_con7: general registe offset for LVDS contrl
  45. * has_vop_sel: to indicate whether need to choose from different VOP.
  46. */
  47. struct rockchip_lvds_soc_data {
  48. u32 ch1_offset;
  49. int grf_soc_con6;
  50. int grf_soc_con7;
  51. bool has_vop_sel;
  52. };
  53. struct rockchip_lvds {
  54. struct device *dev;
  55. void __iomem *regs;
  56. struct regmap *grf;
  57. struct clk *pclk;
  58. const struct rockchip_lvds_soc_data *soc_data;
  59. int output; /* rgb lvds or dual lvds output */
  60. int format; /* vesa or jeida format */
  61. struct drm_device *drm_dev;
  62. struct drm_panel *panel;
  63. struct drm_bridge *bridge;
  64. struct drm_connector connector;
  65. struct drm_encoder encoder;
  66. struct dev_pin_info *pins;
  67. };
  68. static inline void lvds_writel(struct rockchip_lvds *lvds, u32 offset, u32 val)
  69. {
  70. writel_relaxed(val, lvds->regs + offset);
  71. if (lvds->output == DISPLAY_OUTPUT_LVDS)
  72. return;
  73. writel_relaxed(val, lvds->regs + offset + lvds->soc_data->ch1_offset);
  74. }
  75. static inline int lvds_name_to_format(const char *s)
  76. {
  77. if (strncmp(s, "jeida-18", 8) == 0)
  78. return LVDS_JEIDA_18;
  79. else if (strncmp(s, "jeida-24", 8) == 0)
  80. return LVDS_JEIDA_24;
  81. else if (strncmp(s, "vesa-24", 7) == 0)
  82. return LVDS_VESA_24;
  83. return -EINVAL;
  84. }
  85. static inline int lvds_name_to_output(const char *s)
  86. {
  87. if (strncmp(s, "rgb", 3) == 0)
  88. return DISPLAY_OUTPUT_RGB;
  89. else if (strncmp(s, "lvds", 4) == 0)
  90. return DISPLAY_OUTPUT_LVDS;
  91. else if (strncmp(s, "duallvds", 8) == 0)
  92. return DISPLAY_OUTPUT_DUAL_LVDS;
  93. return -EINVAL;
  94. }
  95. static int rockchip_lvds_poweron(struct rockchip_lvds *lvds)
  96. {
  97. int ret;
  98. u32 val;
  99. ret = clk_enable(lvds->pclk);
  100. if (ret < 0) {
  101. DRM_DEV_ERROR(lvds->dev, "failed to enable lvds pclk %d\n", ret);
  102. return ret;
  103. }
  104. ret = pm_runtime_get_sync(lvds->dev);
  105. if (ret < 0) {
  106. DRM_DEV_ERROR(lvds->dev, "failed to get pm runtime: %d\n", ret);
  107. clk_disable(lvds->pclk);
  108. return ret;
  109. }
  110. val = RK3288_LVDS_CH0_REG0_LANE4_EN | RK3288_LVDS_CH0_REG0_LANE3_EN |
  111. RK3288_LVDS_CH0_REG0_LANE2_EN | RK3288_LVDS_CH0_REG0_LANE1_EN |
  112. RK3288_LVDS_CH0_REG0_LANE0_EN;
  113. if (lvds->output == DISPLAY_OUTPUT_RGB) {
  114. val |= RK3288_LVDS_CH0_REG0_TTL_EN |
  115. RK3288_LVDS_CH0_REG0_LANECK_EN;
  116. lvds_writel(lvds, RK3288_LVDS_CH0_REG0, val);
  117. lvds_writel(lvds, RK3288_LVDS_CH0_REG2,
  118. RK3288_LVDS_PLL_FBDIV_REG2(0x46));
  119. lvds_writel(lvds, RK3288_LVDS_CH0_REG4,
  120. RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE |
  121. RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE |
  122. RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE |
  123. RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE |
  124. RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE |
  125. RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE);
  126. lvds_writel(lvds, RK3288_LVDS_CH0_REG5,
  127. RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA |
  128. RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA |
  129. RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA |
  130. RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA |
  131. RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA |
  132. RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA);
  133. } else {
  134. val |= RK3288_LVDS_CH0_REG0_LVDS_EN |
  135. RK3288_LVDS_CH0_REG0_LANECK_EN;
  136. lvds_writel(lvds, RK3288_LVDS_CH0_REG0, val);
  137. lvds_writel(lvds, RK3288_LVDS_CH0_REG1,
  138. RK3288_LVDS_CH0_REG1_LANECK_BIAS |
  139. RK3288_LVDS_CH0_REG1_LANE4_BIAS |
  140. RK3288_LVDS_CH0_REG1_LANE3_BIAS |
  141. RK3288_LVDS_CH0_REG1_LANE2_BIAS |
  142. RK3288_LVDS_CH0_REG1_LANE1_BIAS |
  143. RK3288_LVDS_CH0_REG1_LANE0_BIAS);
  144. lvds_writel(lvds, RK3288_LVDS_CH0_REG2,
  145. RK3288_LVDS_CH0_REG2_RESERVE_ON |
  146. RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE |
  147. RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE |
  148. RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE |
  149. RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE |
  150. RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE |
  151. RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE |
  152. RK3288_LVDS_PLL_FBDIV_REG2(0x46));
  153. lvds_writel(lvds, RK3288_LVDS_CH0_REG4, 0x00);
  154. lvds_writel(lvds, RK3288_LVDS_CH0_REG5, 0x00);
  155. }
  156. lvds_writel(lvds, RK3288_LVDS_CH0_REG3, RK3288_LVDS_PLL_FBDIV_REG3(0x46));
  157. lvds_writel(lvds, RK3288_LVDS_CH0_REGD, RK3288_LVDS_PLL_PREDIV_REGD(0x0a));
  158. lvds_writel(lvds, RK3288_LVDS_CH0_REG20, RK3288_LVDS_CH0_REG20_LSB);
  159. lvds_writel(lvds, RK3288_LVDS_CFG_REGC, RK3288_LVDS_CFG_REGC_PLL_ENABLE);
  160. lvds_writel(lvds, RK3288_LVDS_CFG_REG21, RK3288_LVDS_CFG_REG21_TX_ENABLE);
  161. return 0;
  162. }
  163. static void rockchip_lvds_poweroff(struct rockchip_lvds *lvds)
  164. {
  165. int ret;
  166. u32 val;
  167. lvds_writel(lvds, RK3288_LVDS_CFG_REG21, RK3288_LVDS_CFG_REG21_TX_ENABLE);
  168. lvds_writel(lvds, RK3288_LVDS_CFG_REGC, RK3288_LVDS_CFG_REGC_PLL_ENABLE);
  169. val = LVDS_DUAL | LVDS_TTL_EN | LVDS_CH0_EN | LVDS_CH1_EN | LVDS_PWRDN;
  170. val |= val << 16;
  171. ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con7, val);
  172. if (ret != 0)
  173. DRM_DEV_ERROR(lvds->dev, "Could not write to GRF: %d\n", ret);
  174. pm_runtime_put(lvds->dev);
  175. clk_disable(lvds->pclk);
  176. }
  177. static const struct drm_connector_funcs rockchip_lvds_connector_funcs = {
  178. .fill_modes = drm_helper_probe_single_connector_modes,
  179. .destroy = drm_connector_cleanup,
  180. .reset = drm_atomic_helper_connector_reset,
  181. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  182. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  183. };
  184. static int rockchip_lvds_connector_get_modes(struct drm_connector *connector)
  185. {
  186. struct rockchip_lvds *lvds = connector_to_lvds(connector);
  187. struct drm_panel *panel = lvds->panel;
  188. return drm_panel_get_modes(panel);
  189. }
  190. static const
  191. struct drm_connector_helper_funcs rockchip_lvds_connector_helper_funcs = {
  192. .get_modes = rockchip_lvds_connector_get_modes,
  193. };
  194. static void rockchip_lvds_grf_config(struct drm_encoder *encoder,
  195. struct drm_display_mode *mode)
  196. {
  197. struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
  198. u8 pin_hsync = (mode->flags & DRM_MODE_FLAG_PHSYNC) ? 1 : 0;
  199. u8 pin_dclk = (mode->flags & DRM_MODE_FLAG_PCSYNC) ? 1 : 0;
  200. u32 val;
  201. int ret;
  202. /* iomux to LCD data/sync mode */
  203. if (lvds->output == DISPLAY_OUTPUT_RGB)
  204. if (lvds->pins && !IS_ERR(lvds->pins->default_state))
  205. pinctrl_select_state(lvds->pins->p,
  206. lvds->pins->default_state);
  207. val = lvds->format | LVDS_CH0_EN;
  208. if (lvds->output == DISPLAY_OUTPUT_RGB)
  209. val |= LVDS_TTL_EN | LVDS_CH1_EN;
  210. else if (lvds->output == DISPLAY_OUTPUT_DUAL_LVDS)
  211. val |= LVDS_DUAL | LVDS_CH1_EN;
  212. if ((mode->htotal - mode->hsync_start) & 0x01)
  213. val |= LVDS_START_PHASE_RST_1;
  214. val |= (pin_dclk << 8) | (pin_hsync << 9);
  215. val |= (0xffff << 16);
  216. ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con7, val);
  217. if (ret != 0) {
  218. DRM_DEV_ERROR(lvds->dev, "Could not write to GRF: %d\n", ret);
  219. return;
  220. }
  221. }
  222. static int rockchip_lvds_set_vop_source(struct rockchip_lvds *lvds,
  223. struct drm_encoder *encoder)
  224. {
  225. u32 val;
  226. int ret;
  227. if (!lvds->soc_data->has_vop_sel)
  228. return 0;
  229. ret = drm_of_encoder_active_endpoint_id(lvds->dev->of_node, encoder);
  230. if (ret < 0)
  231. return ret;
  232. val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16;
  233. if (ret)
  234. val |= RK3288_LVDS_SOC_CON6_SEL_VOP_LIT;
  235. ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con6, val);
  236. if (ret < 0)
  237. return ret;
  238. return 0;
  239. }
  240. static int
  241. rockchip_lvds_encoder_atomic_check(struct drm_encoder *encoder,
  242. struct drm_crtc_state *crtc_state,
  243. struct drm_connector_state *conn_state)
  244. {
  245. struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
  246. s->output_mode = ROCKCHIP_OUT_MODE_P888;
  247. s->output_type = DRM_MODE_CONNECTOR_LVDS;
  248. return 0;
  249. }
  250. static void rockchip_lvds_encoder_enable(struct drm_encoder *encoder)
  251. {
  252. struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
  253. struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
  254. int ret;
  255. drm_panel_prepare(lvds->panel);
  256. ret = rockchip_lvds_poweron(lvds);
  257. if (ret < 0) {
  258. DRM_DEV_ERROR(lvds->dev, "failed to power on lvds: %d\n", ret);
  259. drm_panel_unprepare(lvds->panel);
  260. }
  261. rockchip_lvds_grf_config(encoder, mode);
  262. rockchip_lvds_set_vop_source(lvds, encoder);
  263. drm_panel_enable(lvds->panel);
  264. }
  265. static void rockchip_lvds_encoder_disable(struct drm_encoder *encoder)
  266. {
  267. struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
  268. drm_panel_disable(lvds->panel);
  269. rockchip_lvds_poweroff(lvds);
  270. drm_panel_unprepare(lvds->panel);
  271. }
  272. static const
  273. struct drm_encoder_helper_funcs rockchip_lvds_encoder_helper_funcs = {
  274. .enable = rockchip_lvds_encoder_enable,
  275. .disable = rockchip_lvds_encoder_disable,
  276. .atomic_check = rockchip_lvds_encoder_atomic_check,
  277. };
  278. static const struct drm_encoder_funcs rockchip_lvds_encoder_funcs = {
  279. .destroy = drm_encoder_cleanup,
  280. };
  281. static const struct rockchip_lvds_soc_data rk3288_lvds_data = {
  282. .ch1_offset = 0x100,
  283. .grf_soc_con6 = 0x025c,
  284. .grf_soc_con7 = 0x0260,
  285. .has_vop_sel = true,
  286. };
  287. static const struct of_device_id rockchip_lvds_dt_ids[] = {
  288. {
  289. .compatible = "rockchip,rk3288-lvds",
  290. .data = &rk3288_lvds_data
  291. },
  292. {}
  293. };
  294. MODULE_DEVICE_TABLE(of, rockchip_lvds_dt_ids);
  295. static int rockchip_lvds_bind(struct device *dev, struct device *master,
  296. void *data)
  297. {
  298. struct rockchip_lvds *lvds = dev_get_drvdata(dev);
  299. struct drm_device *drm_dev = data;
  300. struct drm_encoder *encoder;
  301. struct drm_connector *connector;
  302. struct device_node *remote = NULL;
  303. struct device_node *port, *endpoint;
  304. int ret = 0, child_count = 0;
  305. const char *name;
  306. u32 endpoint_id;
  307. lvds->drm_dev = drm_dev;
  308. port = of_graph_get_port_by_id(dev->of_node, 1);
  309. if (!port) {
  310. DRM_DEV_ERROR(dev,
  311. "can't found port point, please init lvds panel port!\n");
  312. return -EINVAL;
  313. }
  314. for_each_child_of_node(port, endpoint) {
  315. child_count++;
  316. of_property_read_u32(endpoint, "reg", &endpoint_id);
  317. ret = drm_of_find_panel_or_bridge(dev->of_node, 1, endpoint_id,
  318. &lvds->panel, &lvds->bridge);
  319. if (!ret) {
  320. of_node_put(endpoint);
  321. break;
  322. }
  323. }
  324. if (!child_count) {
  325. DRM_DEV_ERROR(dev, "lvds port does not have any children\n");
  326. ret = -EINVAL;
  327. goto err_put_port;
  328. } else if (ret) {
  329. DRM_DEV_ERROR(dev, "failed to find panel and bridge node\n");
  330. ret = -EPROBE_DEFER;
  331. goto err_put_port;
  332. }
  333. if (lvds->panel)
  334. remote = lvds->panel->dev->of_node;
  335. else
  336. remote = lvds->bridge->of_node;
  337. if (of_property_read_string(dev->of_node, "rockchip,output", &name))
  338. /* default set it as output rgb */
  339. lvds->output = DISPLAY_OUTPUT_RGB;
  340. else
  341. lvds->output = lvds_name_to_output(name);
  342. if (lvds->output < 0) {
  343. DRM_DEV_ERROR(dev, "invalid output type [%s]\n", name);
  344. ret = lvds->output;
  345. goto err_put_remote;
  346. }
  347. if (of_property_read_string(remote, "data-mapping", &name))
  348. /* default set it as format vesa 18 */
  349. lvds->format = LVDS_VESA_18;
  350. else
  351. lvds->format = lvds_name_to_format(name);
  352. if (lvds->format < 0) {
  353. DRM_DEV_ERROR(dev, "invalid data-mapping format [%s]\n", name);
  354. ret = lvds->format;
  355. goto err_put_remote;
  356. }
  357. encoder = &lvds->encoder;
  358. encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev,
  359. dev->of_node);
  360. ret = drm_encoder_init(drm_dev, encoder, &rockchip_lvds_encoder_funcs,
  361. DRM_MODE_ENCODER_LVDS, NULL);
  362. if (ret < 0) {
  363. DRM_DEV_ERROR(drm_dev->dev,
  364. "failed to initialize encoder: %d\n", ret);
  365. goto err_put_remote;
  366. }
  367. drm_encoder_helper_add(encoder, &rockchip_lvds_encoder_helper_funcs);
  368. if (lvds->panel) {
  369. connector = &lvds->connector;
  370. connector->dpms = DRM_MODE_DPMS_OFF;
  371. ret = drm_connector_init(drm_dev, connector,
  372. &rockchip_lvds_connector_funcs,
  373. DRM_MODE_CONNECTOR_LVDS);
  374. if (ret < 0) {
  375. DRM_DEV_ERROR(drm_dev->dev,
  376. "failed to initialize connector: %d\n", ret);
  377. goto err_free_encoder;
  378. }
  379. drm_connector_helper_add(connector,
  380. &rockchip_lvds_connector_helper_funcs);
  381. ret = drm_connector_attach_encoder(connector, encoder);
  382. if (ret < 0) {
  383. DRM_DEV_ERROR(drm_dev->dev,
  384. "failed to attach encoder: %d\n", ret);
  385. goto err_free_connector;
  386. }
  387. ret = drm_panel_attach(lvds->panel, connector);
  388. if (ret < 0) {
  389. DRM_DEV_ERROR(drm_dev->dev,
  390. "failed to attach panel: %d\n", ret);
  391. goto err_free_connector;
  392. }
  393. } else {
  394. ret = drm_bridge_attach(encoder, lvds->bridge, NULL);
  395. if (ret) {
  396. DRM_DEV_ERROR(drm_dev->dev,
  397. "failed to attach bridge: %d\n", ret);
  398. goto err_free_encoder;
  399. }
  400. }
  401. pm_runtime_enable(dev);
  402. of_node_put(remote);
  403. of_node_put(port);
  404. return 0;
  405. err_free_connector:
  406. drm_connector_cleanup(connector);
  407. err_free_encoder:
  408. drm_encoder_cleanup(encoder);
  409. err_put_remote:
  410. of_node_put(remote);
  411. err_put_port:
  412. of_node_put(port);
  413. return ret;
  414. }
  415. static void rockchip_lvds_unbind(struct device *dev, struct device *master,
  416. void *data)
  417. {
  418. struct rockchip_lvds *lvds = dev_get_drvdata(dev);
  419. rockchip_lvds_encoder_disable(&lvds->encoder);
  420. if (lvds->panel)
  421. drm_panel_detach(lvds->panel);
  422. pm_runtime_disable(dev);
  423. drm_connector_cleanup(&lvds->connector);
  424. drm_encoder_cleanup(&lvds->encoder);
  425. }
  426. static const struct component_ops rockchip_lvds_component_ops = {
  427. .bind = rockchip_lvds_bind,
  428. .unbind = rockchip_lvds_unbind,
  429. };
  430. static int rockchip_lvds_probe(struct platform_device *pdev)
  431. {
  432. struct device *dev = &pdev->dev;
  433. struct rockchip_lvds *lvds;
  434. const struct of_device_id *match;
  435. struct resource *res;
  436. int ret;
  437. if (!dev->of_node)
  438. return -ENODEV;
  439. lvds = devm_kzalloc(&pdev->dev, sizeof(*lvds), GFP_KERNEL);
  440. if (!lvds)
  441. return -ENOMEM;
  442. lvds->dev = dev;
  443. match = of_match_node(rockchip_lvds_dt_ids, dev->of_node);
  444. if (!match)
  445. return -ENODEV;
  446. lvds->soc_data = match->data;
  447. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  448. lvds->regs = devm_ioremap_resource(&pdev->dev, res);
  449. if (IS_ERR(lvds->regs))
  450. return PTR_ERR(lvds->regs);
  451. lvds->pclk = devm_clk_get(&pdev->dev, "pclk_lvds");
  452. if (IS_ERR(lvds->pclk)) {
  453. DRM_DEV_ERROR(dev, "could not get pclk_lvds\n");
  454. return PTR_ERR(lvds->pclk);
  455. }
  456. lvds->pins = devm_kzalloc(lvds->dev, sizeof(*lvds->pins),
  457. GFP_KERNEL);
  458. if (!lvds->pins)
  459. return -ENOMEM;
  460. lvds->pins->p = devm_pinctrl_get(lvds->dev);
  461. if (IS_ERR(lvds->pins->p)) {
  462. DRM_DEV_ERROR(dev, "no pinctrl handle\n");
  463. devm_kfree(lvds->dev, lvds->pins);
  464. lvds->pins = NULL;
  465. } else {
  466. lvds->pins->default_state =
  467. pinctrl_lookup_state(lvds->pins->p, "lcdc");
  468. if (IS_ERR(lvds->pins->default_state)) {
  469. DRM_DEV_ERROR(dev, "no default pinctrl state\n");
  470. devm_kfree(lvds->dev, lvds->pins);
  471. lvds->pins = NULL;
  472. }
  473. }
  474. lvds->grf = syscon_regmap_lookup_by_phandle(dev->of_node,
  475. "rockchip,grf");
  476. if (IS_ERR(lvds->grf)) {
  477. DRM_DEV_ERROR(dev, "missing rockchip,grf property\n");
  478. return PTR_ERR(lvds->grf);
  479. }
  480. dev_set_drvdata(dev, lvds);
  481. ret = clk_prepare(lvds->pclk);
  482. if (ret < 0) {
  483. DRM_DEV_ERROR(dev, "failed to prepare pclk_lvds\n");
  484. return ret;
  485. }
  486. ret = component_add(&pdev->dev, &rockchip_lvds_component_ops);
  487. if (ret < 0) {
  488. DRM_DEV_ERROR(dev, "failed to add component\n");
  489. clk_unprepare(lvds->pclk);
  490. }
  491. return ret;
  492. }
  493. static int rockchip_lvds_remove(struct platform_device *pdev)
  494. {
  495. struct rockchip_lvds *lvds = dev_get_drvdata(&pdev->dev);
  496. component_del(&pdev->dev, &rockchip_lvds_component_ops);
  497. clk_unprepare(lvds->pclk);
  498. return 0;
  499. }
  500. struct platform_driver rockchip_lvds_driver = {
  501. .probe = rockchip_lvds_probe,
  502. .remove = rockchip_lvds_remove,
  503. .driver = {
  504. .name = "rockchip-lvds",
  505. .of_match_table = of_match_ptr(rockchip_lvds_dt_ids),
  506. },
  507. };