zx_hdmi.c 18 KB

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  1. /*
  2. * Copyright 2016 Linaro Ltd.
  3. * Copyright 2016 ZTE Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. */
  10. #include <linux/clk.h>
  11. #include <linux/component.h>
  12. #include <linux/delay.h>
  13. #include <linux/err.h>
  14. #include <linux/hdmi.h>
  15. #include <linux/irq.h>
  16. #include <linux/mfd/syscon.h>
  17. #include <linux/module.h>
  18. #include <linux/mutex.h>
  19. #include <linux/of_device.h>
  20. #include <drm/drm_atomic_helper.h>
  21. #include <drm/drm_crtc_helper.h>
  22. #include <drm/drm_edid.h>
  23. #include <drm/drm_of.h>
  24. #include <drm/drmP.h>
  25. #include <sound/hdmi-codec.h>
  26. #include "zx_hdmi_regs.h"
  27. #include "zx_vou.h"
  28. #define ZX_HDMI_INFOFRAME_SIZE 31
  29. #define DDC_SEGMENT_ADDR 0x30
  30. struct zx_hdmi_i2c {
  31. struct i2c_adapter adap;
  32. struct mutex lock;
  33. };
  34. struct zx_hdmi {
  35. struct drm_connector connector;
  36. struct drm_encoder encoder;
  37. struct zx_hdmi_i2c *ddc;
  38. struct device *dev;
  39. struct drm_device *drm;
  40. void __iomem *mmio;
  41. struct clk *cec_clk;
  42. struct clk *osc_clk;
  43. struct clk *xclk;
  44. bool sink_is_hdmi;
  45. bool sink_has_audio;
  46. struct platform_device *audio_pdev;
  47. };
  48. #define to_zx_hdmi(x) container_of(x, struct zx_hdmi, x)
  49. static inline u8 hdmi_readb(struct zx_hdmi *hdmi, u16 offset)
  50. {
  51. return readl_relaxed(hdmi->mmio + offset * 4);
  52. }
  53. static inline void hdmi_writeb(struct zx_hdmi *hdmi, u16 offset, u8 val)
  54. {
  55. writel_relaxed(val, hdmi->mmio + offset * 4);
  56. }
  57. static inline void hdmi_writeb_mask(struct zx_hdmi *hdmi, u16 offset,
  58. u8 mask, u8 val)
  59. {
  60. u8 tmp;
  61. tmp = hdmi_readb(hdmi, offset);
  62. tmp = (tmp & ~mask) | (val & mask);
  63. hdmi_writeb(hdmi, offset, tmp);
  64. }
  65. static int zx_hdmi_infoframe_trans(struct zx_hdmi *hdmi,
  66. union hdmi_infoframe *frame, u8 fsel)
  67. {
  68. u8 buffer[ZX_HDMI_INFOFRAME_SIZE];
  69. int num;
  70. int i;
  71. hdmi_writeb(hdmi, TPI_INFO_FSEL, fsel);
  72. num = hdmi_infoframe_pack(frame, buffer, ZX_HDMI_INFOFRAME_SIZE);
  73. if (num < 0) {
  74. DRM_DEV_ERROR(hdmi->dev, "failed to pack infoframe: %d\n", num);
  75. return num;
  76. }
  77. for (i = 0; i < num; i++)
  78. hdmi_writeb(hdmi, TPI_INFO_B0 + i, buffer[i]);
  79. hdmi_writeb_mask(hdmi, TPI_INFO_EN, TPI_INFO_TRANS_RPT,
  80. TPI_INFO_TRANS_RPT);
  81. hdmi_writeb_mask(hdmi, TPI_INFO_EN, TPI_INFO_TRANS_EN,
  82. TPI_INFO_TRANS_EN);
  83. return num;
  84. }
  85. static int zx_hdmi_config_video_vsi(struct zx_hdmi *hdmi,
  86. struct drm_display_mode *mode)
  87. {
  88. union hdmi_infoframe frame;
  89. int ret;
  90. ret = drm_hdmi_vendor_infoframe_from_display_mode(&frame.vendor.hdmi,
  91. &hdmi->connector,
  92. mode);
  93. if (ret) {
  94. DRM_DEV_ERROR(hdmi->dev, "failed to get vendor infoframe: %d\n",
  95. ret);
  96. return ret;
  97. }
  98. return zx_hdmi_infoframe_trans(hdmi, &frame, FSEL_VSIF);
  99. }
  100. static int zx_hdmi_config_video_avi(struct zx_hdmi *hdmi,
  101. struct drm_display_mode *mode)
  102. {
  103. union hdmi_infoframe frame;
  104. int ret;
  105. ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi, mode, false);
  106. if (ret) {
  107. DRM_DEV_ERROR(hdmi->dev, "failed to get avi infoframe: %d\n",
  108. ret);
  109. return ret;
  110. }
  111. /* We always use YUV444 for HDMI output. */
  112. frame.avi.colorspace = HDMI_COLORSPACE_YUV444;
  113. return zx_hdmi_infoframe_trans(hdmi, &frame, FSEL_AVI);
  114. }
  115. static void zx_hdmi_encoder_mode_set(struct drm_encoder *encoder,
  116. struct drm_display_mode *mode,
  117. struct drm_display_mode *adj_mode)
  118. {
  119. struct zx_hdmi *hdmi = to_zx_hdmi(encoder);
  120. if (hdmi->sink_is_hdmi) {
  121. zx_hdmi_config_video_avi(hdmi, mode);
  122. zx_hdmi_config_video_vsi(hdmi, mode);
  123. }
  124. }
  125. static void zx_hdmi_phy_start(struct zx_hdmi *hdmi)
  126. {
  127. /* Copy from ZTE BSP code */
  128. hdmi_writeb(hdmi, 0x222, 0x0);
  129. hdmi_writeb(hdmi, 0x224, 0x4);
  130. hdmi_writeb(hdmi, 0x909, 0x0);
  131. hdmi_writeb(hdmi, 0x7b0, 0x90);
  132. hdmi_writeb(hdmi, 0x7b1, 0x00);
  133. hdmi_writeb(hdmi, 0x7b2, 0xa7);
  134. hdmi_writeb(hdmi, 0x7b8, 0xaa);
  135. hdmi_writeb(hdmi, 0x7b2, 0xa7);
  136. hdmi_writeb(hdmi, 0x7b3, 0x0f);
  137. hdmi_writeb(hdmi, 0x7b4, 0x0f);
  138. hdmi_writeb(hdmi, 0x7b5, 0x55);
  139. hdmi_writeb(hdmi, 0x7b7, 0x03);
  140. hdmi_writeb(hdmi, 0x7b9, 0x12);
  141. hdmi_writeb(hdmi, 0x7ba, 0x32);
  142. hdmi_writeb(hdmi, 0x7bc, 0x68);
  143. hdmi_writeb(hdmi, 0x7be, 0x40);
  144. hdmi_writeb(hdmi, 0x7bf, 0x84);
  145. hdmi_writeb(hdmi, 0x7c1, 0x0f);
  146. hdmi_writeb(hdmi, 0x7c8, 0x02);
  147. hdmi_writeb(hdmi, 0x7c9, 0x03);
  148. hdmi_writeb(hdmi, 0x7ca, 0x40);
  149. hdmi_writeb(hdmi, 0x7dc, 0x31);
  150. hdmi_writeb(hdmi, 0x7e2, 0x04);
  151. hdmi_writeb(hdmi, 0x7e0, 0x06);
  152. hdmi_writeb(hdmi, 0x7cb, 0x68);
  153. hdmi_writeb(hdmi, 0x7f9, 0x02);
  154. hdmi_writeb(hdmi, 0x7b6, 0x02);
  155. hdmi_writeb(hdmi, 0x7f3, 0x0);
  156. }
  157. static void zx_hdmi_hw_enable(struct zx_hdmi *hdmi)
  158. {
  159. /* Enable pclk */
  160. hdmi_writeb_mask(hdmi, CLKPWD, CLKPWD_PDIDCK, CLKPWD_PDIDCK);
  161. /* Enable HDMI for TX */
  162. hdmi_writeb_mask(hdmi, FUNC_SEL, FUNC_HDMI_EN, FUNC_HDMI_EN);
  163. /* Enable deep color packet */
  164. hdmi_writeb_mask(hdmi, P2T_CTRL, P2T_DC_PKT_EN, P2T_DC_PKT_EN);
  165. /* Enable HDMI/MHL mode for output */
  166. hdmi_writeb_mask(hdmi, TEST_TXCTRL, TEST_TXCTRL_HDMI_MODE,
  167. TEST_TXCTRL_HDMI_MODE);
  168. /* Configure reg_qc_sel */
  169. hdmi_writeb(hdmi, HDMICTL4, 0x3);
  170. /* Enable interrupt */
  171. hdmi_writeb_mask(hdmi, INTR1_MASK, INTR1_MONITOR_DETECT,
  172. INTR1_MONITOR_DETECT);
  173. /* Start up phy */
  174. zx_hdmi_phy_start(hdmi);
  175. }
  176. static void zx_hdmi_hw_disable(struct zx_hdmi *hdmi)
  177. {
  178. /* Disable interrupt */
  179. hdmi_writeb_mask(hdmi, INTR1_MASK, INTR1_MONITOR_DETECT, 0);
  180. /* Disable deep color packet */
  181. hdmi_writeb_mask(hdmi, P2T_CTRL, P2T_DC_PKT_EN, P2T_DC_PKT_EN);
  182. /* Disable HDMI for TX */
  183. hdmi_writeb_mask(hdmi, FUNC_SEL, FUNC_HDMI_EN, 0);
  184. /* Disable pclk */
  185. hdmi_writeb_mask(hdmi, CLKPWD, CLKPWD_PDIDCK, 0);
  186. }
  187. static void zx_hdmi_encoder_enable(struct drm_encoder *encoder)
  188. {
  189. struct zx_hdmi *hdmi = to_zx_hdmi(encoder);
  190. clk_prepare_enable(hdmi->cec_clk);
  191. clk_prepare_enable(hdmi->osc_clk);
  192. clk_prepare_enable(hdmi->xclk);
  193. zx_hdmi_hw_enable(hdmi);
  194. vou_inf_enable(VOU_HDMI, encoder->crtc);
  195. }
  196. static void zx_hdmi_encoder_disable(struct drm_encoder *encoder)
  197. {
  198. struct zx_hdmi *hdmi = to_zx_hdmi(encoder);
  199. vou_inf_disable(VOU_HDMI, encoder->crtc);
  200. zx_hdmi_hw_disable(hdmi);
  201. clk_disable_unprepare(hdmi->xclk);
  202. clk_disable_unprepare(hdmi->osc_clk);
  203. clk_disable_unprepare(hdmi->cec_clk);
  204. }
  205. static const struct drm_encoder_helper_funcs zx_hdmi_encoder_helper_funcs = {
  206. .enable = zx_hdmi_encoder_enable,
  207. .disable = zx_hdmi_encoder_disable,
  208. .mode_set = zx_hdmi_encoder_mode_set,
  209. };
  210. static const struct drm_encoder_funcs zx_hdmi_encoder_funcs = {
  211. .destroy = drm_encoder_cleanup,
  212. };
  213. static int zx_hdmi_connector_get_modes(struct drm_connector *connector)
  214. {
  215. struct zx_hdmi *hdmi = to_zx_hdmi(connector);
  216. struct edid *edid;
  217. int ret;
  218. edid = drm_get_edid(connector, &hdmi->ddc->adap);
  219. if (!edid)
  220. return 0;
  221. hdmi->sink_is_hdmi = drm_detect_hdmi_monitor(edid);
  222. hdmi->sink_has_audio = drm_detect_monitor_audio(edid);
  223. drm_connector_update_edid_property(connector, edid);
  224. ret = drm_add_edid_modes(connector, edid);
  225. kfree(edid);
  226. return ret;
  227. }
  228. static enum drm_mode_status
  229. zx_hdmi_connector_mode_valid(struct drm_connector *connector,
  230. struct drm_display_mode *mode)
  231. {
  232. return MODE_OK;
  233. }
  234. static struct drm_connector_helper_funcs zx_hdmi_connector_helper_funcs = {
  235. .get_modes = zx_hdmi_connector_get_modes,
  236. .mode_valid = zx_hdmi_connector_mode_valid,
  237. };
  238. static enum drm_connector_status
  239. zx_hdmi_connector_detect(struct drm_connector *connector, bool force)
  240. {
  241. struct zx_hdmi *hdmi = to_zx_hdmi(connector);
  242. return (hdmi_readb(hdmi, TPI_HPD_RSEN) & TPI_HPD_CONNECTION) ?
  243. connector_status_connected : connector_status_disconnected;
  244. }
  245. static const struct drm_connector_funcs zx_hdmi_connector_funcs = {
  246. .fill_modes = drm_helper_probe_single_connector_modes,
  247. .detect = zx_hdmi_connector_detect,
  248. .destroy = drm_connector_cleanup,
  249. .reset = drm_atomic_helper_connector_reset,
  250. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  251. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  252. };
  253. static int zx_hdmi_register(struct drm_device *drm, struct zx_hdmi *hdmi)
  254. {
  255. struct drm_encoder *encoder = &hdmi->encoder;
  256. encoder->possible_crtcs = VOU_CRTC_MASK;
  257. drm_encoder_init(drm, encoder, &zx_hdmi_encoder_funcs,
  258. DRM_MODE_ENCODER_TMDS, NULL);
  259. drm_encoder_helper_add(encoder, &zx_hdmi_encoder_helper_funcs);
  260. hdmi->connector.polled = DRM_CONNECTOR_POLL_HPD;
  261. drm_connector_init(drm, &hdmi->connector, &zx_hdmi_connector_funcs,
  262. DRM_MODE_CONNECTOR_HDMIA);
  263. drm_connector_helper_add(&hdmi->connector,
  264. &zx_hdmi_connector_helper_funcs);
  265. drm_connector_attach_encoder(&hdmi->connector, encoder);
  266. return 0;
  267. }
  268. static irqreturn_t zx_hdmi_irq_thread(int irq, void *dev_id)
  269. {
  270. struct zx_hdmi *hdmi = dev_id;
  271. drm_helper_hpd_irq_event(hdmi->connector.dev);
  272. return IRQ_HANDLED;
  273. }
  274. static irqreturn_t zx_hdmi_irq_handler(int irq, void *dev_id)
  275. {
  276. struct zx_hdmi *hdmi = dev_id;
  277. u8 lstat;
  278. lstat = hdmi_readb(hdmi, L1_INTR_STAT);
  279. /* Monitor detect/HPD interrupt */
  280. if (lstat & L1_INTR_STAT_INTR1) {
  281. u8 stat;
  282. stat = hdmi_readb(hdmi, INTR1_STAT);
  283. hdmi_writeb(hdmi, INTR1_STAT, stat);
  284. if (stat & INTR1_MONITOR_DETECT)
  285. return IRQ_WAKE_THREAD;
  286. }
  287. return IRQ_NONE;
  288. }
  289. static int zx_hdmi_audio_startup(struct device *dev, void *data)
  290. {
  291. struct zx_hdmi *hdmi = dev_get_drvdata(dev);
  292. struct drm_encoder *encoder = &hdmi->encoder;
  293. vou_inf_hdmi_audio_sel(encoder->crtc, VOU_HDMI_AUD_SPDIF);
  294. return 0;
  295. }
  296. static void zx_hdmi_audio_shutdown(struct device *dev, void *data)
  297. {
  298. struct zx_hdmi *hdmi = dev_get_drvdata(dev);
  299. /* Disable audio input */
  300. hdmi_writeb_mask(hdmi, AUD_EN, AUD_IN_EN, 0);
  301. }
  302. static inline int zx_hdmi_audio_get_n(unsigned int fs)
  303. {
  304. unsigned int n;
  305. if (fs && (fs % 44100) == 0)
  306. n = 6272 * (fs / 44100);
  307. else
  308. n = fs * 128 / 1000;
  309. return n;
  310. }
  311. static int zx_hdmi_audio_hw_params(struct device *dev,
  312. void *data,
  313. struct hdmi_codec_daifmt *daifmt,
  314. struct hdmi_codec_params *params)
  315. {
  316. struct zx_hdmi *hdmi = dev_get_drvdata(dev);
  317. struct hdmi_audio_infoframe *cea = &params->cea;
  318. union hdmi_infoframe frame;
  319. int n;
  320. /* We only support spdif for now */
  321. if (daifmt->fmt != HDMI_SPDIF) {
  322. DRM_DEV_ERROR(hdmi->dev, "invalid daifmt %d\n", daifmt->fmt);
  323. return -EINVAL;
  324. }
  325. switch (params->sample_width) {
  326. case 16:
  327. hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, SPDIF_SAMPLE_SIZE_MASK,
  328. SPDIF_SAMPLE_SIZE_16BIT);
  329. break;
  330. case 20:
  331. hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, SPDIF_SAMPLE_SIZE_MASK,
  332. SPDIF_SAMPLE_SIZE_20BIT);
  333. break;
  334. case 24:
  335. hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, SPDIF_SAMPLE_SIZE_MASK,
  336. SPDIF_SAMPLE_SIZE_24BIT);
  337. break;
  338. default:
  339. DRM_DEV_ERROR(hdmi->dev, "invalid sample width %d\n",
  340. params->sample_width);
  341. return -EINVAL;
  342. }
  343. /* CTS is calculated by hardware, and we only need to take care of N */
  344. n = zx_hdmi_audio_get_n(params->sample_rate);
  345. hdmi_writeb(hdmi, N_SVAL1, n & 0xff);
  346. hdmi_writeb(hdmi, N_SVAL2, (n >> 8) & 0xff);
  347. hdmi_writeb(hdmi, N_SVAL3, (n >> 16) & 0xf);
  348. /* Enable spdif mode */
  349. hdmi_writeb_mask(hdmi, AUD_MODE, SPDIF_EN, SPDIF_EN);
  350. /* Enable audio input */
  351. hdmi_writeb_mask(hdmi, AUD_EN, AUD_IN_EN, AUD_IN_EN);
  352. memcpy(&frame.audio, cea, sizeof(*cea));
  353. return zx_hdmi_infoframe_trans(hdmi, &frame, FSEL_AUDIO);
  354. }
  355. static int zx_hdmi_audio_digital_mute(struct device *dev, void *data,
  356. bool enable)
  357. {
  358. struct zx_hdmi *hdmi = dev_get_drvdata(dev);
  359. if (enable)
  360. hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, TPI_AUD_MUTE,
  361. TPI_AUD_MUTE);
  362. else
  363. hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, TPI_AUD_MUTE, 0);
  364. return 0;
  365. }
  366. static int zx_hdmi_audio_get_eld(struct device *dev, void *data,
  367. uint8_t *buf, size_t len)
  368. {
  369. struct zx_hdmi *hdmi = dev_get_drvdata(dev);
  370. struct drm_connector *connector = &hdmi->connector;
  371. memcpy(buf, connector->eld, min(sizeof(connector->eld), len));
  372. return 0;
  373. }
  374. static const struct hdmi_codec_ops zx_hdmi_codec_ops = {
  375. .audio_startup = zx_hdmi_audio_startup,
  376. .hw_params = zx_hdmi_audio_hw_params,
  377. .audio_shutdown = zx_hdmi_audio_shutdown,
  378. .digital_mute = zx_hdmi_audio_digital_mute,
  379. .get_eld = zx_hdmi_audio_get_eld,
  380. };
  381. static struct hdmi_codec_pdata zx_hdmi_codec_pdata = {
  382. .ops = &zx_hdmi_codec_ops,
  383. .spdif = 1,
  384. };
  385. static int zx_hdmi_audio_register(struct zx_hdmi *hdmi)
  386. {
  387. struct platform_device *pdev;
  388. pdev = platform_device_register_data(hdmi->dev, HDMI_CODEC_DRV_NAME,
  389. PLATFORM_DEVID_AUTO,
  390. &zx_hdmi_codec_pdata,
  391. sizeof(zx_hdmi_codec_pdata));
  392. if (IS_ERR(pdev))
  393. return PTR_ERR(pdev);
  394. hdmi->audio_pdev = pdev;
  395. return 0;
  396. }
  397. static int zx_hdmi_i2c_read(struct zx_hdmi *hdmi, struct i2c_msg *msg)
  398. {
  399. int len = msg->len;
  400. u8 *buf = msg->buf;
  401. int retry = 0;
  402. int ret = 0;
  403. /* Bits [9:8] of bytes */
  404. hdmi_writeb(hdmi, ZX_DDC_DIN_CNT2, (len >> 8) & 0xff);
  405. /* Bits [7:0] of bytes */
  406. hdmi_writeb(hdmi, ZX_DDC_DIN_CNT1, len & 0xff);
  407. /* Clear FIFO */
  408. hdmi_writeb_mask(hdmi, ZX_DDC_CMD, DDC_CMD_MASK, DDC_CMD_CLEAR_FIFO);
  409. /* Kick off the read */
  410. hdmi_writeb_mask(hdmi, ZX_DDC_CMD, DDC_CMD_MASK,
  411. DDC_CMD_SEQUENTIAL_READ);
  412. while (len > 0) {
  413. int cnt, i;
  414. /* FIFO needs some time to get ready */
  415. usleep_range(500, 1000);
  416. cnt = hdmi_readb(hdmi, ZX_DDC_DOUT_CNT) & DDC_DOUT_CNT_MASK;
  417. if (cnt == 0) {
  418. if (++retry > 5) {
  419. DRM_DEV_ERROR(hdmi->dev,
  420. "DDC FIFO read timed out!");
  421. return -ETIMEDOUT;
  422. }
  423. continue;
  424. }
  425. for (i = 0; i < cnt; i++)
  426. *buf++ = hdmi_readb(hdmi, ZX_DDC_DATA);
  427. len -= cnt;
  428. }
  429. return ret;
  430. }
  431. static int zx_hdmi_i2c_write(struct zx_hdmi *hdmi, struct i2c_msg *msg)
  432. {
  433. /*
  434. * The DDC I2C adapter is only for reading EDID data, so we assume
  435. * that the write to this adapter must be the EDID data offset.
  436. */
  437. if ((msg->len != 1) ||
  438. ((msg->addr != DDC_ADDR) && (msg->addr != DDC_SEGMENT_ADDR)))
  439. return -EINVAL;
  440. if (msg->addr == DDC_SEGMENT_ADDR)
  441. hdmi_writeb(hdmi, ZX_DDC_SEGM, msg->addr << 1);
  442. else if (msg->addr == DDC_ADDR)
  443. hdmi_writeb(hdmi, ZX_DDC_ADDR, msg->addr << 1);
  444. hdmi_writeb(hdmi, ZX_DDC_OFFSET, msg->buf[0]);
  445. return 0;
  446. }
  447. static int zx_hdmi_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
  448. int num)
  449. {
  450. struct zx_hdmi *hdmi = i2c_get_adapdata(adap);
  451. struct zx_hdmi_i2c *ddc = hdmi->ddc;
  452. int i, ret = 0;
  453. mutex_lock(&ddc->lock);
  454. /* Enable DDC master access */
  455. hdmi_writeb_mask(hdmi, TPI_DDC_MASTER_EN, HW_DDC_MASTER, HW_DDC_MASTER);
  456. for (i = 0; i < num; i++) {
  457. DRM_DEV_DEBUG(hdmi->dev,
  458. "xfer: num: %d/%d, len: %d, flags: %#x\n",
  459. i + 1, num, msgs[i].len, msgs[i].flags);
  460. if (msgs[i].flags & I2C_M_RD)
  461. ret = zx_hdmi_i2c_read(hdmi, &msgs[i]);
  462. else
  463. ret = zx_hdmi_i2c_write(hdmi, &msgs[i]);
  464. if (ret < 0)
  465. break;
  466. }
  467. if (!ret)
  468. ret = num;
  469. /* Disable DDC master access */
  470. hdmi_writeb_mask(hdmi, TPI_DDC_MASTER_EN, HW_DDC_MASTER, 0);
  471. mutex_unlock(&ddc->lock);
  472. return ret;
  473. }
  474. static u32 zx_hdmi_i2c_func(struct i2c_adapter *adapter)
  475. {
  476. return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
  477. }
  478. static const struct i2c_algorithm zx_hdmi_algorithm = {
  479. .master_xfer = zx_hdmi_i2c_xfer,
  480. .functionality = zx_hdmi_i2c_func,
  481. };
  482. static int zx_hdmi_ddc_register(struct zx_hdmi *hdmi)
  483. {
  484. struct i2c_adapter *adap;
  485. struct zx_hdmi_i2c *ddc;
  486. int ret;
  487. ddc = devm_kzalloc(hdmi->dev, sizeof(*ddc), GFP_KERNEL);
  488. if (!ddc)
  489. return -ENOMEM;
  490. hdmi->ddc = ddc;
  491. mutex_init(&ddc->lock);
  492. adap = &ddc->adap;
  493. adap->owner = THIS_MODULE;
  494. adap->class = I2C_CLASS_DDC;
  495. adap->dev.parent = hdmi->dev;
  496. adap->algo = &zx_hdmi_algorithm;
  497. snprintf(adap->name, sizeof(adap->name), "zx hdmi i2c");
  498. ret = i2c_add_adapter(adap);
  499. if (ret) {
  500. DRM_DEV_ERROR(hdmi->dev, "failed to add I2C adapter: %d\n",
  501. ret);
  502. return ret;
  503. }
  504. i2c_set_adapdata(adap, hdmi);
  505. return 0;
  506. }
  507. static int zx_hdmi_bind(struct device *dev, struct device *master, void *data)
  508. {
  509. struct platform_device *pdev = to_platform_device(dev);
  510. struct drm_device *drm = data;
  511. struct resource *res;
  512. struct zx_hdmi *hdmi;
  513. int irq;
  514. int ret;
  515. hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
  516. if (!hdmi)
  517. return -ENOMEM;
  518. hdmi->dev = dev;
  519. hdmi->drm = drm;
  520. dev_set_drvdata(dev, hdmi);
  521. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  522. hdmi->mmio = devm_ioremap_resource(dev, res);
  523. if (IS_ERR(hdmi->mmio)) {
  524. ret = PTR_ERR(hdmi->mmio);
  525. DRM_DEV_ERROR(dev, "failed to remap hdmi region: %d\n", ret);
  526. return ret;
  527. }
  528. irq = platform_get_irq(pdev, 0);
  529. if (irq < 0)
  530. return irq;
  531. hdmi->cec_clk = devm_clk_get(hdmi->dev, "osc_cec");
  532. if (IS_ERR(hdmi->cec_clk)) {
  533. ret = PTR_ERR(hdmi->cec_clk);
  534. DRM_DEV_ERROR(dev, "failed to get cec_clk: %d\n", ret);
  535. return ret;
  536. }
  537. hdmi->osc_clk = devm_clk_get(hdmi->dev, "osc_clk");
  538. if (IS_ERR(hdmi->osc_clk)) {
  539. ret = PTR_ERR(hdmi->osc_clk);
  540. DRM_DEV_ERROR(dev, "failed to get osc_clk: %d\n", ret);
  541. return ret;
  542. }
  543. hdmi->xclk = devm_clk_get(hdmi->dev, "xclk");
  544. if (IS_ERR(hdmi->xclk)) {
  545. ret = PTR_ERR(hdmi->xclk);
  546. DRM_DEV_ERROR(dev, "failed to get xclk: %d\n", ret);
  547. return ret;
  548. }
  549. ret = zx_hdmi_ddc_register(hdmi);
  550. if (ret) {
  551. DRM_DEV_ERROR(dev, "failed to register ddc: %d\n", ret);
  552. return ret;
  553. }
  554. ret = zx_hdmi_audio_register(hdmi);
  555. if (ret) {
  556. DRM_DEV_ERROR(dev, "failed to register audio: %d\n", ret);
  557. return ret;
  558. }
  559. ret = zx_hdmi_register(drm, hdmi);
  560. if (ret) {
  561. DRM_DEV_ERROR(dev, "failed to register hdmi: %d\n", ret);
  562. return ret;
  563. }
  564. ret = devm_request_threaded_irq(dev, irq, zx_hdmi_irq_handler,
  565. zx_hdmi_irq_thread, IRQF_SHARED,
  566. dev_name(dev), hdmi);
  567. if (ret) {
  568. DRM_DEV_ERROR(dev, "failed to request threaded irq: %d\n", ret);
  569. return ret;
  570. }
  571. return 0;
  572. }
  573. static void zx_hdmi_unbind(struct device *dev, struct device *master,
  574. void *data)
  575. {
  576. struct zx_hdmi *hdmi = dev_get_drvdata(dev);
  577. hdmi->connector.funcs->destroy(&hdmi->connector);
  578. hdmi->encoder.funcs->destroy(&hdmi->encoder);
  579. if (hdmi->audio_pdev)
  580. platform_device_unregister(hdmi->audio_pdev);
  581. }
  582. static const struct component_ops zx_hdmi_component_ops = {
  583. .bind = zx_hdmi_bind,
  584. .unbind = zx_hdmi_unbind,
  585. };
  586. static int zx_hdmi_probe(struct platform_device *pdev)
  587. {
  588. return component_add(&pdev->dev, &zx_hdmi_component_ops);
  589. }
  590. static int zx_hdmi_remove(struct platform_device *pdev)
  591. {
  592. component_del(&pdev->dev, &zx_hdmi_component_ops);
  593. return 0;
  594. }
  595. static const struct of_device_id zx_hdmi_of_match[] = {
  596. { .compatible = "zte,zx296718-hdmi", },
  597. { /* end */ },
  598. };
  599. MODULE_DEVICE_TABLE(of, zx_hdmi_of_match);
  600. struct platform_driver zx_hdmi_driver = {
  601. .probe = zx_hdmi_probe,
  602. .remove = zx_hdmi_remove,
  603. .driver = {
  604. .name = "zx-hdmi",
  605. .of_match_table = zx_hdmi_of_match,
  606. },
  607. };