cxllib.c 6.6 KB

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  1. /*
  2. * Copyright 2017 IBM Corp.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * as published by the Free Software Foundation; either version
  7. * 2 of the License, or (at your option) any later version.
  8. */
  9. #include <linux/hugetlb.h>
  10. #include <linux/sched/mm.h>
  11. #include <asm/pnv-pci.h>
  12. #include <misc/cxllib.h>
  13. #include "cxl.h"
  14. #define CXL_INVALID_DRA ~0ull
  15. #define CXL_DUMMY_READ_SIZE 128
  16. #define CXL_DUMMY_READ_ALIGN 8
  17. #define CXL_CAPI_WINDOW_START 0x2000000000000ull
  18. #define CXL_CAPI_WINDOW_LOG_SIZE 48
  19. #define CXL_XSL_CONFIG_CURRENT_VERSION CXL_XSL_CONFIG_VERSION1
  20. bool cxllib_slot_is_supported(struct pci_dev *dev, unsigned long flags)
  21. {
  22. int rc;
  23. u32 phb_index;
  24. u64 chip_id, capp_unit_id;
  25. /* No flags currently supported */
  26. if (flags)
  27. return false;
  28. if (!cpu_has_feature(CPU_FTR_HVMODE))
  29. return false;
  30. if (!cxl_is_power9())
  31. return false;
  32. if (cxl_slot_is_switched(dev))
  33. return false;
  34. /* on p9, some pci slots are not connected to a CAPP unit */
  35. rc = cxl_calc_capp_routing(dev, &chip_id, &phb_index, &capp_unit_id);
  36. if (rc)
  37. return false;
  38. return true;
  39. }
  40. EXPORT_SYMBOL_GPL(cxllib_slot_is_supported);
  41. static DEFINE_MUTEX(dra_mutex);
  42. static u64 dummy_read_addr = CXL_INVALID_DRA;
  43. static int allocate_dummy_read_buf(void)
  44. {
  45. u64 buf, vaddr;
  46. size_t buf_size;
  47. /*
  48. * Dummy read buffer is 128-byte long, aligned on a
  49. * 256-byte boundary and we need the physical address.
  50. */
  51. buf_size = CXL_DUMMY_READ_SIZE + (1ull << CXL_DUMMY_READ_ALIGN);
  52. buf = (u64) kzalloc(buf_size, GFP_KERNEL);
  53. if (!buf)
  54. return -ENOMEM;
  55. vaddr = (buf + (1ull << CXL_DUMMY_READ_ALIGN) - 1) &
  56. (~0ull << CXL_DUMMY_READ_ALIGN);
  57. WARN((vaddr + CXL_DUMMY_READ_SIZE) > (buf + buf_size),
  58. "Dummy read buffer alignment issue");
  59. dummy_read_addr = virt_to_phys((void *) vaddr);
  60. return 0;
  61. }
  62. int cxllib_get_xsl_config(struct pci_dev *dev, struct cxllib_xsl_config *cfg)
  63. {
  64. int rc;
  65. u32 phb_index;
  66. u64 chip_id, capp_unit_id;
  67. if (!cpu_has_feature(CPU_FTR_HVMODE))
  68. return -EINVAL;
  69. mutex_lock(&dra_mutex);
  70. if (dummy_read_addr == CXL_INVALID_DRA) {
  71. rc = allocate_dummy_read_buf();
  72. if (rc) {
  73. mutex_unlock(&dra_mutex);
  74. return rc;
  75. }
  76. }
  77. mutex_unlock(&dra_mutex);
  78. rc = cxl_calc_capp_routing(dev, &chip_id, &phb_index, &capp_unit_id);
  79. if (rc)
  80. return rc;
  81. rc = cxl_get_xsl9_dsnctl(dev, capp_unit_id, &cfg->dsnctl);
  82. if (rc)
  83. return rc;
  84. cfg->version = CXL_XSL_CONFIG_CURRENT_VERSION;
  85. cfg->log_bar_size = CXL_CAPI_WINDOW_LOG_SIZE;
  86. cfg->bar_addr = CXL_CAPI_WINDOW_START;
  87. cfg->dra = dummy_read_addr;
  88. return 0;
  89. }
  90. EXPORT_SYMBOL_GPL(cxllib_get_xsl_config);
  91. int cxllib_switch_phb_mode(struct pci_dev *dev, enum cxllib_mode mode,
  92. unsigned long flags)
  93. {
  94. int rc = 0;
  95. if (!cpu_has_feature(CPU_FTR_HVMODE))
  96. return -EINVAL;
  97. switch (mode) {
  98. case CXL_MODE_PCI:
  99. /*
  100. * We currently don't support going back to PCI mode
  101. * However, we'll turn the invalidations off, so that
  102. * the firmware doesn't have to ack them and can do
  103. * things like reset, etc.. with no worries.
  104. * So always return EPERM (can't go back to PCI) or
  105. * EBUSY if we couldn't even turn off snooping
  106. */
  107. rc = pnv_phb_to_cxl_mode(dev, OPAL_PHB_CAPI_MODE_SNOOP_OFF);
  108. if (rc)
  109. rc = -EBUSY;
  110. else
  111. rc = -EPERM;
  112. break;
  113. case CXL_MODE_CXL:
  114. /* DMA only supported on TVT1 for the time being */
  115. if (flags != CXL_MODE_DMA_TVT1)
  116. return -EINVAL;
  117. rc = pnv_phb_to_cxl_mode(dev, OPAL_PHB_CAPI_MODE_DMA_TVT1);
  118. if (rc)
  119. return rc;
  120. rc = pnv_phb_to_cxl_mode(dev, OPAL_PHB_CAPI_MODE_SNOOP_ON);
  121. break;
  122. default:
  123. rc = -EINVAL;
  124. }
  125. return rc;
  126. }
  127. EXPORT_SYMBOL_GPL(cxllib_switch_phb_mode);
  128. /*
  129. * When switching the PHB to capi mode, the TVT#1 entry for
  130. * the Partitionable Endpoint is set in bypass mode, like
  131. * in PCI mode.
  132. * Configure the device dma to use TVT#1, which is done
  133. * by calling dma_set_mask() with a mask large enough.
  134. */
  135. int cxllib_set_device_dma(struct pci_dev *dev, unsigned long flags)
  136. {
  137. int rc;
  138. if (flags)
  139. return -EINVAL;
  140. rc = dma_set_mask(&dev->dev, DMA_BIT_MASK(64));
  141. return rc;
  142. }
  143. EXPORT_SYMBOL_GPL(cxllib_set_device_dma);
  144. int cxllib_get_PE_attributes(struct task_struct *task,
  145. unsigned long translation_mode,
  146. struct cxllib_pe_attributes *attr)
  147. {
  148. struct mm_struct *mm = NULL;
  149. if (translation_mode != CXL_TRANSLATED_MODE &&
  150. translation_mode != CXL_REAL_MODE)
  151. return -EINVAL;
  152. attr->sr = cxl_calculate_sr(false,
  153. task == NULL,
  154. translation_mode == CXL_REAL_MODE,
  155. true);
  156. attr->lpid = mfspr(SPRN_LPID);
  157. if (task) {
  158. mm = get_task_mm(task);
  159. if (mm == NULL)
  160. return -EINVAL;
  161. /*
  162. * Caller is keeping a reference on mm_users for as long
  163. * as XSL uses the memory context
  164. */
  165. attr->pid = mm->context.id;
  166. mmput(mm);
  167. attr->tid = task->thread.tidr;
  168. } else {
  169. attr->pid = 0;
  170. attr->tid = 0;
  171. }
  172. return 0;
  173. }
  174. EXPORT_SYMBOL_GPL(cxllib_get_PE_attributes);
  175. static int get_vma_info(struct mm_struct *mm, u64 addr,
  176. u64 *vma_start, u64 *vma_end,
  177. unsigned long *page_size)
  178. {
  179. struct vm_area_struct *vma = NULL;
  180. int rc = 0;
  181. down_read(&mm->mmap_sem);
  182. vma = find_vma(mm, addr);
  183. if (!vma) {
  184. rc = -EFAULT;
  185. goto out;
  186. }
  187. *page_size = vma_kernel_pagesize(vma);
  188. *vma_start = vma->vm_start;
  189. *vma_end = vma->vm_end;
  190. out:
  191. up_read(&mm->mmap_sem);
  192. return rc;
  193. }
  194. int cxllib_handle_fault(struct mm_struct *mm, u64 addr, u64 size, u64 flags)
  195. {
  196. int rc;
  197. u64 dar, vma_start, vma_end;
  198. unsigned long page_size;
  199. if (mm == NULL)
  200. return -EFAULT;
  201. /*
  202. * The buffer we have to process can extend over several pages
  203. * and may also cover several VMAs.
  204. * We iterate over all the pages. The page size could vary
  205. * between VMAs.
  206. */
  207. rc = get_vma_info(mm, addr, &vma_start, &vma_end, &page_size);
  208. if (rc)
  209. return rc;
  210. for (dar = (addr & ~(page_size - 1)); dar < (addr + size);
  211. dar += page_size) {
  212. if (dar < vma_start || dar >= vma_end) {
  213. /*
  214. * We don't hold the mm->mmap_sem semaphore
  215. * while iterating, since the semaphore is
  216. * required by one of the lower-level page
  217. * fault processing functions and it could
  218. * create a deadlock.
  219. *
  220. * It means the VMAs can be altered between 2
  221. * loop iterations and we could theoretically
  222. * miss a page (however unlikely). But that's
  223. * not really a problem, as the driver will
  224. * retry access, get another page fault on the
  225. * missing page and call us again.
  226. */
  227. rc = get_vma_info(mm, dar, &vma_start, &vma_end,
  228. &page_size);
  229. if (rc)
  230. return rc;
  231. }
  232. rc = cxl_handle_mm_fault(mm, flags, dar);
  233. if (rc)
  234. return -EFAULT;
  235. }
  236. return 0;
  237. }
  238. EXPORT_SYMBOL_GPL(cxllib_handle_fault);