mic_x100.c 16 KB

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  1. /*
  2. * Intel MIC Platform Software Stack (MPSS)
  3. *
  4. * Copyright(c) 2013 Intel Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License, version 2, as
  8. * published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * The full GNU General Public License is included in this distribution in
  16. * the file called "COPYING".
  17. *
  18. * Intel MIC Host driver.
  19. *
  20. */
  21. #include <linux/fs.h>
  22. #include <linux/pci.h>
  23. #include <linux/sched.h>
  24. #include <linux/firmware.h>
  25. #include <linux/delay.h>
  26. #include "../common/mic_dev.h"
  27. #include "mic_device.h"
  28. #include "mic_x100.h"
  29. #include "mic_smpt.h"
  30. /**
  31. * mic_x100_write_spad - write to the scratchpad register
  32. * @mdev: pointer to mic_device instance
  33. * @idx: index to the scratchpad register, 0 based
  34. * @val: the data value to put into the register
  35. *
  36. * This function allows writing of a 32bit value to the indexed scratchpad
  37. * register.
  38. *
  39. * RETURNS: none.
  40. */
  41. static void
  42. mic_x100_write_spad(struct mic_device *mdev, unsigned int idx, u32 val)
  43. {
  44. dev_dbg(&mdev->pdev->dev, "Writing 0x%x to scratch pad index %d\n",
  45. val, idx);
  46. mic_mmio_write(&mdev->mmio, val,
  47. MIC_X100_SBOX_BASE_ADDRESS +
  48. MIC_X100_SBOX_SPAD0 + idx * 4);
  49. }
  50. /**
  51. * mic_x100_read_spad - read from the scratchpad register
  52. * @mdev: pointer to mic_device instance
  53. * @idx: index to scratchpad register, 0 based
  54. *
  55. * This function allows reading of the 32bit scratchpad register.
  56. *
  57. * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
  58. */
  59. static u32
  60. mic_x100_read_spad(struct mic_device *mdev, unsigned int idx)
  61. {
  62. u32 val = mic_mmio_read(&mdev->mmio,
  63. MIC_X100_SBOX_BASE_ADDRESS +
  64. MIC_X100_SBOX_SPAD0 + idx * 4);
  65. dev_dbg(&mdev->pdev->dev,
  66. "Reading 0x%x from scratch pad index %d\n", val, idx);
  67. return val;
  68. }
  69. /**
  70. * mic_x100_enable_interrupts - Enable interrupts.
  71. * @mdev: pointer to mic_device instance
  72. */
  73. static void mic_x100_enable_interrupts(struct mic_device *mdev)
  74. {
  75. u32 reg;
  76. struct mic_mw *mw = &mdev->mmio;
  77. u32 sice0 = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_SICE0;
  78. u32 siac0 = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_SIAC0;
  79. reg = mic_mmio_read(mw, sice0);
  80. reg |= MIC_X100_SBOX_DBR_BITS(0xf) | MIC_X100_SBOX_DMA_BITS(0xff);
  81. mic_mmio_write(mw, reg, sice0);
  82. /*
  83. * Enable auto-clear when enabling interrupts. Applicable only for
  84. * MSI-x. Legacy and MSI mode cannot have auto-clear enabled.
  85. */
  86. if (mdev->irq_info.num_vectors > 1) {
  87. reg = mic_mmio_read(mw, siac0);
  88. reg |= MIC_X100_SBOX_DBR_BITS(0xf) |
  89. MIC_X100_SBOX_DMA_BITS(0xff);
  90. mic_mmio_write(mw, reg, siac0);
  91. }
  92. }
  93. /**
  94. * mic_x100_disable_interrupts - Disable interrupts.
  95. * @mdev: pointer to mic_device instance
  96. */
  97. static void mic_x100_disable_interrupts(struct mic_device *mdev)
  98. {
  99. u32 reg;
  100. struct mic_mw *mw = &mdev->mmio;
  101. u32 sice0 = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_SICE0;
  102. u32 siac0 = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_SIAC0;
  103. u32 sicc0 = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_SICC0;
  104. reg = mic_mmio_read(mw, sice0);
  105. mic_mmio_write(mw, reg, sicc0);
  106. if (mdev->irq_info.num_vectors > 1) {
  107. reg = mic_mmio_read(mw, siac0);
  108. reg &= ~(MIC_X100_SBOX_DBR_BITS(0xf) |
  109. MIC_X100_SBOX_DMA_BITS(0xff));
  110. mic_mmio_write(mw, reg, siac0);
  111. }
  112. }
  113. /**
  114. * mic_x100_send_sbox_intr - Send an MIC_X100_SBOX interrupt to MIC.
  115. * @mdev: pointer to mic_device instance
  116. */
  117. static void mic_x100_send_sbox_intr(struct mic_device *mdev,
  118. int doorbell)
  119. {
  120. struct mic_mw *mw = &mdev->mmio;
  121. u64 apic_icr_offset = MIC_X100_SBOX_APICICR0 + doorbell * 8;
  122. u32 apicicr_low = mic_mmio_read(mw, MIC_X100_SBOX_BASE_ADDRESS +
  123. apic_icr_offset);
  124. /* for MIC we need to make sure we "hit" the send_icr bit (13) */
  125. apicicr_low = (apicicr_low | (1 << 13));
  126. /* Ensure that the interrupt is ordered w.r.t. previous stores. */
  127. wmb();
  128. mic_mmio_write(mw, apicicr_low,
  129. MIC_X100_SBOX_BASE_ADDRESS + apic_icr_offset);
  130. }
  131. /**
  132. * mic_x100_send_rdmasr_intr - Send an RDMASR interrupt to MIC.
  133. * @mdev: pointer to mic_device instance
  134. */
  135. static void mic_x100_send_rdmasr_intr(struct mic_device *mdev,
  136. int doorbell)
  137. {
  138. int rdmasr_offset = MIC_X100_SBOX_RDMASR0 + (doorbell << 2);
  139. /* Ensure that the interrupt is ordered w.r.t. previous stores. */
  140. wmb();
  141. mic_mmio_write(&mdev->mmio, 0,
  142. MIC_X100_SBOX_BASE_ADDRESS + rdmasr_offset);
  143. }
  144. /**
  145. * __mic_x100_send_intr - Send interrupt to MIC.
  146. * @mdev: pointer to mic_device instance
  147. * @doorbell: doorbell number.
  148. */
  149. static void mic_x100_send_intr(struct mic_device *mdev, int doorbell)
  150. {
  151. int rdmasr_db;
  152. if (doorbell < MIC_X100_NUM_SBOX_IRQ) {
  153. mic_x100_send_sbox_intr(mdev, doorbell);
  154. } else {
  155. rdmasr_db = doorbell - MIC_X100_NUM_SBOX_IRQ;
  156. mic_x100_send_rdmasr_intr(mdev, rdmasr_db);
  157. }
  158. }
  159. /**
  160. * mic_x100_ack_interrupt - Read the interrupt sources register and
  161. * clear it. This function will be called in the MSI/INTx case.
  162. * @mdev: Pointer to mic_device instance.
  163. *
  164. * Returns: bitmask of interrupt sources triggered.
  165. */
  166. static u32 mic_x100_ack_interrupt(struct mic_device *mdev)
  167. {
  168. u32 sicr0 = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_SICR0;
  169. u32 reg = mic_mmio_read(&mdev->mmio, sicr0);
  170. mic_mmio_write(&mdev->mmio, reg, sicr0);
  171. return reg;
  172. }
  173. /**
  174. * mic_x100_intr_workarounds - These hardware specific workarounds are
  175. * to be invoked everytime an interrupt is handled.
  176. * @mdev: Pointer to mic_device instance.
  177. *
  178. * Returns: none
  179. */
  180. static void mic_x100_intr_workarounds(struct mic_device *mdev)
  181. {
  182. struct mic_mw *mw = &mdev->mmio;
  183. /* Clear pending bit array. */
  184. if (MIC_A0_STEP == mdev->stepping)
  185. mic_mmio_write(mw, 1, MIC_X100_SBOX_BASE_ADDRESS +
  186. MIC_X100_SBOX_MSIXPBACR);
  187. if (mdev->stepping >= MIC_B0_STEP)
  188. mdev->intr_ops->enable_interrupts(mdev);
  189. }
  190. /**
  191. * mic_x100_hw_intr_init - Initialize h/w specific interrupt
  192. * information.
  193. * @mdev: pointer to mic_device instance
  194. */
  195. static void mic_x100_hw_intr_init(struct mic_device *mdev)
  196. {
  197. mdev->intr_info = (struct mic_intr_info *)mic_x100_intr_init;
  198. }
  199. /**
  200. * mic_x100_read_msi_to_src_map - read from the MSI mapping registers
  201. * @mdev: pointer to mic_device instance
  202. * @idx: index to the mapping register, 0 based
  203. *
  204. * This function allows reading of the 32bit MSI mapping register.
  205. *
  206. * RETURNS: The value in the register.
  207. */
  208. static u32
  209. mic_x100_read_msi_to_src_map(struct mic_device *mdev, int idx)
  210. {
  211. return mic_mmio_read(&mdev->mmio,
  212. MIC_X100_SBOX_BASE_ADDRESS +
  213. MIC_X100_SBOX_MXAR0 + idx * 4);
  214. }
  215. /**
  216. * mic_x100_program_msi_to_src_map - program the MSI mapping registers
  217. * @mdev: pointer to mic_device instance
  218. * @idx: index to the mapping register, 0 based
  219. * @offset: The bit offset in the register that needs to be updated.
  220. * @set: boolean specifying if the bit in the specified offset needs
  221. * to be set or cleared.
  222. *
  223. * RETURNS: None.
  224. */
  225. static void
  226. mic_x100_program_msi_to_src_map(struct mic_device *mdev,
  227. int idx, int offset, bool set)
  228. {
  229. unsigned long reg;
  230. struct mic_mw *mw = &mdev->mmio;
  231. u32 mxar = MIC_X100_SBOX_BASE_ADDRESS +
  232. MIC_X100_SBOX_MXAR0 + idx * 4;
  233. reg = mic_mmio_read(mw, mxar);
  234. if (set)
  235. __set_bit(offset, &reg);
  236. else
  237. __clear_bit(offset, &reg);
  238. mic_mmio_write(mw, reg, mxar);
  239. }
  240. /*
  241. * mic_x100_reset_fw_ready - Reset Firmware ready status field.
  242. * @mdev: pointer to mic_device instance
  243. */
  244. static void mic_x100_reset_fw_ready(struct mic_device *mdev)
  245. {
  246. mdev->ops->write_spad(mdev, MIC_X100_DOWNLOAD_INFO, 0);
  247. }
  248. /*
  249. * mic_x100_is_fw_ready - Check if firmware is ready.
  250. * @mdev: pointer to mic_device instance
  251. */
  252. static bool mic_x100_is_fw_ready(struct mic_device *mdev)
  253. {
  254. u32 scratch2 = mdev->ops->read_spad(mdev, MIC_X100_DOWNLOAD_INFO);
  255. return MIC_X100_SPAD2_DOWNLOAD_STATUS(scratch2) ? true : false;
  256. }
  257. /**
  258. * mic_x100_get_apic_id - Get bootstrap APIC ID.
  259. * @mdev: pointer to mic_device instance
  260. */
  261. static u32 mic_x100_get_apic_id(struct mic_device *mdev)
  262. {
  263. u32 scratch2 = 0;
  264. scratch2 = mdev->ops->read_spad(mdev, MIC_X100_DOWNLOAD_INFO);
  265. return MIC_X100_SPAD2_APIC_ID(scratch2);
  266. }
  267. /**
  268. * mic_x100_send_firmware_intr - Send an interrupt to the firmware on MIC.
  269. * @mdev: pointer to mic_device instance
  270. */
  271. static void mic_x100_send_firmware_intr(struct mic_device *mdev)
  272. {
  273. u32 apicicr_low;
  274. u64 apic_icr_offset = MIC_X100_SBOX_APICICR7;
  275. int vector = MIC_X100_BSP_INTERRUPT_VECTOR;
  276. struct mic_mw *mw = &mdev->mmio;
  277. /*
  278. * For MIC we need to make sure we "hit"
  279. * the send_icr bit (13).
  280. */
  281. apicicr_low = (vector | (1 << 13));
  282. mic_mmio_write(mw, mic_x100_get_apic_id(mdev),
  283. MIC_X100_SBOX_BASE_ADDRESS + apic_icr_offset + 4);
  284. /* Ensure that the interrupt is ordered w.r.t. previous stores. */
  285. wmb();
  286. mic_mmio_write(mw, apicicr_low,
  287. MIC_X100_SBOX_BASE_ADDRESS + apic_icr_offset);
  288. }
  289. /**
  290. * mic_x100_hw_reset - Reset the MIC device.
  291. * @mdev: pointer to mic_device instance
  292. */
  293. static void mic_x100_hw_reset(struct mic_device *mdev)
  294. {
  295. u32 reset_reg;
  296. u32 rgcr = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_RGCR;
  297. struct mic_mw *mw = &mdev->mmio;
  298. /* Ensure that the reset is ordered w.r.t. previous loads and stores */
  299. mb();
  300. /* Trigger reset */
  301. reset_reg = mic_mmio_read(mw, rgcr);
  302. reset_reg |= 0x1;
  303. mic_mmio_write(mw, reset_reg, rgcr);
  304. /*
  305. * It seems we really want to delay at least 1 second
  306. * after touching reset to prevent a lot of problems.
  307. */
  308. msleep(1000);
  309. }
  310. /**
  311. * mic_x100_load_command_line - Load command line to MIC.
  312. * @mdev: pointer to mic_device instance
  313. * @fw: the firmware image
  314. *
  315. * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
  316. */
  317. static int
  318. mic_x100_load_command_line(struct mic_device *mdev, const struct firmware *fw)
  319. {
  320. u32 len = 0;
  321. u32 boot_mem;
  322. char *buf;
  323. void __iomem *cmd_line_va = mdev->aper.va + mdev->bootaddr + fw->size;
  324. #define CMDLINE_SIZE 2048
  325. boot_mem = mdev->aper.len >> 20;
  326. buf = kzalloc(CMDLINE_SIZE, GFP_KERNEL);
  327. if (!buf)
  328. return -ENOMEM;
  329. len += snprintf(buf, CMDLINE_SIZE - len,
  330. " mem=%dM", boot_mem);
  331. if (mdev->cosm_dev->cmdline)
  332. snprintf(buf + len, CMDLINE_SIZE - len, " %s",
  333. mdev->cosm_dev->cmdline);
  334. memcpy_toio(cmd_line_va, buf, strlen(buf) + 1);
  335. kfree(buf);
  336. return 0;
  337. }
  338. /**
  339. * mic_x100_load_ramdisk - Load ramdisk to MIC.
  340. * @mdev: pointer to mic_device instance
  341. *
  342. * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
  343. */
  344. static int
  345. mic_x100_load_ramdisk(struct mic_device *mdev)
  346. {
  347. const struct firmware *fw;
  348. int rc;
  349. struct boot_params __iomem *bp = mdev->aper.va + mdev->bootaddr;
  350. rc = request_firmware(&fw, mdev->cosm_dev->ramdisk, &mdev->pdev->dev);
  351. if (rc < 0) {
  352. dev_err(&mdev->pdev->dev,
  353. "ramdisk request_firmware failed: %d %s\n",
  354. rc, mdev->cosm_dev->ramdisk);
  355. goto error;
  356. }
  357. /*
  358. * Typically the bootaddr for card OS is 64M
  359. * so copy over the ramdisk @ 128M.
  360. */
  361. memcpy_toio(mdev->aper.va + (mdev->bootaddr << 1), fw->data, fw->size);
  362. iowrite32(mdev->bootaddr << 1, &bp->hdr.ramdisk_image);
  363. iowrite32(fw->size, &bp->hdr.ramdisk_size);
  364. release_firmware(fw);
  365. error:
  366. return rc;
  367. }
  368. /**
  369. * mic_x100_get_boot_addr - Get MIC boot address.
  370. * @mdev: pointer to mic_device instance
  371. *
  372. * This function is called during firmware load to determine
  373. * the address at which the OS should be downloaded in card
  374. * memory i.e. GDDR.
  375. * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
  376. */
  377. static int
  378. mic_x100_get_boot_addr(struct mic_device *mdev)
  379. {
  380. u32 scratch2, boot_addr;
  381. int rc = 0;
  382. scratch2 = mdev->ops->read_spad(mdev, MIC_X100_DOWNLOAD_INFO);
  383. boot_addr = MIC_X100_SPAD2_DOWNLOAD_ADDR(scratch2);
  384. dev_dbg(&mdev->pdev->dev, "%s %d boot_addr 0x%x\n",
  385. __func__, __LINE__, boot_addr);
  386. if (boot_addr > (1 << 31)) {
  387. dev_err(&mdev->pdev->dev,
  388. "incorrect bootaddr 0x%x\n",
  389. boot_addr);
  390. rc = -EINVAL;
  391. goto error;
  392. }
  393. mdev->bootaddr = boot_addr;
  394. error:
  395. return rc;
  396. }
  397. /**
  398. * mic_x100_load_firmware - Load firmware to MIC.
  399. * @mdev: pointer to mic_device instance
  400. * @buf: buffer containing boot string including firmware/ramdisk path.
  401. *
  402. * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
  403. */
  404. static int
  405. mic_x100_load_firmware(struct mic_device *mdev, const char *buf)
  406. {
  407. int rc;
  408. const struct firmware *fw;
  409. rc = mic_x100_get_boot_addr(mdev);
  410. if (rc)
  411. return rc;
  412. /* load OS */
  413. rc = request_firmware(&fw, mdev->cosm_dev->firmware, &mdev->pdev->dev);
  414. if (rc < 0) {
  415. dev_err(&mdev->pdev->dev,
  416. "ramdisk request_firmware failed: %d %s\n",
  417. rc, mdev->cosm_dev->firmware);
  418. return rc;
  419. }
  420. if (mdev->bootaddr > mdev->aper.len - fw->size) {
  421. rc = -EINVAL;
  422. dev_err(&mdev->pdev->dev, "%s %d rc %d bootaddr 0x%x\n",
  423. __func__, __LINE__, rc, mdev->bootaddr);
  424. goto error;
  425. }
  426. memcpy_toio(mdev->aper.va + mdev->bootaddr, fw->data, fw->size);
  427. mdev->ops->write_spad(mdev, MIC_X100_FW_SIZE, fw->size);
  428. if (!strcmp(mdev->cosm_dev->bootmode, "flash")) {
  429. rc = -EINVAL;
  430. dev_err(&mdev->pdev->dev, "%s %d rc %d\n",
  431. __func__, __LINE__, rc);
  432. goto error;
  433. }
  434. /* load command line */
  435. rc = mic_x100_load_command_line(mdev, fw);
  436. if (rc) {
  437. dev_err(&mdev->pdev->dev, "%s %d rc %d\n",
  438. __func__, __LINE__, rc);
  439. goto error;
  440. }
  441. release_firmware(fw);
  442. /* load ramdisk */
  443. if (mdev->cosm_dev->ramdisk)
  444. rc = mic_x100_load_ramdisk(mdev);
  445. return rc;
  446. error:
  447. release_firmware(fw);
  448. return rc;
  449. }
  450. /**
  451. * mic_x100_get_postcode - Get postcode status from firmware.
  452. * @mdev: pointer to mic_device instance
  453. *
  454. * RETURNS: postcode.
  455. */
  456. static u32 mic_x100_get_postcode(struct mic_device *mdev)
  457. {
  458. return mic_mmio_read(&mdev->mmio, MIC_X100_POSTCODE);
  459. }
  460. /**
  461. * mic_x100_smpt_set - Update an SMPT entry with a DMA address.
  462. * @mdev: pointer to mic_device instance
  463. *
  464. * RETURNS: none.
  465. */
  466. static void
  467. mic_x100_smpt_set(struct mic_device *mdev, dma_addr_t dma_addr, u8 index)
  468. {
  469. #define SNOOP_ON (0 << 0)
  470. #define SNOOP_OFF (1 << 0)
  471. /*
  472. * Sbox Smpt Reg Bits:
  473. * Bits 31:2 Host address
  474. * Bits 1 RSVD
  475. * Bits 0 No snoop
  476. */
  477. #define BUILD_SMPT(NO_SNOOP, HOST_ADDR) \
  478. (u32)(((HOST_ADDR) << 2) | ((NO_SNOOP) & 0x01))
  479. uint32_t smpt_reg_val = BUILD_SMPT(SNOOP_ON,
  480. dma_addr >> mdev->smpt->info.page_shift);
  481. mic_mmio_write(&mdev->mmio, smpt_reg_val,
  482. MIC_X100_SBOX_BASE_ADDRESS +
  483. MIC_X100_SBOX_SMPT00 + (4 * index));
  484. }
  485. /**
  486. * mic_x100_smpt_hw_init - Initialize SMPT X100 specific fields.
  487. * @mdev: pointer to mic_device instance
  488. *
  489. * RETURNS: none.
  490. */
  491. static void mic_x100_smpt_hw_init(struct mic_device *mdev)
  492. {
  493. struct mic_smpt_hw_info *info = &mdev->smpt->info;
  494. info->num_reg = 32;
  495. info->page_shift = 34;
  496. info->page_size = (1ULL << info->page_shift);
  497. info->base = 0x8000000000ULL;
  498. }
  499. struct mic_smpt_ops mic_x100_smpt_ops = {
  500. .init = mic_x100_smpt_hw_init,
  501. .set = mic_x100_smpt_set,
  502. };
  503. static bool mic_x100_dma_filter(struct dma_chan *chan, void *param)
  504. {
  505. if (chan->device->dev->parent == (struct device *)param)
  506. return true;
  507. return false;
  508. }
  509. struct mic_hw_ops mic_x100_ops = {
  510. .aper_bar = MIC_X100_APER_BAR,
  511. .mmio_bar = MIC_X100_MMIO_BAR,
  512. .read_spad = mic_x100_read_spad,
  513. .write_spad = mic_x100_write_spad,
  514. .send_intr = mic_x100_send_intr,
  515. .ack_interrupt = mic_x100_ack_interrupt,
  516. .intr_workarounds = mic_x100_intr_workarounds,
  517. .reset = mic_x100_hw_reset,
  518. .reset_fw_ready = mic_x100_reset_fw_ready,
  519. .is_fw_ready = mic_x100_is_fw_ready,
  520. .send_firmware_intr = mic_x100_send_firmware_intr,
  521. .load_mic_fw = mic_x100_load_firmware,
  522. .get_postcode = mic_x100_get_postcode,
  523. .dma_filter = mic_x100_dma_filter,
  524. };
  525. struct mic_hw_intr_ops mic_x100_intr_ops = {
  526. .intr_init = mic_x100_hw_intr_init,
  527. .enable_interrupts = mic_x100_enable_interrupts,
  528. .disable_interrupts = mic_x100_disable_interrupts,
  529. .program_msi_to_src_map = mic_x100_program_msi_to_src_map,
  530. .read_msi_to_src_map = mic_x100_read_msi_to_src_map,
  531. };