bcm_sf2.h 5.5 KB

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  1. /*
  2. * Broadcom Starfighter2 private context
  3. *
  4. * Copyright (C) 2014, Broadcom Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #ifndef __BCM_SF2_H
  12. #define __BCM_SF2_H
  13. #include <linux/platform_device.h>
  14. #include <linux/kernel.h>
  15. #include <linux/io.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/mutex.h>
  18. #include <linux/mii.h>
  19. #include <linux/ethtool.h>
  20. #include <linux/types.h>
  21. #include <linux/bitops.h>
  22. #include <linux/if_vlan.h>
  23. #include <net/dsa.h>
  24. #include "bcm_sf2_regs.h"
  25. #include "b53/b53_priv.h"
  26. struct bcm_sf2_hw_params {
  27. u16 top_rev;
  28. u16 core_rev;
  29. u16 gphy_rev;
  30. u32 num_gphy;
  31. u8 num_acb_queue;
  32. u8 num_rgmii;
  33. u8 num_ports;
  34. u8 fcb_pause_override:1;
  35. u8 acb_packets_inflight:1;
  36. };
  37. #define BCM_SF2_REGS_NAME {\
  38. "core", "reg", "intrl2_0", "intrl2_1", "fcb", "acb" \
  39. }
  40. #define BCM_SF2_REGS_NUM 6
  41. struct bcm_sf2_port_status {
  42. unsigned int link;
  43. };
  44. struct bcm_sf2_cfp_priv {
  45. /* Mutex protecting concurrent accesses to the CFP registers */
  46. struct mutex lock;
  47. DECLARE_BITMAP(used, CFP_NUM_RULES);
  48. DECLARE_BITMAP(unique, CFP_NUM_RULES);
  49. unsigned int rules_cnt;
  50. };
  51. struct bcm_sf2_priv {
  52. /* Base registers, keep those in order with BCM_SF2_REGS_NAME */
  53. void __iomem *core;
  54. void __iomem *reg;
  55. void __iomem *intrl2_0;
  56. void __iomem *intrl2_1;
  57. void __iomem *fcb;
  58. void __iomem *acb;
  59. /* Register offsets indirection tables */
  60. u32 type;
  61. const u16 *reg_offsets;
  62. unsigned int core_reg_align;
  63. unsigned int num_cfp_rules;
  64. /* spinlock protecting access to the indirect registers */
  65. spinlock_t indir_lock;
  66. int irq0;
  67. int irq1;
  68. u32 irq0_stat;
  69. u32 irq0_mask;
  70. u32 irq1_stat;
  71. u32 irq1_mask;
  72. /* Backing b53_device */
  73. struct b53_device *dev;
  74. /* Mutex protecting access to the MIB counters */
  75. struct mutex stats_mutex;
  76. struct bcm_sf2_hw_params hw_params;
  77. struct bcm_sf2_port_status port_sts[DSA_MAX_PORTS];
  78. /* Mask of ports enabled for Wake-on-LAN */
  79. u32 wol_ports_mask;
  80. /* MoCA port location */
  81. int moca_port;
  82. /* Bitmask of ports having an integrated PHY */
  83. unsigned int int_phy_mask;
  84. /* Master and slave MDIO bus controller */
  85. unsigned int indir_phy_mask;
  86. struct device_node *master_mii_dn;
  87. struct mii_bus *slave_mii_bus;
  88. struct mii_bus *master_mii_bus;
  89. /* Bitmask of ports needing BRCM tags */
  90. unsigned int brcm_tag_mask;
  91. /* CFP rules context */
  92. struct bcm_sf2_cfp_priv cfp;
  93. };
  94. static inline struct bcm_sf2_priv *bcm_sf2_to_priv(struct dsa_switch *ds)
  95. {
  96. struct b53_device *dev = ds->priv;
  97. return dev->priv;
  98. }
  99. static inline u32 bcm_sf2_mangle_addr(struct bcm_sf2_priv *priv, u32 off)
  100. {
  101. return off << priv->core_reg_align;
  102. }
  103. #define SF2_IO_MACRO(name) \
  104. static inline u32 name##_readl(struct bcm_sf2_priv *priv, u32 off) \
  105. { \
  106. return readl_relaxed(priv->name + off); \
  107. } \
  108. static inline void name##_writel(struct bcm_sf2_priv *priv, \
  109. u32 val, u32 off) \
  110. { \
  111. writel_relaxed(val, priv->name + off); \
  112. } \
  113. /* Accesses to 64-bits register requires us to latch the hi/lo pairs
  114. * using the REG_DIR_DATA_{READ,WRITE} ancillary registers. The 'indir_lock'
  115. * spinlock is automatically grabbed and released to provide relative
  116. * atomiticy with latched reads/writes.
  117. */
  118. #define SF2_IO64_MACRO(name) \
  119. static inline u64 name##_readq(struct bcm_sf2_priv *priv, u32 off) \
  120. { \
  121. u32 indir, dir; \
  122. spin_lock(&priv->indir_lock); \
  123. dir = name##_readl(priv, off); \
  124. indir = reg_readl(priv, REG_DIR_DATA_READ); \
  125. spin_unlock(&priv->indir_lock); \
  126. return (u64)indir << 32 | dir; \
  127. } \
  128. static inline void name##_writeq(struct bcm_sf2_priv *priv, u64 val, \
  129. u32 off) \
  130. { \
  131. spin_lock(&priv->indir_lock); \
  132. reg_writel(priv, upper_32_bits(val), REG_DIR_DATA_WRITE); \
  133. name##_writel(priv, lower_32_bits(val), off); \
  134. spin_unlock(&priv->indir_lock); \
  135. }
  136. #define SWITCH_INTR_L2(which) \
  137. static inline void intrl2_##which##_mask_clear(struct bcm_sf2_priv *priv, \
  138. u32 mask) \
  139. { \
  140. priv->irq##which##_mask &= ~(mask); \
  141. intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \
  142. } \
  143. static inline void intrl2_##which##_mask_set(struct bcm_sf2_priv *priv, \
  144. u32 mask) \
  145. { \
  146. intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \
  147. priv->irq##which##_mask |= (mask); \
  148. } \
  149. static inline u32 core_readl(struct bcm_sf2_priv *priv, u32 off)
  150. {
  151. u32 tmp = bcm_sf2_mangle_addr(priv, off);
  152. return readl_relaxed(priv->core + tmp);
  153. }
  154. static inline void core_writel(struct bcm_sf2_priv *priv, u32 val, u32 off)
  155. {
  156. u32 tmp = bcm_sf2_mangle_addr(priv, off);
  157. writel_relaxed(val, priv->core + tmp);
  158. }
  159. static inline u32 reg_readl(struct bcm_sf2_priv *priv, u16 off)
  160. {
  161. return readl_relaxed(priv->reg + priv->reg_offsets[off]);
  162. }
  163. static inline void reg_writel(struct bcm_sf2_priv *priv, u32 val, u16 off)
  164. {
  165. writel_relaxed(val, priv->reg + priv->reg_offsets[off]);
  166. }
  167. SF2_IO64_MACRO(core);
  168. SF2_IO_MACRO(intrl2_0);
  169. SF2_IO_MACRO(intrl2_1);
  170. SF2_IO_MACRO(fcb);
  171. SF2_IO_MACRO(acb);
  172. SWITCH_INTR_L2(0);
  173. SWITCH_INTR_L2(1);
  174. /* RXNFC */
  175. int bcm_sf2_get_rxnfc(struct dsa_switch *ds, int port,
  176. struct ethtool_rxnfc *nfc, u32 *rule_locs);
  177. int bcm_sf2_set_rxnfc(struct dsa_switch *ds, int port,
  178. struct ethtool_rxnfc *nfc);
  179. int bcm_sf2_cfp_rst(struct bcm_sf2_priv *priv);
  180. #endif /* __BCM_SF2_H */