mv88e6060.c 6.9 KB

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  1. /*
  2. * net/dsa/mv88e6060.c - Driver for Marvell 88e6060 switch chips
  3. * Copyright (c) 2008-2009 Marvell Semiconductor
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. */
  10. #include <linux/delay.h>
  11. #include <linux/etherdevice.h>
  12. #include <linux/jiffies.h>
  13. #include <linux/list.h>
  14. #include <linux/module.h>
  15. #include <linux/netdevice.h>
  16. #include <linux/phy.h>
  17. #include <net/dsa.h>
  18. #include "mv88e6060.h"
  19. static int reg_read(struct dsa_switch *ds, int addr, int reg)
  20. {
  21. struct mv88e6060_priv *priv = ds->priv;
  22. return mdiobus_read_nested(priv->bus, priv->sw_addr + addr, reg);
  23. }
  24. #define REG_READ(addr, reg) \
  25. ({ \
  26. int __ret; \
  27. \
  28. __ret = reg_read(ds, addr, reg); \
  29. if (__ret < 0) \
  30. return __ret; \
  31. __ret; \
  32. })
  33. static int reg_write(struct dsa_switch *ds, int addr, int reg, u16 val)
  34. {
  35. struct mv88e6060_priv *priv = ds->priv;
  36. return mdiobus_write_nested(priv->bus, priv->sw_addr + addr, reg, val);
  37. }
  38. #define REG_WRITE(addr, reg, val) \
  39. ({ \
  40. int __ret; \
  41. \
  42. __ret = reg_write(ds, addr, reg, val); \
  43. if (__ret < 0) \
  44. return __ret; \
  45. })
  46. static const char *mv88e6060_get_name(struct mii_bus *bus, int sw_addr)
  47. {
  48. int ret;
  49. ret = mdiobus_read(bus, sw_addr + REG_PORT(0), PORT_SWITCH_ID);
  50. if (ret >= 0) {
  51. if (ret == PORT_SWITCH_ID_6060)
  52. return "Marvell 88E6060 (A0)";
  53. if (ret == PORT_SWITCH_ID_6060_R1 ||
  54. ret == PORT_SWITCH_ID_6060_R2)
  55. return "Marvell 88E6060 (B0)";
  56. if ((ret & PORT_SWITCH_ID_6060_MASK) == PORT_SWITCH_ID_6060)
  57. return "Marvell 88E6060";
  58. }
  59. return NULL;
  60. }
  61. static enum dsa_tag_protocol mv88e6060_get_tag_protocol(struct dsa_switch *ds,
  62. int port)
  63. {
  64. return DSA_TAG_PROTO_TRAILER;
  65. }
  66. static const char *mv88e6060_drv_probe(struct device *dsa_dev,
  67. struct device *host_dev, int sw_addr,
  68. void **_priv)
  69. {
  70. struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev);
  71. struct mv88e6060_priv *priv;
  72. const char *name;
  73. name = mv88e6060_get_name(bus, sw_addr);
  74. if (name) {
  75. priv = devm_kzalloc(dsa_dev, sizeof(*priv), GFP_KERNEL);
  76. if (!priv)
  77. return NULL;
  78. *_priv = priv;
  79. priv->bus = bus;
  80. priv->sw_addr = sw_addr;
  81. }
  82. return name;
  83. }
  84. static int mv88e6060_switch_reset(struct dsa_switch *ds)
  85. {
  86. int i;
  87. int ret;
  88. unsigned long timeout;
  89. /* Set all ports to the disabled state. */
  90. for (i = 0; i < MV88E6060_PORTS; i++) {
  91. ret = REG_READ(REG_PORT(i), PORT_CONTROL);
  92. REG_WRITE(REG_PORT(i), PORT_CONTROL,
  93. ret & ~PORT_CONTROL_STATE_MASK);
  94. }
  95. /* Wait for transmit queues to drain. */
  96. usleep_range(2000, 4000);
  97. /* Reset the switch. */
  98. REG_WRITE(REG_GLOBAL, GLOBAL_ATU_CONTROL,
  99. GLOBAL_ATU_CONTROL_SWRESET |
  100. GLOBAL_ATU_CONTROL_LEARNDIS);
  101. /* Wait up to one second for reset to complete. */
  102. timeout = jiffies + 1 * HZ;
  103. while (time_before(jiffies, timeout)) {
  104. ret = REG_READ(REG_GLOBAL, GLOBAL_STATUS);
  105. if (ret & GLOBAL_STATUS_INIT_READY)
  106. break;
  107. usleep_range(1000, 2000);
  108. }
  109. if (time_after(jiffies, timeout))
  110. return -ETIMEDOUT;
  111. return 0;
  112. }
  113. static int mv88e6060_setup_global(struct dsa_switch *ds)
  114. {
  115. /* Disable discarding of frames with excessive collisions,
  116. * set the maximum frame size to 1536 bytes, and mask all
  117. * interrupt sources.
  118. */
  119. REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL, GLOBAL_CONTROL_MAX_FRAME_1536);
  120. /* Disable automatic address learning.
  121. */
  122. REG_WRITE(REG_GLOBAL, GLOBAL_ATU_CONTROL,
  123. GLOBAL_ATU_CONTROL_LEARNDIS);
  124. return 0;
  125. }
  126. static int mv88e6060_setup_port(struct dsa_switch *ds, int p)
  127. {
  128. int addr = REG_PORT(p);
  129. /* Do not force flow control, disable Ingress and Egress
  130. * Header tagging, disable VLAN tunneling, and set the port
  131. * state to Forwarding. Additionally, if this is the CPU
  132. * port, enable Ingress and Egress Trailer tagging mode.
  133. */
  134. REG_WRITE(addr, PORT_CONTROL,
  135. dsa_is_cpu_port(ds, p) ?
  136. PORT_CONTROL_TRAILER |
  137. PORT_CONTROL_INGRESS_MODE |
  138. PORT_CONTROL_STATE_FORWARDING :
  139. PORT_CONTROL_STATE_FORWARDING);
  140. /* Port based VLAN map: give each port its own address
  141. * database, allow the CPU port to talk to each of the 'real'
  142. * ports, and allow each of the 'real' ports to only talk to
  143. * the CPU port.
  144. */
  145. REG_WRITE(addr, PORT_VLAN_MAP,
  146. ((p & 0xf) << PORT_VLAN_MAP_DBNUM_SHIFT) |
  147. (dsa_is_cpu_port(ds, p) ? dsa_user_ports(ds) :
  148. BIT(dsa_to_port(ds, p)->cpu_dp->index)));
  149. /* Port Association Vector: when learning source addresses
  150. * of packets, add the address to the address database using
  151. * a port bitmap that has only the bit for this port set and
  152. * the other bits clear.
  153. */
  154. REG_WRITE(addr, PORT_ASSOC_VECTOR, BIT(p));
  155. return 0;
  156. }
  157. static int mv88e6060_setup_addr(struct dsa_switch *ds)
  158. {
  159. u8 addr[ETH_ALEN];
  160. u16 val;
  161. eth_random_addr(addr);
  162. val = addr[0] << 8 | addr[1];
  163. /* The multicast bit is always transmitted as a zero, so the switch uses
  164. * bit 8 for "DiffAddr", where 0 means all ports transmit the same SA.
  165. */
  166. val &= 0xfeff;
  167. REG_WRITE(REG_GLOBAL, GLOBAL_MAC_01, val);
  168. REG_WRITE(REG_GLOBAL, GLOBAL_MAC_23, (addr[2] << 8) | addr[3]);
  169. REG_WRITE(REG_GLOBAL, GLOBAL_MAC_45, (addr[4] << 8) | addr[5]);
  170. return 0;
  171. }
  172. static int mv88e6060_setup(struct dsa_switch *ds)
  173. {
  174. int ret;
  175. int i;
  176. ret = mv88e6060_switch_reset(ds);
  177. if (ret < 0)
  178. return ret;
  179. /* @@@ initialise atu */
  180. ret = mv88e6060_setup_global(ds);
  181. if (ret < 0)
  182. return ret;
  183. ret = mv88e6060_setup_addr(ds);
  184. if (ret < 0)
  185. return ret;
  186. for (i = 0; i < MV88E6060_PORTS; i++) {
  187. ret = mv88e6060_setup_port(ds, i);
  188. if (ret < 0)
  189. return ret;
  190. }
  191. return 0;
  192. }
  193. static int mv88e6060_port_to_phy_addr(int port)
  194. {
  195. if (port >= 0 && port < MV88E6060_PORTS)
  196. return port;
  197. return -1;
  198. }
  199. static int mv88e6060_phy_read(struct dsa_switch *ds, int port, int regnum)
  200. {
  201. int addr;
  202. addr = mv88e6060_port_to_phy_addr(port);
  203. if (addr == -1)
  204. return 0xffff;
  205. return reg_read(ds, addr, regnum);
  206. }
  207. static int
  208. mv88e6060_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val)
  209. {
  210. int addr;
  211. addr = mv88e6060_port_to_phy_addr(port);
  212. if (addr == -1)
  213. return 0xffff;
  214. return reg_write(ds, addr, regnum, val);
  215. }
  216. static const struct dsa_switch_ops mv88e6060_switch_ops = {
  217. .get_tag_protocol = mv88e6060_get_tag_protocol,
  218. .probe = mv88e6060_drv_probe,
  219. .setup = mv88e6060_setup,
  220. .phy_read = mv88e6060_phy_read,
  221. .phy_write = mv88e6060_phy_write,
  222. };
  223. static struct dsa_switch_driver mv88e6060_switch_drv = {
  224. .ops = &mv88e6060_switch_ops,
  225. };
  226. static int __init mv88e6060_init(void)
  227. {
  228. register_switch_driver(&mv88e6060_switch_drv);
  229. return 0;
  230. }
  231. module_init(mv88e6060_init);
  232. static void __exit mv88e6060_cleanup(void)
  233. {
  234. unregister_switch_driver(&mv88e6060_switch_drv);
  235. }
  236. module_exit(mv88e6060_cleanup);
  237. MODULE_AUTHOR("Lennert Buytenhek <buytenh@wantstofly.org>");
  238. MODULE_DESCRIPTION("Driver for Marvell 88E6060 ethernet switch chip");
  239. MODULE_LICENSE("GPL");
  240. MODULE_ALIAS("platform:mv88e6060");