pmc.c 11 KB

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  1. /*
  2. * Copyright (c) 2012-2015,2017 Qualcomm Atheros, Inc.
  3. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/types.h>
  18. #include <linux/errno.h>
  19. #include <linux/fs.h>
  20. #include "wmi.h"
  21. #include "wil6210.h"
  22. #include "txrx.h"
  23. #include "pmc.h"
  24. struct desc_alloc_info {
  25. dma_addr_t pa;
  26. void *va;
  27. };
  28. static int wil_is_pmc_allocated(struct pmc_ctx *pmc)
  29. {
  30. return !!pmc->pring_va;
  31. }
  32. void wil_pmc_init(struct wil6210_priv *wil)
  33. {
  34. memset(&wil->pmc, 0, sizeof(struct pmc_ctx));
  35. mutex_init(&wil->pmc.lock);
  36. }
  37. /**
  38. * Allocate the physical ring (p-ring) and the required
  39. * number of descriptors of required size.
  40. * Initialize the descriptors as required by pmc dma.
  41. * The descriptors' buffers dwords are initialized to hold
  42. * dword's serial number in the lsw and reserved value
  43. * PCM_DATA_INVALID_DW_VAL in the msw.
  44. */
  45. void wil_pmc_alloc(struct wil6210_priv *wil,
  46. int num_descriptors,
  47. int descriptor_size)
  48. {
  49. u32 i;
  50. struct pmc_ctx *pmc = &wil->pmc;
  51. struct device *dev = wil_to_dev(wil);
  52. struct wil6210_vif *vif = ndev_to_vif(wil->main_ndev);
  53. struct wmi_pmc_cmd pmc_cmd = {0};
  54. int last_cmd_err = -ENOMEM;
  55. mutex_lock(&pmc->lock);
  56. if (wil_is_pmc_allocated(pmc)) {
  57. /* sanity check */
  58. wil_err(wil, "ERROR pmc is already allocated\n");
  59. goto no_release_err;
  60. }
  61. if ((num_descriptors <= 0) || (descriptor_size <= 0)) {
  62. wil_err(wil,
  63. "Invalid params num_descriptors(%d), descriptor_size(%d)\n",
  64. num_descriptors, descriptor_size);
  65. last_cmd_err = -EINVAL;
  66. goto no_release_err;
  67. }
  68. if (num_descriptors > (1 << WIL_RING_SIZE_ORDER_MAX)) {
  69. wil_err(wil,
  70. "num_descriptors(%d) exceeds max ring size %d\n",
  71. num_descriptors, 1 << WIL_RING_SIZE_ORDER_MAX);
  72. last_cmd_err = -EINVAL;
  73. goto no_release_err;
  74. }
  75. if (num_descriptors > INT_MAX / descriptor_size) {
  76. wil_err(wil,
  77. "Overflow in num_descriptors(%d)*descriptor_size(%d)\n",
  78. num_descriptors, descriptor_size);
  79. last_cmd_err = -EINVAL;
  80. goto no_release_err;
  81. }
  82. pmc->num_descriptors = num_descriptors;
  83. pmc->descriptor_size = descriptor_size;
  84. wil_dbg_misc(wil, "pmc_alloc: %d descriptors x %d bytes each\n",
  85. num_descriptors, descriptor_size);
  86. /* allocate descriptors info list in pmc context*/
  87. pmc->descriptors = kcalloc(num_descriptors,
  88. sizeof(struct desc_alloc_info),
  89. GFP_KERNEL);
  90. if (!pmc->descriptors) {
  91. wil_err(wil, "ERROR allocating pmc skb list\n");
  92. goto no_release_err;
  93. }
  94. wil_dbg_misc(wil, "pmc_alloc: allocated descriptors info list %p\n",
  95. pmc->descriptors);
  96. /* Allocate pring buffer and descriptors.
  97. * vring->va should be aligned on its size rounded up to power of 2
  98. * This is granted by the dma_alloc_coherent.
  99. *
  100. * HW has limitation that all vrings addresses must share the same
  101. * upper 16 msb bits part of 48 bits address. To workaround that,
  102. * if we are using more than 32 bit addresses switch to 32 bit
  103. * allocation before allocating vring memory.
  104. *
  105. * There's no check for the return value of dma_set_mask_and_coherent,
  106. * since we assume if we were able to set the mask during
  107. * initialization in this system it will not fail if we set it again
  108. */
  109. if (wil->dma_addr_size > 32)
  110. dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
  111. pmc->pring_va = dma_alloc_coherent(dev,
  112. sizeof(struct vring_tx_desc) * num_descriptors,
  113. &pmc->pring_pa,
  114. GFP_KERNEL);
  115. if (wil->dma_addr_size > 32)
  116. dma_set_mask_and_coherent(dev,
  117. DMA_BIT_MASK(wil->dma_addr_size));
  118. wil_dbg_misc(wil,
  119. "pmc_alloc: allocated pring %p => %pad. %zd x %d = total %zd bytes\n",
  120. pmc->pring_va, &pmc->pring_pa,
  121. sizeof(struct vring_tx_desc),
  122. num_descriptors,
  123. sizeof(struct vring_tx_desc) * num_descriptors);
  124. if (!pmc->pring_va) {
  125. wil_err(wil, "ERROR allocating pmc pring\n");
  126. goto release_pmc_skb_list;
  127. }
  128. /* initially, all descriptors are SW owned
  129. * For Tx, Rx, and PMC, ownership bit is at the same location, thus
  130. * we can use any
  131. */
  132. for (i = 0; i < num_descriptors; i++) {
  133. struct vring_tx_desc *_d = &pmc->pring_va[i];
  134. struct vring_tx_desc dd = {}, *d = &dd;
  135. int j = 0;
  136. pmc->descriptors[i].va = dma_alloc_coherent(dev,
  137. descriptor_size,
  138. &pmc->descriptors[i].pa,
  139. GFP_KERNEL);
  140. if (unlikely(!pmc->descriptors[i].va)) {
  141. wil_err(wil, "ERROR allocating pmc descriptor %d", i);
  142. goto release_pmc_skbs;
  143. }
  144. for (j = 0; j < descriptor_size / sizeof(u32); j++) {
  145. u32 *p = (u32 *)pmc->descriptors[i].va + j;
  146. *p = PCM_DATA_INVALID_DW_VAL | j;
  147. }
  148. /* configure dma descriptor */
  149. d->dma.addr.addr_low =
  150. cpu_to_le32(lower_32_bits(pmc->descriptors[i].pa));
  151. d->dma.addr.addr_high =
  152. cpu_to_le16((u16)upper_32_bits(pmc->descriptors[i].pa));
  153. d->dma.status = 0; /* 0 = HW_OWNED */
  154. d->dma.length = cpu_to_le16(descriptor_size);
  155. d->dma.d0 = BIT(9) | RX_DMA_D0_CMD_DMA_IT;
  156. *_d = *d;
  157. }
  158. wil_dbg_misc(wil, "pmc_alloc: allocated successfully\n");
  159. pmc_cmd.op = WMI_PMC_ALLOCATE;
  160. pmc_cmd.ring_size = cpu_to_le16(pmc->num_descriptors);
  161. pmc_cmd.mem_base = cpu_to_le64(pmc->pring_pa);
  162. wil_dbg_misc(wil, "pmc_alloc: send WMI_PMC_CMD with ALLOCATE op\n");
  163. pmc->last_cmd_status = wmi_send(wil,
  164. WMI_PMC_CMDID,
  165. vif->mid,
  166. &pmc_cmd,
  167. sizeof(pmc_cmd));
  168. if (pmc->last_cmd_status) {
  169. wil_err(wil,
  170. "WMI_PMC_CMD with ALLOCATE op failed with status %d",
  171. pmc->last_cmd_status);
  172. goto release_pmc_skbs;
  173. }
  174. mutex_unlock(&pmc->lock);
  175. return;
  176. release_pmc_skbs:
  177. wil_err(wil, "exit on error: Releasing skbs...\n");
  178. for (i = 0; i < num_descriptors && pmc->descriptors[i].va; i++) {
  179. dma_free_coherent(dev,
  180. descriptor_size,
  181. pmc->descriptors[i].va,
  182. pmc->descriptors[i].pa);
  183. pmc->descriptors[i].va = NULL;
  184. }
  185. wil_err(wil, "exit on error: Releasing pring...\n");
  186. dma_free_coherent(dev,
  187. sizeof(struct vring_tx_desc) * num_descriptors,
  188. pmc->pring_va,
  189. pmc->pring_pa);
  190. pmc->pring_va = NULL;
  191. release_pmc_skb_list:
  192. wil_err(wil, "exit on error: Releasing descriptors info list...\n");
  193. kfree(pmc->descriptors);
  194. pmc->descriptors = NULL;
  195. no_release_err:
  196. pmc->last_cmd_status = last_cmd_err;
  197. mutex_unlock(&pmc->lock);
  198. }
  199. /**
  200. * Traverse the p-ring and release all buffers.
  201. * At the end release the p-ring memory
  202. */
  203. void wil_pmc_free(struct wil6210_priv *wil, int send_pmc_cmd)
  204. {
  205. struct pmc_ctx *pmc = &wil->pmc;
  206. struct device *dev = wil_to_dev(wil);
  207. struct wil6210_vif *vif = ndev_to_vif(wil->main_ndev);
  208. struct wmi_pmc_cmd pmc_cmd = {0};
  209. mutex_lock(&pmc->lock);
  210. pmc->last_cmd_status = 0;
  211. if (!wil_is_pmc_allocated(pmc)) {
  212. wil_dbg_misc(wil,
  213. "pmc_free: Error, can't free - not allocated\n");
  214. pmc->last_cmd_status = -EPERM;
  215. mutex_unlock(&pmc->lock);
  216. return;
  217. }
  218. if (send_pmc_cmd) {
  219. wil_dbg_misc(wil, "send WMI_PMC_CMD with RELEASE op\n");
  220. pmc_cmd.op = WMI_PMC_RELEASE;
  221. pmc->last_cmd_status =
  222. wmi_send(wil, WMI_PMC_CMDID, vif->mid,
  223. &pmc_cmd, sizeof(pmc_cmd));
  224. if (pmc->last_cmd_status) {
  225. wil_err(wil,
  226. "WMI_PMC_CMD with RELEASE op failed, status %d",
  227. pmc->last_cmd_status);
  228. /* There's nothing we can do with this error.
  229. * Normally, it should never occur.
  230. * Continue to freeing all memory allocated for pmc.
  231. */
  232. }
  233. }
  234. if (pmc->pring_va) {
  235. size_t buf_size = sizeof(struct vring_tx_desc) *
  236. pmc->num_descriptors;
  237. wil_dbg_misc(wil, "pmc_free: free pring va %p\n",
  238. pmc->pring_va);
  239. dma_free_coherent(dev, buf_size, pmc->pring_va, pmc->pring_pa);
  240. pmc->pring_va = NULL;
  241. } else {
  242. pmc->last_cmd_status = -ENOENT;
  243. }
  244. if (pmc->descriptors) {
  245. int i;
  246. for (i = 0;
  247. i < pmc->num_descriptors && pmc->descriptors[i].va; i++) {
  248. dma_free_coherent(dev,
  249. pmc->descriptor_size,
  250. pmc->descriptors[i].va,
  251. pmc->descriptors[i].pa);
  252. pmc->descriptors[i].va = NULL;
  253. }
  254. wil_dbg_misc(wil, "pmc_free: free descriptor info %d/%d\n", i,
  255. pmc->num_descriptors);
  256. wil_dbg_misc(wil,
  257. "pmc_free: free pmc descriptors info list %p\n",
  258. pmc->descriptors);
  259. kfree(pmc->descriptors);
  260. pmc->descriptors = NULL;
  261. } else {
  262. pmc->last_cmd_status = -ENOENT;
  263. }
  264. mutex_unlock(&pmc->lock);
  265. }
  266. /**
  267. * Status of the last operation requested via debugfs: alloc/free/read.
  268. * 0 - success or negative errno
  269. */
  270. int wil_pmc_last_cmd_status(struct wil6210_priv *wil)
  271. {
  272. wil_dbg_misc(wil, "pmc_last_cmd_status: status %d\n",
  273. wil->pmc.last_cmd_status);
  274. return wil->pmc.last_cmd_status;
  275. }
  276. /**
  277. * Read from required position up to the end of current descriptor,
  278. * depends on descriptor size configured during alloc request.
  279. */
  280. ssize_t wil_pmc_read(struct file *filp, char __user *buf, size_t count,
  281. loff_t *f_pos)
  282. {
  283. struct wil6210_priv *wil = filp->private_data;
  284. struct pmc_ctx *pmc = &wil->pmc;
  285. size_t retval = 0;
  286. unsigned long long idx;
  287. loff_t offset;
  288. size_t pmc_size;
  289. mutex_lock(&pmc->lock);
  290. if (!wil_is_pmc_allocated(pmc)) {
  291. wil_err(wil, "error, pmc is not allocated!\n");
  292. pmc->last_cmd_status = -EPERM;
  293. mutex_unlock(&pmc->lock);
  294. return -EPERM;
  295. }
  296. pmc_size = pmc->descriptor_size * pmc->num_descriptors;
  297. wil_dbg_misc(wil,
  298. "pmc_read: size %u, pos %lld\n",
  299. (u32)count, *f_pos);
  300. pmc->last_cmd_status = 0;
  301. idx = *f_pos;
  302. do_div(idx, pmc->descriptor_size);
  303. offset = *f_pos - (idx * pmc->descriptor_size);
  304. if (*f_pos >= pmc_size) {
  305. wil_dbg_misc(wil,
  306. "pmc_read: reached end of pmc buf: %lld >= %u\n",
  307. *f_pos, (u32)pmc_size);
  308. pmc->last_cmd_status = -ERANGE;
  309. goto out;
  310. }
  311. wil_dbg_misc(wil,
  312. "pmc_read: read from pos %lld (descriptor %llu, offset %llu) %zu bytes\n",
  313. *f_pos, idx, offset, count);
  314. /* if no errors, return the copied byte count */
  315. retval = simple_read_from_buffer(buf,
  316. count,
  317. &offset,
  318. pmc->descriptors[idx].va,
  319. pmc->descriptor_size);
  320. *f_pos += retval;
  321. out:
  322. mutex_unlock(&pmc->lock);
  323. return retval;
  324. }
  325. loff_t wil_pmc_llseek(struct file *filp, loff_t off, int whence)
  326. {
  327. loff_t newpos;
  328. struct wil6210_priv *wil = filp->private_data;
  329. struct pmc_ctx *pmc = &wil->pmc;
  330. size_t pmc_size;
  331. mutex_lock(&pmc->lock);
  332. if (!wil_is_pmc_allocated(pmc)) {
  333. wil_err(wil, "error, pmc is not allocated!\n");
  334. pmc->last_cmd_status = -EPERM;
  335. mutex_unlock(&pmc->lock);
  336. return -EPERM;
  337. }
  338. pmc_size = pmc->descriptor_size * pmc->num_descriptors;
  339. switch (whence) {
  340. case 0: /* SEEK_SET */
  341. newpos = off;
  342. break;
  343. case 1: /* SEEK_CUR */
  344. newpos = filp->f_pos + off;
  345. break;
  346. case 2: /* SEEK_END */
  347. newpos = pmc_size;
  348. break;
  349. default: /* can't happen */
  350. newpos = -EINVAL;
  351. goto out;
  352. }
  353. if (newpos < 0) {
  354. newpos = -EINVAL;
  355. goto out;
  356. }
  357. if (newpos > pmc_size)
  358. newpos = pmc_size;
  359. filp->f_pos = newpos;
  360. out:
  361. mutex_unlock(&pmc->lock);
  362. return newpos;
  363. }