fw.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603
  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2012 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. #include "../wifi.h"
  26. #include "../pci.h"
  27. #include "../base.h"
  28. #include "../core.h"
  29. #include "reg.h"
  30. #include "def.h"
  31. #include "fw.h"
  32. #include "../rtl8723com/fw_common.h"
  33. static bool _rtl8723e_check_fw_read_last_h2c(struct ieee80211_hw *hw,
  34. u8 boxnum)
  35. {
  36. struct rtl_priv *rtlpriv = rtl_priv(hw);
  37. u8 val_hmetfr, val_mcutst_1;
  38. bool result = false;
  39. val_hmetfr = rtl_read_byte(rtlpriv, REG_HMETFR);
  40. val_mcutst_1 = rtl_read_byte(rtlpriv, (REG_MCUTST_1 + boxnum));
  41. if (((val_hmetfr >> boxnum) & BIT(0)) == 0 && val_mcutst_1 == 0)
  42. result = true;
  43. return result;
  44. }
  45. static void _rtl8723e_fill_h2c_command(struct ieee80211_hw *hw, u8 element_id,
  46. u32 cmd_len, u8 *cmdbuffer)
  47. {
  48. struct rtl_priv *rtlpriv = rtl_priv(hw);
  49. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  50. u8 boxnum;
  51. u16 box_reg = 0, box_extreg = 0;
  52. u8 u1b_tmp;
  53. bool isfw_read = false;
  54. u8 buf_index = 0;
  55. bool bwrite_sucess = false;
  56. u8 wait_h2c_limmit = 100;
  57. u8 wait_writeh2c_limmit = 100;
  58. u8 boxcontent[4], boxextcontent[2];
  59. u32 h2c_waitcounter = 0;
  60. unsigned long flag;
  61. u8 idx;
  62. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, "come in\n");
  63. while (true) {
  64. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  65. if (rtlhal->h2c_setinprogress) {
  66. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  67. "H2C set in progress! Wait to set..element_id(%d).\n",
  68. element_id);
  69. while (rtlhal->h2c_setinprogress) {
  70. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock,
  71. flag);
  72. h2c_waitcounter++;
  73. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  74. "Wait 100 us (%d times)...\n",
  75. h2c_waitcounter);
  76. udelay(100);
  77. if (h2c_waitcounter > 1000)
  78. return;
  79. spin_lock_irqsave(&rtlpriv->locks.h2c_lock,
  80. flag);
  81. }
  82. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  83. } else {
  84. rtlhal->h2c_setinprogress = true;
  85. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  86. break;
  87. }
  88. }
  89. while (!bwrite_sucess) {
  90. wait_writeh2c_limmit--;
  91. if (wait_writeh2c_limmit == 0) {
  92. pr_err("Write H2C fail because no trigger for FW INT!\n");
  93. break;
  94. }
  95. boxnum = rtlhal->last_hmeboxnum;
  96. switch (boxnum) {
  97. case 0:
  98. box_reg = REG_HMEBOX_0;
  99. box_extreg = REG_HMEBOX_EXT_0;
  100. break;
  101. case 1:
  102. box_reg = REG_HMEBOX_1;
  103. box_extreg = REG_HMEBOX_EXT_1;
  104. break;
  105. case 2:
  106. box_reg = REG_HMEBOX_2;
  107. box_extreg = REG_HMEBOX_EXT_2;
  108. break;
  109. case 3:
  110. box_reg = REG_HMEBOX_3;
  111. box_extreg = REG_HMEBOX_EXT_3;
  112. break;
  113. default:
  114. pr_err("switch case %#x not processed\n",
  115. boxnum);
  116. break;
  117. }
  118. isfw_read = _rtl8723e_check_fw_read_last_h2c(hw, boxnum);
  119. while (!isfw_read) {
  120. wait_h2c_limmit--;
  121. if (wait_h2c_limmit == 0) {
  122. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  123. "Waiting too long for FW read clear HMEBox(%d)!\n",
  124. boxnum);
  125. break;
  126. }
  127. udelay(10);
  128. isfw_read = _rtl8723e_check_fw_read_last_h2c(hw,
  129. boxnum);
  130. u1b_tmp = rtl_read_byte(rtlpriv, 0x1BF);
  131. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  132. "Waiting for FW read clear HMEBox(%d)!!! 0x1BF = %2x\n",
  133. boxnum, u1b_tmp);
  134. }
  135. if (!isfw_read) {
  136. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  137. "Write H2C register BOX[%d] fail!!!!! Fw do not read.\n",
  138. boxnum);
  139. break;
  140. }
  141. memset(boxcontent, 0, sizeof(boxcontent));
  142. memset(boxextcontent, 0, sizeof(boxextcontent));
  143. boxcontent[0] = element_id;
  144. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  145. "Write element_id box_reg(%4x) = %2x\n",
  146. box_reg, element_id);
  147. switch (cmd_len) {
  148. case 1:
  149. boxcontent[0] &= ~(BIT(7));
  150. memcpy((u8 *)(boxcontent) + 1,
  151. cmdbuffer + buf_index, 1);
  152. for (idx = 0; idx < 4; idx++) {
  153. rtl_write_byte(rtlpriv, box_reg + idx,
  154. boxcontent[idx]);
  155. }
  156. break;
  157. case 2:
  158. boxcontent[0] &= ~(BIT(7));
  159. memcpy((u8 *)(boxcontent) + 1,
  160. cmdbuffer + buf_index, 2);
  161. for (idx = 0; idx < 4; idx++) {
  162. rtl_write_byte(rtlpriv, box_reg + idx,
  163. boxcontent[idx]);
  164. }
  165. break;
  166. case 3:
  167. boxcontent[0] &= ~(BIT(7));
  168. memcpy((u8 *)(boxcontent) + 1,
  169. cmdbuffer + buf_index, 3);
  170. for (idx = 0; idx < 4; idx++) {
  171. rtl_write_byte(rtlpriv, box_reg + idx,
  172. boxcontent[idx]);
  173. }
  174. break;
  175. case 4:
  176. boxcontent[0] |= (BIT(7));
  177. memcpy((u8 *)(boxextcontent),
  178. cmdbuffer + buf_index, 2);
  179. memcpy((u8 *)(boxcontent) + 1,
  180. cmdbuffer + buf_index + 2, 2);
  181. for (idx = 0; idx < 2; idx++) {
  182. rtl_write_byte(rtlpriv, box_extreg + idx,
  183. boxextcontent[idx]);
  184. }
  185. for (idx = 0; idx < 4; idx++) {
  186. rtl_write_byte(rtlpriv, box_reg + idx,
  187. boxcontent[idx]);
  188. }
  189. break;
  190. case 5:
  191. boxcontent[0] |= (BIT(7));
  192. memcpy((u8 *)(boxextcontent),
  193. cmdbuffer + buf_index, 2);
  194. memcpy((u8 *)(boxcontent) + 1,
  195. cmdbuffer + buf_index + 2, 3);
  196. for (idx = 0; idx < 2; idx++) {
  197. rtl_write_byte(rtlpriv, box_extreg + idx,
  198. boxextcontent[idx]);
  199. }
  200. for (idx = 0; idx < 4; idx++) {
  201. rtl_write_byte(rtlpriv, box_reg + idx,
  202. boxcontent[idx]);
  203. }
  204. break;
  205. default:
  206. pr_err("switch case %#x not processed\n",
  207. cmd_len);
  208. break;
  209. }
  210. bwrite_sucess = true;
  211. rtlhal->last_hmeboxnum = boxnum + 1;
  212. if (rtlhal->last_hmeboxnum == 4)
  213. rtlhal->last_hmeboxnum = 0;
  214. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  215. "pHalData->last_hmeboxnum = %d\n",
  216. rtlhal->last_hmeboxnum);
  217. }
  218. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  219. rtlhal->h2c_setinprogress = false;
  220. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  221. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, "go out\n");
  222. }
  223. void rtl8723e_fill_h2c_cmd(struct ieee80211_hw *hw,
  224. u8 element_id, u32 cmd_len, u8 *cmdbuffer)
  225. {
  226. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  227. u32 tmp_cmdbuf[2];
  228. if (!rtlhal->fw_ready) {
  229. WARN_ONCE(true,
  230. "rtl8723ae: error H2C cmd because of Fw download fail!!!\n");
  231. return;
  232. }
  233. memset(tmp_cmdbuf, 0, 8);
  234. memcpy(tmp_cmdbuf, cmdbuffer, cmd_len);
  235. _rtl8723e_fill_h2c_command(hw, element_id, cmd_len,
  236. (u8 *)&tmp_cmdbuf);
  237. }
  238. void rtl8723e_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode)
  239. {
  240. struct rtl_priv *rtlpriv = rtl_priv(hw);
  241. u8 u1_h2c_set_pwrmode[3] = { 0 };
  242. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  243. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, "FW LPS mode = %d\n", mode);
  244. SET_H2CCMD_PWRMODE_PARM_MODE(u1_h2c_set_pwrmode, mode);
  245. SET_H2CCMD_PWRMODE_PARM_SMART_PS(u1_h2c_set_pwrmode,
  246. (rtlpriv->mac80211.p2p) ? ppsc->smart_ps : 1);
  247. SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(u1_h2c_set_pwrmode,
  248. ppsc->reg_max_lps_awakeintvl);
  249. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  250. "rtl8723e_set_fw_rsvdpagepkt(): u1_h2c_set_pwrmode\n",
  251. u1_h2c_set_pwrmode, 3);
  252. rtl8723e_fill_h2c_cmd(hw, H2C_SETPWRMODE, 3, u1_h2c_set_pwrmode);
  253. }
  254. #define BEACON_PG 0 /* ->1 */
  255. #define PSPOLL_PG 2
  256. #define NULL_PG 3
  257. #define PROBERSP_PG 4 /* ->5 */
  258. #define TOTAL_RESERVED_PKT_LEN 768
  259. static u8 reserved_page_packet[TOTAL_RESERVED_PKT_LEN] = {
  260. /* page 0 beacon */
  261. 0x80, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
  262. 0xFF, 0xFF, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  263. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x50, 0x08,
  264. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  265. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  266. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  267. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  268. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  269. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  270. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  271. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  272. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  273. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  274. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  275. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  276. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  277. /* page 1 beacon */
  278. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  279. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  280. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  281. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  282. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  283. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  284. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  285. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  286. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  287. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  288. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  289. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  290. 0x10, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x10, 0x00,
  291. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  292. 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  293. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  294. /* page 2 ps-poll */
  295. 0xA4, 0x10, 0x01, 0xC0, 0x00, 0x40, 0x10, 0x10,
  296. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  297. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  298. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  299. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  300. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  301. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  302. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  303. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  304. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  305. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  306. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  307. 0x18, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
  308. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
  309. 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  310. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  311. /* page 3 null */
  312. 0x48, 0x01, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  313. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  314. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  315. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  316. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  317. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  318. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  319. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  320. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  321. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  322. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  323. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  324. 0x72, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
  325. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
  326. 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  327. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  328. /* page 4 probe_resp */
  329. 0x50, 0x00, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  330. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  331. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  332. 0x9E, 0x46, 0x15, 0x32, 0x27, 0xF2, 0x2D, 0x00,
  333. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  334. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  335. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  336. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  337. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  338. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  339. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  340. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  341. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  342. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  343. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  344. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  345. /* page 5 probe_resp */
  346. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  347. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  348. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  349. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  350. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  351. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  352. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  353. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  354. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  355. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  356. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  357. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  358. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  359. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  360. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  361. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  362. };
  363. void rtl8723e_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished)
  364. {
  365. struct rtl_priv *rtlpriv = rtl_priv(hw);
  366. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  367. struct sk_buff *skb = NULL;
  368. u32 totalpacketlen;
  369. bool rtstatus;
  370. u8 u1rsvdpageloc[3] = { 0 };
  371. bool b_dlok = false;
  372. u8 *beacon;
  373. u8 *p_pspoll;
  374. u8 *nullfunc;
  375. u8 *p_probersp;
  376. /*---------------------------------------------------------
  377. * (1) beacon
  378. *---------------------------------------------------------
  379. */
  380. beacon = &reserved_page_packet[BEACON_PG * 128];
  381. SET_80211_HDR_ADDRESS2(beacon, mac->mac_addr);
  382. SET_80211_HDR_ADDRESS3(beacon, mac->bssid);
  383. /*-------------------------------------------------------
  384. * (2) ps-poll
  385. *--------------------------------------------------------
  386. */
  387. p_pspoll = &reserved_page_packet[PSPOLL_PG * 128];
  388. SET_80211_PS_POLL_AID(p_pspoll, (mac->assoc_id | 0xc000));
  389. SET_80211_PS_POLL_BSSID(p_pspoll, mac->bssid);
  390. SET_80211_PS_POLL_TA(p_pspoll, mac->mac_addr);
  391. SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1rsvdpageloc, PSPOLL_PG);
  392. /*--------------------------------------------------------
  393. * (3) null data
  394. *---------------------------------------------------------
  395. */
  396. nullfunc = &reserved_page_packet[NULL_PG * 128];
  397. SET_80211_HDR_ADDRESS1(nullfunc, mac->bssid);
  398. SET_80211_HDR_ADDRESS2(nullfunc, mac->mac_addr);
  399. SET_80211_HDR_ADDRESS3(nullfunc, mac->bssid);
  400. SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1rsvdpageloc, NULL_PG);
  401. /*---------------------------------------------------------
  402. * (4) probe response
  403. *----------------------------------------------------------
  404. */
  405. p_probersp = &reserved_page_packet[PROBERSP_PG * 128];
  406. SET_80211_HDR_ADDRESS1(p_probersp, mac->bssid);
  407. SET_80211_HDR_ADDRESS2(p_probersp, mac->mac_addr);
  408. SET_80211_HDR_ADDRESS3(p_probersp, mac->bssid);
  409. SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1rsvdpageloc, PROBERSP_PG);
  410. totalpacketlen = TOTAL_RESERVED_PKT_LEN;
  411. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
  412. "rtl8723e_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  413. &reserved_page_packet[0], totalpacketlen);
  414. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  415. "rtl8723e_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  416. u1rsvdpageloc, 3);
  417. skb = dev_alloc_skb(totalpacketlen);
  418. if (!skb)
  419. return;
  420. skb_put_data(skb, &reserved_page_packet, totalpacketlen);
  421. rtstatus = rtl_cmd_send_packet(hw, skb);
  422. if (rtstatus)
  423. b_dlok = true;
  424. if (b_dlok) {
  425. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  426. "Set RSVD page location to Fw.\n");
  427. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  428. "H2C_RSVDPAGE:\n",
  429. u1rsvdpageloc, 3);
  430. rtl8723e_fill_h2c_cmd(hw, H2C_RSVDPAGE,
  431. sizeof(u1rsvdpageloc), u1rsvdpageloc);
  432. } else
  433. RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
  434. "Set RSVD page location to Fw FAIL!!!!!!.\n");
  435. }
  436. void rtl8723e_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus)
  437. {
  438. u8 u1_joinbssrpt_parm[1] = { 0 };
  439. SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(u1_joinbssrpt_parm, mstatus);
  440. rtl8723e_fill_h2c_cmd(hw, H2C_JOINBSSRPT, 1, u1_joinbssrpt_parm);
  441. }
  442. static void rtl8723e_set_p2p_ctw_period_cmd(struct ieee80211_hw *hw,
  443. u8 ctwindow)
  444. {
  445. u8 u1_ctwindow_period[1] = { ctwindow};
  446. rtl8723e_fill_h2c_cmd(hw, H2C_P2P_PS_CTW_CMD, 1, u1_ctwindow_period);
  447. }
  448. void rtl8723e_set_p2p_ps_offload_cmd(struct ieee80211_hw *hw, u8 p2p_ps_state)
  449. {
  450. struct rtl_priv *rtlpriv = rtl_priv(hw);
  451. struct rtl_ps_ctl *rtlps = rtl_psc(rtl_priv(hw));
  452. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  453. struct rtl_p2p_ps_info *p2pinfo = &(rtlps->p2p_ps_info);
  454. struct p2p_ps_offload_t *p2p_ps_offload = &rtlhal->p2p_ps_offload;
  455. u8 i;
  456. u16 ctwindow;
  457. u32 start_time, tsf_low;
  458. switch (p2p_ps_state) {
  459. case P2P_PS_DISABLE:
  460. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_DISABLE\n");
  461. memset(p2p_ps_offload, 0, sizeof(*p2p_ps_offload));
  462. break;
  463. case P2P_PS_ENABLE:
  464. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_ENABLE\n");
  465. /* update CTWindow value. */
  466. if (p2pinfo->ctwindow > 0) {
  467. p2p_ps_offload->ctwindow_en = 1;
  468. ctwindow = p2pinfo->ctwindow;
  469. rtl8723e_set_p2p_ctw_period_cmd(hw, ctwindow);
  470. }
  471. /* hw only support 2 set of NoA */
  472. for (i = 0 ; i < p2pinfo->noa_num ; i++) {
  473. /* To control the register setting for which NOA*/
  474. rtl_write_byte(rtlpriv, 0x5cf, (i << 4));
  475. if (i == 0)
  476. p2p_ps_offload->noa0_en = 1;
  477. else
  478. p2p_ps_offload->noa1_en = 1;
  479. /* config P2P NoA Descriptor Register */
  480. rtl_write_dword(rtlpriv, 0x5E0,
  481. p2pinfo->noa_duration[i]);
  482. rtl_write_dword(rtlpriv, 0x5E4,
  483. p2pinfo->noa_interval[i]);
  484. /*Get Current TSF value */
  485. tsf_low = rtl_read_dword(rtlpriv, REG_TSFTR);
  486. start_time = p2pinfo->noa_start_time[i];
  487. if (p2pinfo->noa_count_type[i] != 1) {
  488. while (start_time <=
  489. (tsf_low+(50*1024))) {
  490. start_time +=
  491. p2pinfo->noa_interval[i];
  492. if (p2pinfo->noa_count_type[i] != 255)
  493. p2pinfo->noa_count_type[i]--;
  494. }
  495. }
  496. rtl_write_dword(rtlpriv, 0x5E8, start_time);
  497. rtl_write_dword(rtlpriv, 0x5EC,
  498. p2pinfo->noa_count_type[i]);
  499. }
  500. if ((p2pinfo->opp_ps == 1) || (p2pinfo->noa_num > 0)) {
  501. /* rst p2p circuit */
  502. rtl_write_byte(rtlpriv, REG_DUAL_TSF_RST, BIT(4));
  503. p2p_ps_offload->offload_en = 1;
  504. if (P2P_ROLE_GO == rtlpriv->mac80211.p2p) {
  505. p2p_ps_offload->role = 1;
  506. p2p_ps_offload->allstasleep = 0;
  507. } else {
  508. p2p_ps_offload->role = 0;
  509. }
  510. p2p_ps_offload->discovery = 0;
  511. }
  512. break;
  513. case P2P_PS_SCAN:
  514. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_SCAN\n");
  515. p2p_ps_offload->discovery = 1;
  516. break;
  517. case P2P_PS_SCAN_DONE:
  518. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_SCAN_DONE\n");
  519. p2p_ps_offload->discovery = 0;
  520. p2pinfo->p2p_ps_state = P2P_PS_ENABLE;
  521. break;
  522. default:
  523. break;
  524. }
  525. rtl8723e_fill_h2c_cmd(hw, H2C_P2P_PS_OFFLOAD, 1, (u8 *)p2p_ps_offload);
  526. }