sw.c 13 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2012 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. #include "../wifi.h"
  26. #include "../core.h"
  27. #include "../pci.h"
  28. #include "reg.h"
  29. #include "def.h"
  30. #include "phy.h"
  31. #include "dm.h"
  32. #include "fw.h"
  33. #include "../rtl8723com/fw_common.h"
  34. #include "hw.h"
  35. #include "sw.h"
  36. #include "trx.h"
  37. #include "led.h"
  38. #include "table.h"
  39. #include "hal_btc.h"
  40. #include "../btcoexist/rtl_btc.h"
  41. #include "../rtl8723com/phy_common.h"
  42. #include <linux/vmalloc.h>
  43. #include <linux/module.h>
  44. static void rtl8723e_init_aspm_vars(struct ieee80211_hw *hw)
  45. {
  46. struct rtl_priv *rtlpriv = rtl_priv(hw);
  47. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  48. /*close ASPM for AMD defaultly */
  49. rtlpci->const_amdpci_aspm = 0;
  50. /**
  51. * ASPM PS mode.
  52. * 0 - Disable ASPM,
  53. * 1 - Enable ASPM without Clock Req,
  54. * 2 - Enable ASPM with Clock Req,
  55. * 3 - Alwyas Enable ASPM with Clock Req,
  56. * 4 - Always Enable ASPM without Clock Req.
  57. * set defult to RTL8192CE:3 RTL8192E:2
  58. */
  59. rtlpci->const_pci_aspm = 3;
  60. /*Setting for PCI-E device */
  61. rtlpci->const_devicepci_aspm_setting = 0x03;
  62. /*Setting for PCI-E bridge */
  63. rtlpci->const_hostpci_aspm_setting = 0x02;
  64. /**
  65. * In Hw/Sw Radio Off situation.
  66. * 0 - Default,
  67. * 1 - From ASPM setting without low Mac Pwr,
  68. * 2 - From ASPM setting with low Mac Pwr,
  69. * 3 - Bus D3
  70. * set default to RTL8192CE:0 RTL8192SE:2
  71. */
  72. rtlpci->const_hwsw_rfoff_d3 = 0;
  73. /**
  74. * This setting works for those device with
  75. * backdoor ASPM setting such as EPHY setting.
  76. * 0 - Not support ASPM,
  77. * 1 - Support ASPM,
  78. * 2 - According to chipset.
  79. */
  80. rtlpci->const_support_pciaspm = rtlpriv->cfg->mod_params->aspm_support;
  81. }
  82. int rtl8723e_init_sw_vars(struct ieee80211_hw *hw)
  83. {
  84. struct rtl_priv *rtlpriv = rtl_priv(hw);
  85. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  86. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  87. int err = 0;
  88. char *fw_name = "rtlwifi/rtl8723fw.bin";
  89. rtl8723e_bt_reg_init(hw);
  90. rtlpriv->btcoexist.btc_ops = rtl_btc_get_ops_pointer();
  91. rtlpriv->dm.dm_initialgain_enable = 1;
  92. rtlpriv->dm.dm_flag = 0;
  93. rtlpriv->dm.disable_framebursting = 0;
  94. rtlpriv->dm.thermalvalue = 0;
  95. rtlpci->transmit_config = CFENDFORM | BIT(12) | BIT(13);
  96. /* compatible 5G band 88ce just 2.4G band & smsp */
  97. rtlpriv->rtlhal.current_bandtype = BAND_ON_2_4G;
  98. rtlpriv->rtlhal.bandset = BAND_ON_2_4G;
  99. rtlpriv->rtlhal.macphymode = SINGLEMAC_SINGLEPHY;
  100. rtlpci->receive_config = (RCR_APPFCS |
  101. RCR_APP_MIC |
  102. RCR_APP_ICV |
  103. RCR_APP_PHYST_RXFF |
  104. RCR_HTC_LOC_CTRL |
  105. RCR_AMF |
  106. RCR_ACF |
  107. RCR_ADF |
  108. RCR_AICV |
  109. RCR_AB |
  110. RCR_AM |
  111. RCR_APM |
  112. 0);
  113. rtlpci->irq_mask[0] =
  114. (u32) (PHIMR_ROK |
  115. PHIMR_RDU |
  116. PHIMR_VODOK |
  117. PHIMR_VIDOK |
  118. PHIMR_BEDOK |
  119. PHIMR_BKDOK |
  120. PHIMR_MGNTDOK |
  121. PHIMR_HIGHDOK |
  122. PHIMR_C2HCMD |
  123. PHIMR_HISRE_IND |
  124. PHIMR_TSF_BIT32_TOGGLE |
  125. PHIMR_TXBCNOK |
  126. PHIMR_PSTIMEOUT |
  127. 0);
  128. rtlpci->irq_mask[1] =
  129. (u32)(PHIMR_RXFOVW |
  130. 0);
  131. /* for LPS & IPS */
  132. rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps;
  133. rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps;
  134. rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps;
  135. rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support;
  136. rtlpriv->cfg->mod_params->sw_crypto =
  137. rtlpriv->cfg->mod_params->sw_crypto;
  138. rtlpriv->cfg->mod_params->disable_watchdog =
  139. rtlpriv->cfg->mod_params->disable_watchdog;
  140. if (rtlpriv->cfg->mod_params->disable_watchdog)
  141. pr_info("watchdog disabled\n");
  142. rtlpriv->psc.reg_fwctrl_lps = 3;
  143. rtlpriv->psc.reg_max_lps_awakeintvl = 5;
  144. rtl8723e_init_aspm_vars(hw);
  145. if (rtlpriv->psc.reg_fwctrl_lps == 1)
  146. rtlpriv->psc.fwctrl_psmode = FW_PS_MIN_MODE;
  147. else if (rtlpriv->psc.reg_fwctrl_lps == 2)
  148. rtlpriv->psc.fwctrl_psmode = FW_PS_MAX_MODE;
  149. else if (rtlpriv->psc.reg_fwctrl_lps == 3)
  150. rtlpriv->psc.fwctrl_psmode = FW_PS_DTIM_MODE;
  151. /* for firmware buf */
  152. rtlpriv->rtlhal.pfirmware = vzalloc(0x6000);
  153. if (!rtlpriv->rtlhal.pfirmware) {
  154. pr_err("Can't alloc buffer for fw.\n");
  155. return 1;
  156. }
  157. if (IS_81xxC_VENDOR_UMC_B_CUT(rtlhal->version))
  158. fw_name = "rtlwifi/rtl8723fw_B.bin";
  159. rtlpriv->max_fw_size = 0x6000;
  160. pr_info("Using firmware %s\n", fw_name);
  161. err = request_firmware_nowait(THIS_MODULE, 1, fw_name,
  162. rtlpriv->io.dev, GFP_KERNEL, hw,
  163. rtl_fw_cb);
  164. if (err) {
  165. pr_err("Failed to request firmware!\n");
  166. vfree(rtlpriv->rtlhal.pfirmware);
  167. rtlpriv->rtlhal.pfirmware = NULL;
  168. return 1;
  169. }
  170. return 0;
  171. }
  172. void rtl8723e_deinit_sw_vars(struct ieee80211_hw *hw)
  173. {
  174. struct rtl_priv *rtlpriv = rtl_priv(hw);
  175. if (rtlpriv->rtlhal.pfirmware) {
  176. vfree(rtlpriv->rtlhal.pfirmware);
  177. rtlpriv->rtlhal.pfirmware = NULL;
  178. }
  179. }
  180. /* get bt coexist status */
  181. bool rtl8723e_get_btc_status(void)
  182. {
  183. return true;
  184. }
  185. static bool is_fw_header(struct rtlwifi_firmware_header *hdr)
  186. {
  187. return (le16_to_cpu(hdr->signature) & 0xfff0) == 0x2300;
  188. }
  189. static struct rtl_hal_ops rtl8723e_hal_ops = {
  190. .init_sw_vars = rtl8723e_init_sw_vars,
  191. .deinit_sw_vars = rtl8723e_deinit_sw_vars,
  192. .read_eeprom_info = rtl8723e_read_eeprom_info,
  193. .interrupt_recognized = rtl8723e_interrupt_recognized,
  194. .hw_init = rtl8723e_hw_init,
  195. .hw_disable = rtl8723e_card_disable,
  196. .hw_suspend = rtl8723e_suspend,
  197. .hw_resume = rtl8723e_resume,
  198. .enable_interrupt = rtl8723e_enable_interrupt,
  199. .disable_interrupt = rtl8723e_disable_interrupt,
  200. .set_network_type = rtl8723e_set_network_type,
  201. .set_chk_bssid = rtl8723e_set_check_bssid,
  202. .set_qos = rtl8723e_set_qos,
  203. .set_bcn_reg = rtl8723e_set_beacon_related_registers,
  204. .set_bcn_intv = rtl8723e_set_beacon_interval,
  205. .update_interrupt_mask = rtl8723e_update_interrupt_mask,
  206. .get_hw_reg = rtl8723e_get_hw_reg,
  207. .set_hw_reg = rtl8723e_set_hw_reg,
  208. .update_rate_tbl = rtl8723e_update_hal_rate_tbl,
  209. .fill_tx_desc = rtl8723e_tx_fill_desc,
  210. .fill_tx_cmddesc = rtl8723e_tx_fill_cmddesc,
  211. .query_rx_desc = rtl8723e_rx_query_desc,
  212. .set_channel_access = rtl8723e_update_channel_access_setting,
  213. .radio_onoff_checking = rtl8723e_gpio_radio_on_off_checking,
  214. .set_bw_mode = rtl8723e_phy_set_bw_mode,
  215. .switch_channel = rtl8723e_phy_sw_chnl,
  216. .dm_watchdog = rtl8723e_dm_watchdog,
  217. .scan_operation_backup = rtl8723e_phy_scan_operation_backup,
  218. .set_rf_power_state = rtl8723e_phy_set_rf_power_state,
  219. .led_control = rtl8723e_led_control,
  220. .set_desc = rtl8723e_set_desc,
  221. .get_desc = rtl8723e_get_desc,
  222. .is_tx_desc_closed = rtl8723e_is_tx_desc_closed,
  223. .tx_polling = rtl8723e_tx_polling,
  224. .enable_hw_sec = rtl8723e_enable_hw_security_config,
  225. .set_key = rtl8723e_set_key,
  226. .init_sw_leds = rtl8723e_init_sw_leds,
  227. .get_bbreg = rtl8723_phy_query_bb_reg,
  228. .set_bbreg = rtl8723_phy_set_bb_reg,
  229. .get_rfreg = rtl8723e_phy_query_rf_reg,
  230. .set_rfreg = rtl8723e_phy_set_rf_reg,
  231. .c2h_command_handle = rtl_8723e_c2h_command_handle,
  232. .bt_wifi_media_status_notify = rtl_8723e_bt_wifi_media_status_notify,
  233. .bt_coex_off_before_lps =
  234. rtl8723e_dm_bt_turn_off_bt_coexist_before_enter_lps,
  235. .get_btc_status = rtl8723e_get_btc_status,
  236. .is_fw_header = is_fw_header,
  237. };
  238. static struct rtl_mod_params rtl8723e_mod_params = {
  239. .sw_crypto = false,
  240. .inactiveps = true,
  241. .swctrl_lps = false,
  242. .fwctrl_lps = true,
  243. .aspm_support = 1,
  244. .debug_level = 0,
  245. .debug_mask = 0,
  246. .msi_support = false,
  247. .disable_watchdog = false,
  248. };
  249. static const struct rtl_hal_cfg rtl8723e_hal_cfg = {
  250. .bar_id = 2,
  251. .write_readback = true,
  252. .name = "rtl8723e_pci",
  253. .ops = &rtl8723e_hal_ops,
  254. .mod_params = &rtl8723e_mod_params,
  255. .maps[SYS_ISO_CTRL] = REG_SYS_ISO_CTRL,
  256. .maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN,
  257. .maps[SYS_CLK] = REG_SYS_CLKR,
  258. .maps[MAC_RCR_AM] = AM,
  259. .maps[MAC_RCR_AB] = AB,
  260. .maps[MAC_RCR_ACRC32] = ACRC32,
  261. .maps[MAC_RCR_ACF] = ACF,
  262. .maps[MAC_RCR_AAP] = AAP,
  263. .maps[MAC_HIMR] = REG_HIMR,
  264. .maps[MAC_HIMRE] = REG_HIMRE,
  265. .maps[EFUSE_TEST] = REG_EFUSE_TEST,
  266. .maps[EFUSE_CTRL] = REG_EFUSE_CTRL,
  267. .maps[EFUSE_CLK] = 0,
  268. .maps[EFUSE_CLK_CTRL] = REG_EFUSE_CTRL,
  269. .maps[EFUSE_PWC_EV12V] = PWC_EV12V,
  270. .maps[EFUSE_FEN_ELDR] = FEN_ELDR,
  271. .maps[EFUSE_LOADER_CLK_EN] = LOADER_CLK_EN,
  272. .maps[EFUSE_ANA8M] = ANA8M,
  273. .maps[EFUSE_HWSET_MAX_SIZE] = HWSET_MAX_SIZE,
  274. .maps[EFUSE_MAX_SECTION_MAP] = EFUSE_MAX_SECTION,
  275. .maps[EFUSE_REAL_CONTENT_SIZE] = EFUSE_REAL_CONTENT_LEN,
  276. .maps[EFUSE_OOB_PROTECT_BYTES_LEN] = EFUSE_OOB_PROTECT_BYTES,
  277. .maps[RWCAM] = REG_CAMCMD,
  278. .maps[WCAMI] = REG_CAMWRITE,
  279. .maps[RCAMO] = REG_CAMREAD,
  280. .maps[CAMDBG] = REG_CAMDBG,
  281. .maps[SECR] = REG_SECCFG,
  282. .maps[SEC_CAM_NONE] = CAM_NONE,
  283. .maps[SEC_CAM_WEP40] = CAM_WEP40,
  284. .maps[SEC_CAM_TKIP] = CAM_TKIP,
  285. .maps[SEC_CAM_AES] = CAM_AES,
  286. .maps[SEC_CAM_WEP104] = CAM_WEP104,
  287. .maps[RTL_IMR_BCNDMAINT6] = IMR_BCNDMAINT6,
  288. .maps[RTL_IMR_BCNDMAINT5] = IMR_BCNDMAINT5,
  289. .maps[RTL_IMR_BCNDMAINT4] = IMR_BCNDMAINT4,
  290. .maps[RTL_IMR_BCNDMAINT3] = IMR_BCNDMAINT3,
  291. .maps[RTL_IMR_BCNDMAINT2] = IMR_BCNDMAINT2,
  292. .maps[RTL_IMR_BCNDMAINT1] = IMR_BCNDMAINT1,
  293. .maps[RTL_IMR_BCNDOK8] = IMR_BCNDOK8,
  294. .maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7,
  295. .maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6,
  296. .maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5,
  297. .maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4,
  298. .maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3,
  299. .maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2,
  300. .maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1,
  301. .maps[RTL_IMR_TIMEOUT2] = IMR_TIMEOUT2,
  302. .maps[RTL_IMR_TIMEOUT1] = IMR_TIMEOUT1,
  303. .maps[RTL_IMR_TXFOVW] = PHIMR_TXFOVW,
  304. .maps[RTL_IMR_PSTIMEOUT] = PHIMR_PSTIMEOUT,
  305. .maps[RTL_IMR_BCNINT] = PHIMR_BCNDMAINT0,
  306. .maps[RTL_IMR_RXFOVW] = PHIMR_RXFOVW,
  307. .maps[RTL_IMR_RDU] = PHIMR_RDU,
  308. .maps[RTL_IMR_ATIMEND] = PHIMR_ATIMEND_E,
  309. .maps[RTL_IMR_BDOK] = PHIMR_BCNDOK0,
  310. .maps[RTL_IMR_MGNTDOK] = PHIMR_MGNTDOK,
  311. .maps[RTL_IMR_TBDER] = PHIMR_TXBCNERR,
  312. .maps[RTL_IMR_HIGHDOK] = PHIMR_HIGHDOK,
  313. .maps[RTL_IMR_TBDOK] = PHIMR_TXBCNOK,
  314. .maps[RTL_IMR_BKDOK] = PHIMR_BKDOK,
  315. .maps[RTL_IMR_BEDOK] = PHIMR_BEDOK,
  316. .maps[RTL_IMR_VIDOK] = PHIMR_VIDOK,
  317. .maps[RTL_IMR_VODOK] = PHIMR_VODOK,
  318. .maps[RTL_IMR_ROK] = PHIMR_ROK,
  319. .maps[RTL_IBSS_INT_MASKS] =
  320. (PHIMR_BCNDMAINT0 | PHIMR_TXBCNOK | PHIMR_TXBCNERR),
  321. .maps[RTL_IMR_C2HCMD] = PHIMR_C2HCMD,
  322. .maps[RTL_RC_CCK_RATE1M] = DESC92C_RATE1M,
  323. .maps[RTL_RC_CCK_RATE2M] = DESC92C_RATE2M,
  324. .maps[RTL_RC_CCK_RATE5_5M] = DESC92C_RATE5_5M,
  325. .maps[RTL_RC_CCK_RATE11M] = DESC92C_RATE11M,
  326. .maps[RTL_RC_OFDM_RATE6M] = DESC92C_RATE6M,
  327. .maps[RTL_RC_OFDM_RATE9M] = DESC92C_RATE9M,
  328. .maps[RTL_RC_OFDM_RATE12M] = DESC92C_RATE12M,
  329. .maps[RTL_RC_OFDM_RATE18M] = DESC92C_RATE18M,
  330. .maps[RTL_RC_OFDM_RATE24M] = DESC92C_RATE24M,
  331. .maps[RTL_RC_OFDM_RATE36M] = DESC92C_RATE36M,
  332. .maps[RTL_RC_OFDM_RATE48M] = DESC92C_RATE48M,
  333. .maps[RTL_RC_OFDM_RATE54M] = DESC92C_RATE54M,
  334. .maps[RTL_RC_HT_RATEMCS7] = DESC92C_RATEMCS7,
  335. .maps[RTL_RC_HT_RATEMCS15] = DESC92C_RATEMCS15,
  336. };
  337. static const struct pci_device_id rtl8723e_pci_ids[] = {
  338. {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8723, rtl8723e_hal_cfg)},
  339. {},
  340. };
  341. MODULE_DEVICE_TABLE(pci, rtl8723e_pci_ids);
  342. MODULE_AUTHOR("lizhaoming <chaoming_li@realsil.com.cn>");
  343. MODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>");
  344. MODULE_LICENSE("GPL");
  345. MODULE_DESCRIPTION("Realtek 8723E 802.11n PCI wireless");
  346. MODULE_FIRMWARE("rtlwifi/rtl8723efw.bin");
  347. module_param_named(swenc, rtl8723e_mod_params.sw_crypto, bool, 0444);
  348. module_param_named(debug_level, rtl8723e_mod_params.debug_level, int, 0644);
  349. module_param_named(debug_mask, rtl8723e_mod_params.debug_mask, ullong, 0644);
  350. module_param_named(ips, rtl8723e_mod_params.inactiveps, bool, 0444);
  351. module_param_named(swlps, rtl8723e_mod_params.swctrl_lps, bool, 0444);
  352. module_param_named(fwlps, rtl8723e_mod_params.fwctrl_lps, bool, 0444);
  353. module_param_named(msi, rtl8723e_mod_params.msi_support, bool, 0444);
  354. module_param_named(aspm, rtl8723e_mod_params.aspm_support, int, 0444);
  355. module_param_named(disable_watchdog, rtl8723e_mod_params.disable_watchdog,
  356. bool, 0444);
  357. MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n");
  358. MODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n");
  359. MODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 0)\n");
  360. MODULE_PARM_DESC(fwlps, "Set to 1 to use FW control power save (default 1)\n");
  361. MODULE_PARM_DESC(msi, "Set to 1 to use MSI interrupts mode (default 0)\n");
  362. MODULE_PARM_DESC(aspm, "Set to 1 to enable ASPM (default 1)\n");
  363. MODULE_PARM_DESC(debug_level, "Set debug level (0-5) (default 0)");
  364. MODULE_PARM_DESC(debug_mask, "Set debug mask (default 0)");
  365. MODULE_PARM_DESC(disable_watchdog, "Set to 1 to disable the watchdog (default 0)\n");
  366. static SIMPLE_DEV_PM_OPS(rtlwifi_pm_ops, rtl_pci_suspend, rtl_pci_resume);
  367. static struct pci_driver rtl8723e_driver = {
  368. .name = KBUILD_MODNAME,
  369. .id_table = rtl8723e_pci_ids,
  370. .probe = rtl_pci_probe,
  371. .remove = rtl_pci_disconnect,
  372. .driver.pm = &rtlwifi_pm_ops,
  373. };
  374. module_pci_driver(rtl8723e_driver);