pwm-mxs.c 4.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2012 Freescale Semiconductor, Inc.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/err.h>
  7. #include <linux/io.h>
  8. #include <linux/kernel.h>
  9. #include <linux/module.h>
  10. #include <linux/of.h>
  11. #include <linux/of_address.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/pwm.h>
  14. #include <linux/slab.h>
  15. #include <linux/stmp_device.h>
  16. #define SET 0x4
  17. #define CLR 0x8
  18. #define TOG 0xc
  19. #define PWM_CTRL 0x0
  20. #define PWM_ACTIVE0 0x10
  21. #define PWM_PERIOD0 0x20
  22. #define PERIOD_PERIOD(p) ((p) & 0xffff)
  23. #define PERIOD_PERIOD_MAX 0x10000
  24. #define PERIOD_ACTIVE_HIGH (3 << 16)
  25. #define PERIOD_INACTIVE_LOW (2 << 18)
  26. #define PERIOD_CDIV(div) (((div) & 0x7) << 20)
  27. #define PERIOD_CDIV_MAX 8
  28. static const unsigned int cdiv[PERIOD_CDIV_MAX] = {
  29. 1, 2, 4, 8, 16, 64, 256, 1024
  30. };
  31. struct mxs_pwm_chip {
  32. struct pwm_chip chip;
  33. struct clk *clk;
  34. void __iomem *base;
  35. };
  36. #define to_mxs_pwm_chip(_chip) container_of(_chip, struct mxs_pwm_chip, chip)
  37. static int mxs_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
  38. int duty_ns, int period_ns)
  39. {
  40. struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip);
  41. int ret, div = 0;
  42. unsigned int period_cycles, duty_cycles;
  43. unsigned long rate;
  44. unsigned long long c;
  45. rate = clk_get_rate(mxs->clk);
  46. while (1) {
  47. c = rate / cdiv[div];
  48. c = c * period_ns;
  49. do_div(c, 1000000000);
  50. if (c < PERIOD_PERIOD_MAX)
  51. break;
  52. div++;
  53. if (div >= PERIOD_CDIV_MAX)
  54. return -EINVAL;
  55. }
  56. period_cycles = c;
  57. c *= duty_ns;
  58. do_div(c, period_ns);
  59. duty_cycles = c;
  60. /*
  61. * If the PWM channel is disabled, make sure to turn on the clock
  62. * before writing the register. Otherwise, keep it enabled.
  63. */
  64. if (!pwm_is_enabled(pwm)) {
  65. ret = clk_prepare_enable(mxs->clk);
  66. if (ret)
  67. return ret;
  68. }
  69. writel(duty_cycles << 16,
  70. mxs->base + PWM_ACTIVE0 + pwm->hwpwm * 0x20);
  71. writel(PERIOD_PERIOD(period_cycles) | PERIOD_ACTIVE_HIGH |
  72. PERIOD_INACTIVE_LOW | PERIOD_CDIV(div),
  73. mxs->base + PWM_PERIOD0 + pwm->hwpwm * 0x20);
  74. /*
  75. * If the PWM is not enabled, turn the clock off again to save power.
  76. */
  77. if (!pwm_is_enabled(pwm))
  78. clk_disable_unprepare(mxs->clk);
  79. return 0;
  80. }
  81. static int mxs_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
  82. {
  83. struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip);
  84. int ret;
  85. ret = clk_prepare_enable(mxs->clk);
  86. if (ret)
  87. return ret;
  88. writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + SET);
  89. return 0;
  90. }
  91. static void mxs_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
  92. {
  93. struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip);
  94. writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + CLR);
  95. clk_disable_unprepare(mxs->clk);
  96. }
  97. static const struct pwm_ops mxs_pwm_ops = {
  98. .config = mxs_pwm_config,
  99. .enable = mxs_pwm_enable,
  100. .disable = mxs_pwm_disable,
  101. .owner = THIS_MODULE,
  102. };
  103. static int mxs_pwm_probe(struct platform_device *pdev)
  104. {
  105. struct device_node *np = pdev->dev.of_node;
  106. struct mxs_pwm_chip *mxs;
  107. struct resource *res;
  108. int ret;
  109. mxs = devm_kzalloc(&pdev->dev, sizeof(*mxs), GFP_KERNEL);
  110. if (!mxs)
  111. return -ENOMEM;
  112. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  113. mxs->base = devm_ioremap_resource(&pdev->dev, res);
  114. if (IS_ERR(mxs->base))
  115. return PTR_ERR(mxs->base);
  116. mxs->clk = devm_clk_get(&pdev->dev, NULL);
  117. if (IS_ERR(mxs->clk))
  118. return PTR_ERR(mxs->clk);
  119. mxs->chip.dev = &pdev->dev;
  120. mxs->chip.ops = &mxs_pwm_ops;
  121. mxs->chip.base = -1;
  122. ret = of_property_read_u32(np, "fsl,pwm-number", &mxs->chip.npwm);
  123. if (ret < 0) {
  124. dev_err(&pdev->dev, "failed to get pwm number: %d\n", ret);
  125. return ret;
  126. }
  127. ret = pwmchip_add(&mxs->chip);
  128. if (ret < 0) {
  129. dev_err(&pdev->dev, "failed to add pwm chip %d\n", ret);
  130. return ret;
  131. }
  132. platform_set_drvdata(pdev, mxs);
  133. ret = stmp_reset_block(mxs->base);
  134. if (ret)
  135. goto pwm_remove;
  136. return 0;
  137. pwm_remove:
  138. pwmchip_remove(&mxs->chip);
  139. return ret;
  140. }
  141. static int mxs_pwm_remove(struct platform_device *pdev)
  142. {
  143. struct mxs_pwm_chip *mxs = platform_get_drvdata(pdev);
  144. return pwmchip_remove(&mxs->chip);
  145. }
  146. static const struct of_device_id mxs_pwm_dt_ids[] = {
  147. { .compatible = "fsl,imx23-pwm", },
  148. { /* sentinel */ }
  149. };
  150. MODULE_DEVICE_TABLE(of, mxs_pwm_dt_ids);
  151. static struct platform_driver mxs_pwm_driver = {
  152. .driver = {
  153. .name = "mxs-pwm",
  154. .of_match_table = mxs_pwm_dt_ids,
  155. },
  156. .probe = mxs_pwm_probe,
  157. .remove = mxs_pwm_remove,
  158. };
  159. module_platform_driver(mxs_pwm_driver);
  160. MODULE_ALIAS("platform:mxs-pwm");
  161. MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
  162. MODULE_DESCRIPTION("Freescale MXS PWM Driver");
  163. MODULE_LICENSE("GPL v2");