serial_txx9.c 33 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Derived from many drivers using generic_serial interface,
  4. * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
  5. * (was in Linux/VR tree) by Jim Pick.
  6. *
  7. * Copyright (C) 1999 Harald Koerfgen
  8. * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
  9. * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
  10. * Copyright (C) 2000-2002 Toshiba Corporation
  11. *
  12. * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
  13. */
  14. #if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  15. #define SUPPORT_SYSRQ
  16. #endif
  17. #include <linux/module.h>
  18. #include <linux/ioport.h>
  19. #include <linux/init.h>
  20. #include <linux/console.h>
  21. #include <linux/delay.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/pci.h>
  24. #include <linux/serial_core.h>
  25. #include <linux/serial.h>
  26. #include <linux/tty.h>
  27. #include <linux/tty_flip.h>
  28. #include <asm/io.h>
  29. static char *serial_version = "1.11";
  30. static char *serial_name = "TX39/49 Serial driver";
  31. #define PASS_LIMIT 256
  32. #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
  33. /* "ttyS" is used for standard serial driver */
  34. #define TXX9_TTY_NAME "ttyTX"
  35. #define TXX9_TTY_MINOR_START 196
  36. #define TXX9_TTY_MAJOR 204
  37. #else
  38. /* acts like standard serial driver */
  39. #define TXX9_TTY_NAME "ttyS"
  40. #define TXX9_TTY_MINOR_START 64
  41. #define TXX9_TTY_MAJOR TTY_MAJOR
  42. #endif
  43. /* flag aliases */
  44. #define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
  45. #define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
  46. #ifdef CONFIG_PCI
  47. /* support for Toshiba TC86C001 SIO */
  48. #define ENABLE_SERIAL_TXX9_PCI
  49. #endif
  50. /*
  51. * Number of serial ports
  52. */
  53. #define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS
  54. struct uart_txx9_port {
  55. struct uart_port port;
  56. /* No additional info for now */
  57. };
  58. #define TXX9_REGION_SIZE 0x24
  59. /* TXX9 Serial Registers */
  60. #define TXX9_SILCR 0x00
  61. #define TXX9_SIDICR 0x04
  62. #define TXX9_SIDISR 0x08
  63. #define TXX9_SICISR 0x0c
  64. #define TXX9_SIFCR 0x10
  65. #define TXX9_SIFLCR 0x14
  66. #define TXX9_SIBGR 0x18
  67. #define TXX9_SITFIFO 0x1c
  68. #define TXX9_SIRFIFO 0x20
  69. /* SILCR : Line Control */
  70. #define TXX9_SILCR_SCS_MASK 0x00000060
  71. #define TXX9_SILCR_SCS_IMCLK 0x00000000
  72. #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
  73. #define TXX9_SILCR_SCS_SCLK 0x00000040
  74. #define TXX9_SILCR_SCS_SCLK_BG 0x00000060
  75. #define TXX9_SILCR_UEPS 0x00000010
  76. #define TXX9_SILCR_UPEN 0x00000008
  77. #define TXX9_SILCR_USBL_MASK 0x00000004
  78. #define TXX9_SILCR_USBL_1BIT 0x00000000
  79. #define TXX9_SILCR_USBL_2BIT 0x00000004
  80. #define TXX9_SILCR_UMODE_MASK 0x00000003
  81. #define TXX9_SILCR_UMODE_8BIT 0x00000000
  82. #define TXX9_SILCR_UMODE_7BIT 0x00000001
  83. /* SIDICR : DMA/Int. Control */
  84. #define TXX9_SIDICR_TDE 0x00008000
  85. #define TXX9_SIDICR_RDE 0x00004000
  86. #define TXX9_SIDICR_TIE 0x00002000
  87. #define TXX9_SIDICR_RIE 0x00001000
  88. #define TXX9_SIDICR_SPIE 0x00000800
  89. #define TXX9_SIDICR_CTSAC 0x00000600
  90. #define TXX9_SIDICR_STIE_MASK 0x0000003f
  91. #define TXX9_SIDICR_STIE_OERS 0x00000020
  92. #define TXX9_SIDICR_STIE_CTSS 0x00000010
  93. #define TXX9_SIDICR_STIE_RBRKD 0x00000008
  94. #define TXX9_SIDICR_STIE_TRDY 0x00000004
  95. #define TXX9_SIDICR_STIE_TXALS 0x00000002
  96. #define TXX9_SIDICR_STIE_UBRKD 0x00000001
  97. /* SIDISR : DMA/Int. Status */
  98. #define TXX9_SIDISR_UBRK 0x00008000
  99. #define TXX9_SIDISR_UVALID 0x00004000
  100. #define TXX9_SIDISR_UFER 0x00002000
  101. #define TXX9_SIDISR_UPER 0x00001000
  102. #define TXX9_SIDISR_UOER 0x00000800
  103. #define TXX9_SIDISR_ERI 0x00000400
  104. #define TXX9_SIDISR_TOUT 0x00000200
  105. #define TXX9_SIDISR_TDIS 0x00000100
  106. #define TXX9_SIDISR_RDIS 0x00000080
  107. #define TXX9_SIDISR_STIS 0x00000040
  108. #define TXX9_SIDISR_RFDN_MASK 0x0000001f
  109. /* SICISR : Change Int. Status */
  110. #define TXX9_SICISR_OERS 0x00000020
  111. #define TXX9_SICISR_CTSS 0x00000010
  112. #define TXX9_SICISR_RBRKD 0x00000008
  113. #define TXX9_SICISR_TRDY 0x00000004
  114. #define TXX9_SICISR_TXALS 0x00000002
  115. #define TXX9_SICISR_UBRKD 0x00000001
  116. /* SIFCR : FIFO Control */
  117. #define TXX9_SIFCR_SWRST 0x00008000
  118. #define TXX9_SIFCR_RDIL_MASK 0x00000180
  119. #define TXX9_SIFCR_RDIL_1 0x00000000
  120. #define TXX9_SIFCR_RDIL_4 0x00000080
  121. #define TXX9_SIFCR_RDIL_8 0x00000100
  122. #define TXX9_SIFCR_RDIL_12 0x00000180
  123. #define TXX9_SIFCR_RDIL_MAX 0x00000180
  124. #define TXX9_SIFCR_TDIL_MASK 0x00000018
  125. #define TXX9_SIFCR_TDIL_1 0x00000000
  126. #define TXX9_SIFCR_TDIL_4 0x00000001
  127. #define TXX9_SIFCR_TDIL_8 0x00000010
  128. #define TXX9_SIFCR_TDIL_MAX 0x00000010
  129. #define TXX9_SIFCR_TFRST 0x00000004
  130. #define TXX9_SIFCR_RFRST 0x00000002
  131. #define TXX9_SIFCR_FRSTE 0x00000001
  132. #define TXX9_SIO_TX_FIFO 8
  133. #define TXX9_SIO_RX_FIFO 16
  134. /* SIFLCR : Flow Control */
  135. #define TXX9_SIFLCR_RCS 0x00001000
  136. #define TXX9_SIFLCR_TES 0x00000800
  137. #define TXX9_SIFLCR_RTSSC 0x00000200
  138. #define TXX9_SIFLCR_RSDE 0x00000100
  139. #define TXX9_SIFLCR_TSDE 0x00000080
  140. #define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
  141. #define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
  142. #define TXX9_SIFLCR_TBRK 0x00000001
  143. /* SIBGR : Baudrate Control */
  144. #define TXX9_SIBGR_BCLK_MASK 0x00000300
  145. #define TXX9_SIBGR_BCLK_T0 0x00000000
  146. #define TXX9_SIBGR_BCLK_T2 0x00000100
  147. #define TXX9_SIBGR_BCLK_T4 0x00000200
  148. #define TXX9_SIBGR_BCLK_T6 0x00000300
  149. #define TXX9_SIBGR_BRD_MASK 0x000000ff
  150. static inline unsigned int sio_in(struct uart_txx9_port *up, int offset)
  151. {
  152. switch (up->port.iotype) {
  153. default:
  154. return __raw_readl(up->port.membase + offset);
  155. case UPIO_PORT:
  156. return inl(up->port.iobase + offset);
  157. }
  158. }
  159. static inline void
  160. sio_out(struct uart_txx9_port *up, int offset, int value)
  161. {
  162. switch (up->port.iotype) {
  163. default:
  164. __raw_writel(value, up->port.membase + offset);
  165. break;
  166. case UPIO_PORT:
  167. outl(value, up->port.iobase + offset);
  168. break;
  169. }
  170. }
  171. static inline void
  172. sio_mask(struct uart_txx9_port *up, int offset, unsigned int value)
  173. {
  174. sio_out(up, offset, sio_in(up, offset) & ~value);
  175. }
  176. static inline void
  177. sio_set(struct uart_txx9_port *up, int offset, unsigned int value)
  178. {
  179. sio_out(up, offset, sio_in(up, offset) | value);
  180. }
  181. static inline void
  182. sio_quot_set(struct uart_txx9_port *up, int quot)
  183. {
  184. quot >>= 1;
  185. if (quot < 256)
  186. sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
  187. else if (quot < (256 << 2))
  188. sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
  189. else if (quot < (256 << 4))
  190. sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
  191. else if (quot < (256 << 6))
  192. sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
  193. else
  194. sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
  195. }
  196. static struct uart_txx9_port *to_uart_txx9_port(struct uart_port *port)
  197. {
  198. return container_of(port, struct uart_txx9_port, port);
  199. }
  200. static void serial_txx9_stop_tx(struct uart_port *port)
  201. {
  202. struct uart_txx9_port *up = to_uart_txx9_port(port);
  203. sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
  204. }
  205. static void serial_txx9_start_tx(struct uart_port *port)
  206. {
  207. struct uart_txx9_port *up = to_uart_txx9_port(port);
  208. sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
  209. }
  210. static void serial_txx9_stop_rx(struct uart_port *port)
  211. {
  212. struct uart_txx9_port *up = to_uart_txx9_port(port);
  213. up->port.read_status_mask &= ~TXX9_SIDISR_RDIS;
  214. }
  215. static void serial_txx9_initialize(struct uart_port *port)
  216. {
  217. struct uart_txx9_port *up = to_uart_txx9_port(port);
  218. unsigned int tmout = 10000;
  219. sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
  220. /* TX4925 BUG WORKAROUND. Accessing SIOC register
  221. * immediately after soft reset causes bus error. */
  222. mmiowb();
  223. udelay(1);
  224. while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
  225. udelay(1);
  226. /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
  227. sio_set(up, TXX9_SIFCR,
  228. TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
  229. /* initial settings */
  230. sio_out(up, TXX9_SILCR,
  231. TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
  232. ((up->port.flags & UPF_TXX9_USE_SCLK) ?
  233. TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
  234. sio_quot_set(up, uart_get_divisor(port, 9600));
  235. sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
  236. sio_out(up, TXX9_SIDICR, 0);
  237. }
  238. static inline void
  239. receive_chars(struct uart_txx9_port *up, unsigned int *status)
  240. {
  241. unsigned char ch;
  242. unsigned int disr = *status;
  243. int max_count = 256;
  244. char flag;
  245. unsigned int next_ignore_status_mask;
  246. do {
  247. ch = sio_in(up, TXX9_SIRFIFO);
  248. flag = TTY_NORMAL;
  249. up->port.icount.rx++;
  250. /* mask out RFDN_MASK bit added by previous overrun */
  251. next_ignore_status_mask =
  252. up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
  253. if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
  254. TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
  255. /*
  256. * For statistics only
  257. */
  258. if (disr & TXX9_SIDISR_UBRK) {
  259. disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
  260. up->port.icount.brk++;
  261. /*
  262. * We do the SysRQ and SAK checking
  263. * here because otherwise the break
  264. * may get masked by ignore_status_mask
  265. * or read_status_mask.
  266. */
  267. if (uart_handle_break(&up->port))
  268. goto ignore_char;
  269. } else if (disr & TXX9_SIDISR_UPER)
  270. up->port.icount.parity++;
  271. else if (disr & TXX9_SIDISR_UFER)
  272. up->port.icount.frame++;
  273. if (disr & TXX9_SIDISR_UOER) {
  274. up->port.icount.overrun++;
  275. /*
  276. * The receiver read buffer still hold
  277. * a char which caused overrun.
  278. * Ignore next char by adding RFDN_MASK
  279. * to ignore_status_mask temporarily.
  280. */
  281. next_ignore_status_mask |=
  282. TXX9_SIDISR_RFDN_MASK;
  283. }
  284. /*
  285. * Mask off conditions which should be ingored.
  286. */
  287. disr &= up->port.read_status_mask;
  288. if (disr & TXX9_SIDISR_UBRK) {
  289. flag = TTY_BREAK;
  290. } else if (disr & TXX9_SIDISR_UPER)
  291. flag = TTY_PARITY;
  292. else if (disr & TXX9_SIDISR_UFER)
  293. flag = TTY_FRAME;
  294. }
  295. if (uart_handle_sysrq_char(&up->port, ch))
  296. goto ignore_char;
  297. uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag);
  298. ignore_char:
  299. up->port.ignore_status_mask = next_ignore_status_mask;
  300. disr = sio_in(up, TXX9_SIDISR);
  301. } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
  302. spin_unlock(&up->port.lock);
  303. tty_flip_buffer_push(&up->port.state->port);
  304. spin_lock(&up->port.lock);
  305. *status = disr;
  306. }
  307. static inline void transmit_chars(struct uart_txx9_port *up)
  308. {
  309. struct circ_buf *xmit = &up->port.state->xmit;
  310. int count;
  311. if (up->port.x_char) {
  312. sio_out(up, TXX9_SITFIFO, up->port.x_char);
  313. up->port.icount.tx++;
  314. up->port.x_char = 0;
  315. return;
  316. }
  317. if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
  318. serial_txx9_stop_tx(&up->port);
  319. return;
  320. }
  321. count = TXX9_SIO_TX_FIFO;
  322. do {
  323. sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
  324. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  325. up->port.icount.tx++;
  326. if (uart_circ_empty(xmit))
  327. break;
  328. } while (--count > 0);
  329. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  330. uart_write_wakeup(&up->port);
  331. if (uart_circ_empty(xmit))
  332. serial_txx9_stop_tx(&up->port);
  333. }
  334. static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
  335. {
  336. int pass_counter = 0;
  337. struct uart_txx9_port *up = dev_id;
  338. unsigned int status;
  339. while (1) {
  340. spin_lock(&up->port.lock);
  341. status = sio_in(up, TXX9_SIDISR);
  342. if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
  343. status &= ~TXX9_SIDISR_TDIS;
  344. if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
  345. TXX9_SIDISR_TOUT))) {
  346. spin_unlock(&up->port.lock);
  347. break;
  348. }
  349. if (status & TXX9_SIDISR_RDIS)
  350. receive_chars(up, &status);
  351. if (status & TXX9_SIDISR_TDIS)
  352. transmit_chars(up);
  353. /* Clear TX/RX Int. Status */
  354. sio_mask(up, TXX9_SIDISR,
  355. TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
  356. TXX9_SIDISR_TOUT);
  357. spin_unlock(&up->port.lock);
  358. if (pass_counter++ > PASS_LIMIT)
  359. break;
  360. }
  361. return pass_counter ? IRQ_HANDLED : IRQ_NONE;
  362. }
  363. static unsigned int serial_txx9_tx_empty(struct uart_port *port)
  364. {
  365. struct uart_txx9_port *up = to_uart_txx9_port(port);
  366. unsigned long flags;
  367. unsigned int ret;
  368. spin_lock_irqsave(&up->port.lock, flags);
  369. ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
  370. spin_unlock_irqrestore(&up->port.lock, flags);
  371. return ret;
  372. }
  373. static unsigned int serial_txx9_get_mctrl(struct uart_port *port)
  374. {
  375. struct uart_txx9_port *up = to_uart_txx9_port(port);
  376. unsigned int ret;
  377. /* no modem control lines */
  378. ret = TIOCM_CAR | TIOCM_DSR;
  379. ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS;
  380. ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS;
  381. return ret;
  382. }
  383. static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl)
  384. {
  385. struct uart_txx9_port *up = to_uart_txx9_port(port);
  386. if (mctrl & TIOCM_RTS)
  387. sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
  388. else
  389. sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
  390. }
  391. static void serial_txx9_break_ctl(struct uart_port *port, int break_state)
  392. {
  393. struct uart_txx9_port *up = to_uart_txx9_port(port);
  394. unsigned long flags;
  395. spin_lock_irqsave(&up->port.lock, flags);
  396. if (break_state == -1)
  397. sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
  398. else
  399. sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
  400. spin_unlock_irqrestore(&up->port.lock, flags);
  401. }
  402. #if defined(CONFIG_SERIAL_TXX9_CONSOLE) || defined(CONFIG_CONSOLE_POLL)
  403. /*
  404. * Wait for transmitter & holding register to empty
  405. */
  406. static void wait_for_xmitr(struct uart_txx9_port *up)
  407. {
  408. unsigned int tmout = 10000;
  409. /* Wait up to 10ms for the character(s) to be sent. */
  410. while (--tmout &&
  411. !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
  412. udelay(1);
  413. /* Wait up to 1s for flow control if necessary */
  414. if (up->port.flags & UPF_CONS_FLOW) {
  415. tmout = 1000000;
  416. while (--tmout &&
  417. (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
  418. udelay(1);
  419. }
  420. }
  421. #endif
  422. #ifdef CONFIG_CONSOLE_POLL
  423. /*
  424. * Console polling routines for writing and reading from the uart while
  425. * in an interrupt or debug context.
  426. */
  427. static int serial_txx9_get_poll_char(struct uart_port *port)
  428. {
  429. unsigned int ier;
  430. unsigned char c;
  431. struct uart_txx9_port *up = to_uart_txx9_port(port);
  432. /*
  433. * First save the IER then disable the interrupts
  434. */
  435. ier = sio_in(up, TXX9_SIDICR);
  436. sio_out(up, TXX9_SIDICR, 0);
  437. while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID)
  438. ;
  439. c = sio_in(up, TXX9_SIRFIFO);
  440. /*
  441. * Finally, clear RX interrupt status
  442. * and restore the IER
  443. */
  444. sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS);
  445. sio_out(up, TXX9_SIDICR, ier);
  446. return c;
  447. }
  448. static void serial_txx9_put_poll_char(struct uart_port *port, unsigned char c)
  449. {
  450. unsigned int ier;
  451. struct uart_txx9_port *up = to_uart_txx9_port(port);
  452. /*
  453. * First save the IER then disable the interrupts
  454. */
  455. ier = sio_in(up, TXX9_SIDICR);
  456. sio_out(up, TXX9_SIDICR, 0);
  457. wait_for_xmitr(up);
  458. /*
  459. * Send the character out.
  460. */
  461. sio_out(up, TXX9_SITFIFO, c);
  462. /*
  463. * Finally, wait for transmitter to become empty
  464. * and restore the IER
  465. */
  466. wait_for_xmitr(up);
  467. sio_out(up, TXX9_SIDICR, ier);
  468. }
  469. #endif /* CONFIG_CONSOLE_POLL */
  470. static int serial_txx9_startup(struct uart_port *port)
  471. {
  472. struct uart_txx9_port *up = to_uart_txx9_port(port);
  473. unsigned long flags;
  474. int retval;
  475. /*
  476. * Clear the FIFO buffers and disable them.
  477. * (they will be reenabled in set_termios())
  478. */
  479. sio_set(up, TXX9_SIFCR,
  480. TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
  481. /* clear reset */
  482. sio_mask(up, TXX9_SIFCR,
  483. TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
  484. sio_out(up, TXX9_SIDICR, 0);
  485. /*
  486. * Clear the interrupt registers.
  487. */
  488. sio_out(up, TXX9_SIDISR, 0);
  489. retval = request_irq(up->port.irq, serial_txx9_interrupt,
  490. IRQF_SHARED, "serial_txx9", up);
  491. if (retval)
  492. return retval;
  493. /*
  494. * Now, initialize the UART
  495. */
  496. spin_lock_irqsave(&up->port.lock, flags);
  497. serial_txx9_set_mctrl(&up->port, up->port.mctrl);
  498. spin_unlock_irqrestore(&up->port.lock, flags);
  499. /* Enable RX/TX */
  500. sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
  501. /*
  502. * Finally, enable interrupts.
  503. */
  504. sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
  505. return 0;
  506. }
  507. static void serial_txx9_shutdown(struct uart_port *port)
  508. {
  509. struct uart_txx9_port *up = to_uart_txx9_port(port);
  510. unsigned long flags;
  511. /*
  512. * Disable interrupts from this port
  513. */
  514. sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
  515. spin_lock_irqsave(&up->port.lock, flags);
  516. serial_txx9_set_mctrl(&up->port, up->port.mctrl);
  517. spin_unlock_irqrestore(&up->port.lock, flags);
  518. /*
  519. * Disable break condition
  520. */
  521. sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
  522. #ifdef CONFIG_SERIAL_TXX9_CONSOLE
  523. if (up->port.cons && up->port.line == up->port.cons->index) {
  524. free_irq(up->port.irq, up);
  525. return;
  526. }
  527. #endif
  528. /* reset FIFOs */
  529. sio_set(up, TXX9_SIFCR,
  530. TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
  531. /* clear reset */
  532. sio_mask(up, TXX9_SIFCR,
  533. TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
  534. /* Disable RX/TX */
  535. sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
  536. free_irq(up->port.irq, up);
  537. }
  538. static void
  539. serial_txx9_set_termios(struct uart_port *port, struct ktermios *termios,
  540. struct ktermios *old)
  541. {
  542. struct uart_txx9_port *up = to_uart_txx9_port(port);
  543. unsigned int cval, fcr = 0;
  544. unsigned long flags;
  545. unsigned int baud, quot;
  546. /*
  547. * We don't support modem control lines.
  548. */
  549. termios->c_cflag &= ~(HUPCL | CMSPAR);
  550. termios->c_cflag |= CLOCAL;
  551. cval = sio_in(up, TXX9_SILCR);
  552. /* byte size and parity */
  553. cval &= ~TXX9_SILCR_UMODE_MASK;
  554. switch (termios->c_cflag & CSIZE) {
  555. case CS7:
  556. cval |= TXX9_SILCR_UMODE_7BIT;
  557. break;
  558. default:
  559. case CS5: /* not supported */
  560. case CS6: /* not supported */
  561. case CS8:
  562. cval |= TXX9_SILCR_UMODE_8BIT;
  563. break;
  564. }
  565. cval &= ~TXX9_SILCR_USBL_MASK;
  566. if (termios->c_cflag & CSTOPB)
  567. cval |= TXX9_SILCR_USBL_2BIT;
  568. else
  569. cval |= TXX9_SILCR_USBL_1BIT;
  570. cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
  571. if (termios->c_cflag & PARENB)
  572. cval |= TXX9_SILCR_UPEN;
  573. if (!(termios->c_cflag & PARODD))
  574. cval |= TXX9_SILCR_UEPS;
  575. /*
  576. * Ask the core to calculate the divisor for us.
  577. */
  578. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2);
  579. quot = uart_get_divisor(port, baud);
  580. /* Set up FIFOs */
  581. /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
  582. fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
  583. /*
  584. * Ok, we're now changing the port state. Do it with
  585. * interrupts disabled.
  586. */
  587. spin_lock_irqsave(&up->port.lock, flags);
  588. /*
  589. * Update the per-port timeout.
  590. */
  591. uart_update_timeout(port, termios->c_cflag, baud);
  592. up->port.read_status_mask = TXX9_SIDISR_UOER |
  593. TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
  594. if (termios->c_iflag & INPCK)
  595. up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
  596. if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
  597. up->port.read_status_mask |= TXX9_SIDISR_UBRK;
  598. /*
  599. * Characteres to ignore
  600. */
  601. up->port.ignore_status_mask = 0;
  602. if (termios->c_iflag & IGNPAR)
  603. up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
  604. if (termios->c_iflag & IGNBRK) {
  605. up->port.ignore_status_mask |= TXX9_SIDISR_UBRK;
  606. /*
  607. * If we're ignoring parity and break indicators,
  608. * ignore overruns too (for real raw support).
  609. */
  610. if (termios->c_iflag & IGNPAR)
  611. up->port.ignore_status_mask |= TXX9_SIDISR_UOER;
  612. }
  613. /*
  614. * ignore all characters if CREAD is not set
  615. */
  616. if ((termios->c_cflag & CREAD) == 0)
  617. up->port.ignore_status_mask |= TXX9_SIDISR_RDIS;
  618. /* CTS flow control flag */
  619. if ((termios->c_cflag & CRTSCTS) &&
  620. (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) {
  621. sio_set(up, TXX9_SIFLCR,
  622. TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
  623. } else {
  624. sio_mask(up, TXX9_SIFLCR,
  625. TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
  626. }
  627. sio_out(up, TXX9_SILCR, cval);
  628. sio_quot_set(up, quot);
  629. sio_out(up, TXX9_SIFCR, fcr);
  630. serial_txx9_set_mctrl(&up->port, up->port.mctrl);
  631. spin_unlock_irqrestore(&up->port.lock, flags);
  632. }
  633. static void
  634. serial_txx9_pm(struct uart_port *port, unsigned int state,
  635. unsigned int oldstate)
  636. {
  637. /*
  638. * If oldstate was -1 this is called from
  639. * uart_configure_port(). In this case do not initialize the
  640. * port now, because the port was already initialized (for
  641. * non-console port) or should not be initialized here (for
  642. * console port). If we initialized the port here we lose
  643. * serial console settings.
  644. */
  645. if (state == 0 && oldstate != -1)
  646. serial_txx9_initialize(port);
  647. }
  648. static int serial_txx9_request_resource(struct uart_txx9_port *up)
  649. {
  650. unsigned int size = TXX9_REGION_SIZE;
  651. int ret = 0;
  652. switch (up->port.iotype) {
  653. default:
  654. if (!up->port.mapbase)
  655. break;
  656. if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) {
  657. ret = -EBUSY;
  658. break;
  659. }
  660. if (up->port.flags & UPF_IOREMAP) {
  661. up->port.membase = ioremap(up->port.mapbase, size);
  662. if (!up->port.membase) {
  663. release_mem_region(up->port.mapbase, size);
  664. ret = -ENOMEM;
  665. }
  666. }
  667. break;
  668. case UPIO_PORT:
  669. if (!request_region(up->port.iobase, size, "serial_txx9"))
  670. ret = -EBUSY;
  671. break;
  672. }
  673. return ret;
  674. }
  675. static void serial_txx9_release_resource(struct uart_txx9_port *up)
  676. {
  677. unsigned int size = TXX9_REGION_SIZE;
  678. switch (up->port.iotype) {
  679. default:
  680. if (!up->port.mapbase)
  681. break;
  682. if (up->port.flags & UPF_IOREMAP) {
  683. iounmap(up->port.membase);
  684. up->port.membase = NULL;
  685. }
  686. release_mem_region(up->port.mapbase, size);
  687. break;
  688. case UPIO_PORT:
  689. release_region(up->port.iobase, size);
  690. break;
  691. }
  692. }
  693. static void serial_txx9_release_port(struct uart_port *port)
  694. {
  695. struct uart_txx9_port *up = to_uart_txx9_port(port);
  696. serial_txx9_release_resource(up);
  697. }
  698. static int serial_txx9_request_port(struct uart_port *port)
  699. {
  700. struct uart_txx9_port *up = to_uart_txx9_port(port);
  701. return serial_txx9_request_resource(up);
  702. }
  703. static void serial_txx9_config_port(struct uart_port *port, int uflags)
  704. {
  705. struct uart_txx9_port *up = to_uart_txx9_port(port);
  706. int ret;
  707. /*
  708. * Find the region that we can probe for. This in turn
  709. * tells us whether we can probe for the type of port.
  710. */
  711. ret = serial_txx9_request_resource(up);
  712. if (ret < 0)
  713. return;
  714. port->type = PORT_TXX9;
  715. up->port.fifosize = TXX9_SIO_TX_FIFO;
  716. #ifdef CONFIG_SERIAL_TXX9_CONSOLE
  717. if (up->port.line == up->port.cons->index)
  718. return;
  719. #endif
  720. serial_txx9_initialize(port);
  721. }
  722. static const char *
  723. serial_txx9_type(struct uart_port *port)
  724. {
  725. return "txx9";
  726. }
  727. static const struct uart_ops serial_txx9_pops = {
  728. .tx_empty = serial_txx9_tx_empty,
  729. .set_mctrl = serial_txx9_set_mctrl,
  730. .get_mctrl = serial_txx9_get_mctrl,
  731. .stop_tx = serial_txx9_stop_tx,
  732. .start_tx = serial_txx9_start_tx,
  733. .stop_rx = serial_txx9_stop_rx,
  734. .break_ctl = serial_txx9_break_ctl,
  735. .startup = serial_txx9_startup,
  736. .shutdown = serial_txx9_shutdown,
  737. .set_termios = serial_txx9_set_termios,
  738. .pm = serial_txx9_pm,
  739. .type = serial_txx9_type,
  740. .release_port = serial_txx9_release_port,
  741. .request_port = serial_txx9_request_port,
  742. .config_port = serial_txx9_config_port,
  743. #ifdef CONFIG_CONSOLE_POLL
  744. .poll_get_char = serial_txx9_get_poll_char,
  745. .poll_put_char = serial_txx9_put_poll_char,
  746. #endif
  747. };
  748. static struct uart_txx9_port serial_txx9_ports[UART_NR];
  749. static void __init serial_txx9_register_ports(struct uart_driver *drv,
  750. struct device *dev)
  751. {
  752. int i;
  753. for (i = 0; i < UART_NR; i++) {
  754. struct uart_txx9_port *up = &serial_txx9_ports[i];
  755. up->port.line = i;
  756. up->port.ops = &serial_txx9_pops;
  757. up->port.dev = dev;
  758. if (up->port.iobase || up->port.mapbase)
  759. uart_add_one_port(drv, &up->port);
  760. }
  761. }
  762. #ifdef CONFIG_SERIAL_TXX9_CONSOLE
  763. static void serial_txx9_console_putchar(struct uart_port *port, int ch)
  764. {
  765. struct uart_txx9_port *up = to_uart_txx9_port(port);
  766. wait_for_xmitr(up);
  767. sio_out(up, TXX9_SITFIFO, ch);
  768. }
  769. /*
  770. * Print a string to the serial port trying not to disturb
  771. * any possible real use of the port...
  772. *
  773. * The console_lock must be held when we get here.
  774. */
  775. static void
  776. serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
  777. {
  778. struct uart_txx9_port *up = &serial_txx9_ports[co->index];
  779. unsigned int ier, flcr;
  780. /*
  781. * First save the UER then disable the interrupts
  782. */
  783. ier = sio_in(up, TXX9_SIDICR);
  784. sio_out(up, TXX9_SIDICR, 0);
  785. /*
  786. * Disable flow-control if enabled (and unnecessary)
  787. */
  788. flcr = sio_in(up, TXX9_SIFLCR);
  789. if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
  790. sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
  791. uart_console_write(&up->port, s, count, serial_txx9_console_putchar);
  792. /*
  793. * Finally, wait for transmitter to become empty
  794. * and restore the IER
  795. */
  796. wait_for_xmitr(up);
  797. sio_out(up, TXX9_SIFLCR, flcr);
  798. sio_out(up, TXX9_SIDICR, ier);
  799. }
  800. static int __init serial_txx9_console_setup(struct console *co, char *options)
  801. {
  802. struct uart_port *port;
  803. struct uart_txx9_port *up;
  804. int baud = 9600;
  805. int bits = 8;
  806. int parity = 'n';
  807. int flow = 'n';
  808. /*
  809. * Check whether an invalid uart number has been specified, and
  810. * if so, search for the first available port that does have
  811. * console support.
  812. */
  813. if (co->index >= UART_NR)
  814. co->index = 0;
  815. up = &serial_txx9_ports[co->index];
  816. port = &up->port;
  817. if (!port->ops)
  818. return -ENODEV;
  819. serial_txx9_initialize(&up->port);
  820. if (options)
  821. uart_parse_options(options, &baud, &parity, &bits, &flow);
  822. return uart_set_options(port, co, baud, parity, bits, flow);
  823. }
  824. static struct uart_driver serial_txx9_reg;
  825. static struct console serial_txx9_console = {
  826. .name = TXX9_TTY_NAME,
  827. .write = serial_txx9_console_write,
  828. .device = uart_console_device,
  829. .setup = serial_txx9_console_setup,
  830. .flags = CON_PRINTBUFFER,
  831. .index = -1,
  832. .data = &serial_txx9_reg,
  833. };
  834. static int __init serial_txx9_console_init(void)
  835. {
  836. register_console(&serial_txx9_console);
  837. return 0;
  838. }
  839. console_initcall(serial_txx9_console_init);
  840. #define SERIAL_TXX9_CONSOLE &serial_txx9_console
  841. #else
  842. #define SERIAL_TXX9_CONSOLE NULL
  843. #endif
  844. static struct uart_driver serial_txx9_reg = {
  845. .owner = THIS_MODULE,
  846. .driver_name = "serial_txx9",
  847. .dev_name = TXX9_TTY_NAME,
  848. .major = TXX9_TTY_MAJOR,
  849. .minor = TXX9_TTY_MINOR_START,
  850. .nr = UART_NR,
  851. .cons = SERIAL_TXX9_CONSOLE,
  852. };
  853. int __init early_serial_txx9_setup(struct uart_port *port)
  854. {
  855. if (port->line >= ARRAY_SIZE(serial_txx9_ports))
  856. return -ENODEV;
  857. serial_txx9_ports[port->line].port = *port;
  858. serial_txx9_ports[port->line].port.ops = &serial_txx9_pops;
  859. serial_txx9_ports[port->line].port.flags |=
  860. UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
  861. return 0;
  862. }
  863. static DEFINE_MUTEX(serial_txx9_mutex);
  864. /**
  865. * serial_txx9_register_port - register a serial port
  866. * @port: serial port template
  867. *
  868. * Configure the serial port specified by the request.
  869. *
  870. * The port is then probed and if necessary the IRQ is autodetected
  871. * If this fails an error is returned.
  872. *
  873. * On success the port is ready to use and the line number is returned.
  874. */
  875. static int serial_txx9_register_port(struct uart_port *port)
  876. {
  877. int i;
  878. struct uart_txx9_port *uart;
  879. int ret = -ENOSPC;
  880. mutex_lock(&serial_txx9_mutex);
  881. for (i = 0; i < UART_NR; i++) {
  882. uart = &serial_txx9_ports[i];
  883. if (uart_match_port(&uart->port, port)) {
  884. uart_remove_one_port(&serial_txx9_reg, &uart->port);
  885. break;
  886. }
  887. }
  888. if (i == UART_NR) {
  889. /* Find unused port */
  890. for (i = 0; i < UART_NR; i++) {
  891. uart = &serial_txx9_ports[i];
  892. if (!(uart->port.iobase || uart->port.mapbase))
  893. break;
  894. }
  895. }
  896. if (i < UART_NR) {
  897. uart->port.iobase = port->iobase;
  898. uart->port.membase = port->membase;
  899. uart->port.irq = port->irq;
  900. uart->port.uartclk = port->uartclk;
  901. uart->port.iotype = port->iotype;
  902. uart->port.flags = port->flags
  903. | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
  904. uart->port.mapbase = port->mapbase;
  905. if (port->dev)
  906. uart->port.dev = port->dev;
  907. ret = uart_add_one_port(&serial_txx9_reg, &uart->port);
  908. if (ret == 0)
  909. ret = uart->port.line;
  910. }
  911. mutex_unlock(&serial_txx9_mutex);
  912. return ret;
  913. }
  914. /**
  915. * serial_txx9_unregister_port - remove a txx9 serial port at runtime
  916. * @line: serial line number
  917. *
  918. * Remove one serial port. This may not be called from interrupt
  919. * context. We hand the port back to the our control.
  920. */
  921. static void serial_txx9_unregister_port(int line)
  922. {
  923. struct uart_txx9_port *uart = &serial_txx9_ports[line];
  924. mutex_lock(&serial_txx9_mutex);
  925. uart_remove_one_port(&serial_txx9_reg, &uart->port);
  926. uart->port.flags = 0;
  927. uart->port.type = PORT_UNKNOWN;
  928. uart->port.iobase = 0;
  929. uart->port.mapbase = 0;
  930. uart->port.membase = NULL;
  931. uart->port.dev = NULL;
  932. mutex_unlock(&serial_txx9_mutex);
  933. }
  934. /*
  935. * Register a set of serial devices attached to a platform device.
  936. */
  937. static int serial_txx9_probe(struct platform_device *dev)
  938. {
  939. struct uart_port *p = dev_get_platdata(&dev->dev);
  940. struct uart_port port;
  941. int ret, i;
  942. memset(&port, 0, sizeof(struct uart_port));
  943. for (i = 0; p && p->uartclk != 0; p++, i++) {
  944. port.iobase = p->iobase;
  945. port.membase = p->membase;
  946. port.irq = p->irq;
  947. port.uartclk = p->uartclk;
  948. port.iotype = p->iotype;
  949. port.flags = p->flags;
  950. port.mapbase = p->mapbase;
  951. port.dev = &dev->dev;
  952. ret = serial_txx9_register_port(&port);
  953. if (ret < 0) {
  954. dev_err(&dev->dev, "unable to register port at index %d "
  955. "(IO%lx MEM%llx IRQ%d): %d\n", i,
  956. p->iobase, (unsigned long long)p->mapbase,
  957. p->irq, ret);
  958. }
  959. }
  960. return 0;
  961. }
  962. /*
  963. * Remove serial ports registered against a platform device.
  964. */
  965. static int serial_txx9_remove(struct platform_device *dev)
  966. {
  967. int i;
  968. for (i = 0; i < UART_NR; i++) {
  969. struct uart_txx9_port *up = &serial_txx9_ports[i];
  970. if (up->port.dev == &dev->dev)
  971. serial_txx9_unregister_port(i);
  972. }
  973. return 0;
  974. }
  975. #ifdef CONFIG_PM
  976. static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state)
  977. {
  978. int i;
  979. for (i = 0; i < UART_NR; i++) {
  980. struct uart_txx9_port *up = &serial_txx9_ports[i];
  981. if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
  982. uart_suspend_port(&serial_txx9_reg, &up->port);
  983. }
  984. return 0;
  985. }
  986. static int serial_txx9_resume(struct platform_device *dev)
  987. {
  988. int i;
  989. for (i = 0; i < UART_NR; i++) {
  990. struct uart_txx9_port *up = &serial_txx9_ports[i];
  991. if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
  992. uart_resume_port(&serial_txx9_reg, &up->port);
  993. }
  994. return 0;
  995. }
  996. #endif
  997. static struct platform_driver serial_txx9_plat_driver = {
  998. .probe = serial_txx9_probe,
  999. .remove = serial_txx9_remove,
  1000. #ifdef CONFIG_PM
  1001. .suspend = serial_txx9_suspend,
  1002. .resume = serial_txx9_resume,
  1003. #endif
  1004. .driver = {
  1005. .name = "serial_txx9",
  1006. },
  1007. };
  1008. #ifdef ENABLE_SERIAL_TXX9_PCI
  1009. /*
  1010. * Probe one serial board. Unfortunately, there is no rhyme nor reason
  1011. * to the arrangement of serial ports on a PCI card.
  1012. */
  1013. static int
  1014. pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
  1015. {
  1016. struct uart_port port;
  1017. int line;
  1018. int rc;
  1019. rc = pci_enable_device(dev);
  1020. if (rc)
  1021. return rc;
  1022. memset(&port, 0, sizeof(port));
  1023. port.ops = &serial_txx9_pops;
  1024. port.flags |= UPF_TXX9_HAVE_CTS_LINE;
  1025. port.uartclk = 66670000;
  1026. port.irq = dev->irq;
  1027. port.iotype = UPIO_PORT;
  1028. port.iobase = pci_resource_start(dev, 1);
  1029. port.dev = &dev->dev;
  1030. line = serial_txx9_register_port(&port);
  1031. if (line < 0) {
  1032. printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
  1033. pci_disable_device(dev);
  1034. return line;
  1035. }
  1036. pci_set_drvdata(dev, &serial_txx9_ports[line]);
  1037. return 0;
  1038. }
  1039. static void pciserial_txx9_remove_one(struct pci_dev *dev)
  1040. {
  1041. struct uart_txx9_port *up = pci_get_drvdata(dev);
  1042. if (up) {
  1043. serial_txx9_unregister_port(up->port.line);
  1044. pci_disable_device(dev);
  1045. }
  1046. }
  1047. #ifdef CONFIG_PM
  1048. static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
  1049. {
  1050. struct uart_txx9_port *up = pci_get_drvdata(dev);
  1051. if (up)
  1052. uart_suspend_port(&serial_txx9_reg, &up->port);
  1053. pci_save_state(dev);
  1054. pci_set_power_state(dev, pci_choose_state(dev, state));
  1055. return 0;
  1056. }
  1057. static int pciserial_txx9_resume_one(struct pci_dev *dev)
  1058. {
  1059. struct uart_txx9_port *up = pci_get_drvdata(dev);
  1060. pci_set_power_state(dev, PCI_D0);
  1061. pci_restore_state(dev);
  1062. if (up)
  1063. uart_resume_port(&serial_txx9_reg, &up->port);
  1064. return 0;
  1065. }
  1066. #endif
  1067. static const struct pci_device_id serial_txx9_pci_tbl[] = {
  1068. { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) },
  1069. { 0, }
  1070. };
  1071. static struct pci_driver serial_txx9_pci_driver = {
  1072. .name = "serial_txx9",
  1073. .probe = pciserial_txx9_init_one,
  1074. .remove = pciserial_txx9_remove_one,
  1075. #ifdef CONFIG_PM
  1076. .suspend = pciserial_txx9_suspend_one,
  1077. .resume = pciserial_txx9_resume_one,
  1078. #endif
  1079. .id_table = serial_txx9_pci_tbl,
  1080. };
  1081. MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
  1082. #endif /* ENABLE_SERIAL_TXX9_PCI */
  1083. static struct platform_device *serial_txx9_plat_devs;
  1084. static int __init serial_txx9_init(void)
  1085. {
  1086. int ret;
  1087. printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
  1088. ret = uart_register_driver(&serial_txx9_reg);
  1089. if (ret)
  1090. goto out;
  1091. serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1);
  1092. if (!serial_txx9_plat_devs) {
  1093. ret = -ENOMEM;
  1094. goto unreg_uart_drv;
  1095. }
  1096. ret = platform_device_add(serial_txx9_plat_devs);
  1097. if (ret)
  1098. goto put_dev;
  1099. serial_txx9_register_ports(&serial_txx9_reg,
  1100. &serial_txx9_plat_devs->dev);
  1101. ret = platform_driver_register(&serial_txx9_plat_driver);
  1102. if (ret)
  1103. goto del_dev;
  1104. #ifdef ENABLE_SERIAL_TXX9_PCI
  1105. ret = pci_register_driver(&serial_txx9_pci_driver);
  1106. if (ret) {
  1107. platform_driver_unregister(&serial_txx9_plat_driver);
  1108. }
  1109. #endif
  1110. if (ret == 0)
  1111. goto out;
  1112. del_dev:
  1113. platform_device_del(serial_txx9_plat_devs);
  1114. put_dev:
  1115. platform_device_put(serial_txx9_plat_devs);
  1116. unreg_uart_drv:
  1117. uart_unregister_driver(&serial_txx9_reg);
  1118. out:
  1119. return ret;
  1120. }
  1121. static void __exit serial_txx9_exit(void)
  1122. {
  1123. int i;
  1124. #ifdef ENABLE_SERIAL_TXX9_PCI
  1125. pci_unregister_driver(&serial_txx9_pci_driver);
  1126. #endif
  1127. platform_driver_unregister(&serial_txx9_plat_driver);
  1128. platform_device_unregister(serial_txx9_plat_devs);
  1129. for (i = 0; i < UART_NR; i++) {
  1130. struct uart_txx9_port *up = &serial_txx9_ports[i];
  1131. if (up->port.iobase || up->port.mapbase)
  1132. uart_remove_one_port(&serial_txx9_reg, &up->port);
  1133. }
  1134. uart_unregister_driver(&serial_txx9_reg);
  1135. }
  1136. module_init(serial_txx9_init);
  1137. module_exit(serial_txx9_exit);
  1138. MODULE_LICENSE("GPL");
  1139. MODULE_DESCRIPTION("TX39/49 serial driver");
  1140. MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);