max3421-hcd.c 52 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * MAX3421 Host Controller driver for USB.
  4. *
  5. * Author: David Mosberger-Tang <davidm@egauge.net>
  6. *
  7. * (C) Copyright 2014 David Mosberger-Tang <davidm@egauge.net>
  8. *
  9. * MAX3421 is a chip implementing a USB 2.0 Full-/Low-Speed host
  10. * controller on a SPI bus.
  11. *
  12. * Based on:
  13. * o MAX3421E datasheet
  14. * http://datasheets.maximintegrated.com/en/ds/MAX3421E.pdf
  15. * o MAX3421E Programming Guide
  16. * http://www.hdl.co.jp/ftpdata/utl-001/AN3785.pdf
  17. * o gadget/dummy_hcd.c
  18. * For USB HCD implementation.
  19. * o Arduino MAX3421 driver
  20. * https://github.com/felis/USB_Host_Shield_2.0/blob/master/Usb.cpp
  21. *
  22. * This file is licenced under the GPL v2.
  23. *
  24. * Important note on worst-case (full-speed) packet size constraints
  25. * (See USB 2.0 Section 5.6.3 and following):
  26. *
  27. * - control: 64 bytes
  28. * - isochronous: 1023 bytes
  29. * - interrupt: 64 bytes
  30. * - bulk: 64 bytes
  31. *
  32. * Since the MAX3421 FIFO size is 64 bytes, we do not have to work about
  33. * multi-FIFO writes/reads for a single USB packet *except* for isochronous
  34. * transfers. We don't support isochronous transfers at this time, so we
  35. * just assume that a USB packet always fits into a single FIFO buffer.
  36. *
  37. * NOTE: The June 2006 version of "MAX3421E Programming Guide"
  38. * (AN3785) has conflicting info for the RCVDAVIRQ bit:
  39. *
  40. * The description of RCVDAVIRQ says "The CPU *must* clear
  41. * this IRQ bit (by writing a 1 to it) before reading the
  42. * RCVFIFO data.
  43. *
  44. * However, the earlier section on "Programming BULK-IN
  45. * Transfers" says * that:
  46. *
  47. * After the CPU retrieves the data, it clears the
  48. * RCVDAVIRQ bit.
  49. *
  50. * The December 2006 version has been corrected and it consistently
  51. * states the second behavior is the correct one.
  52. *
  53. * Synchronous SPI transactions sleep so we can't perform any such
  54. * transactions while holding a spin-lock (and/or while interrupts are
  55. * masked). To achieve this, all SPI transactions are issued from a
  56. * single thread (max3421_spi_thread).
  57. */
  58. #include <linux/jiffies.h>
  59. #include <linux/module.h>
  60. #include <linux/spi/spi.h>
  61. #include <linux/usb.h>
  62. #include <linux/usb/hcd.h>
  63. #include <linux/of.h>
  64. #include <linux/platform_data/max3421-hcd.h>
  65. #define DRIVER_DESC "MAX3421 USB Host-Controller Driver"
  66. #define DRIVER_VERSION "1.0"
  67. /* 11-bit counter that wraps around (USB 2.0 Section 8.3.3): */
  68. #define USB_MAX_FRAME_NUMBER 0x7ff
  69. #define USB_MAX_RETRIES 3 /* # of retries before error is reported */
  70. /*
  71. * Max. # of times we're willing to retransmit a request immediately in
  72. * resposne to a NAK. Afterwards, we fall back on trying once a frame.
  73. */
  74. #define NAK_MAX_FAST_RETRANSMITS 2
  75. #define POWER_BUDGET 500 /* in mA; use 8 for low-power port testing */
  76. /* Port-change mask: */
  77. #define PORT_C_MASK ((USB_PORT_STAT_C_CONNECTION | \
  78. USB_PORT_STAT_C_ENABLE | \
  79. USB_PORT_STAT_C_SUSPEND | \
  80. USB_PORT_STAT_C_OVERCURRENT | \
  81. USB_PORT_STAT_C_RESET) << 16)
  82. #define MAX3421_GPOUT_COUNT 8
  83. enum max3421_rh_state {
  84. MAX3421_RH_RESET,
  85. MAX3421_RH_SUSPENDED,
  86. MAX3421_RH_RUNNING
  87. };
  88. enum pkt_state {
  89. PKT_STATE_SETUP, /* waiting to send setup packet to ctrl pipe */
  90. PKT_STATE_TRANSFER, /* waiting to xfer transfer_buffer */
  91. PKT_STATE_TERMINATE /* waiting to terminate control transfer */
  92. };
  93. enum scheduling_pass {
  94. SCHED_PASS_PERIODIC,
  95. SCHED_PASS_NON_PERIODIC,
  96. SCHED_PASS_DONE
  97. };
  98. /* Bit numbers for max3421_hcd->todo: */
  99. enum {
  100. ENABLE_IRQ = 0,
  101. RESET_HCD,
  102. RESET_PORT,
  103. CHECK_UNLINK,
  104. IOPIN_UPDATE
  105. };
  106. struct max3421_dma_buf {
  107. u8 data[2];
  108. };
  109. struct max3421_hcd {
  110. spinlock_t lock;
  111. struct task_struct *spi_thread;
  112. struct max3421_hcd *next;
  113. enum max3421_rh_state rh_state;
  114. /* lower 16 bits contain port status, upper 16 bits the change mask: */
  115. u32 port_status;
  116. unsigned active:1;
  117. struct list_head ep_list; /* list of EP's with work */
  118. /*
  119. * The following are owned by spi_thread (may be accessed by
  120. * SPI-thread without acquiring the HCD lock:
  121. */
  122. u8 rev; /* chip revision */
  123. u16 frame_number;
  124. /*
  125. * kmalloc'd buffers guaranteed to be in separate (DMA)
  126. * cache-lines:
  127. */
  128. struct max3421_dma_buf *tx;
  129. struct max3421_dma_buf *rx;
  130. /*
  131. * URB we're currently processing. Must not be reset to NULL
  132. * unless MAX3421E chip is idle:
  133. */
  134. struct urb *curr_urb;
  135. enum scheduling_pass sched_pass;
  136. struct usb_device *loaded_dev; /* dev that's loaded into the chip */
  137. int loaded_epnum; /* epnum whose toggles are loaded */
  138. int urb_done; /* > 0 -> no errors, < 0: errno */
  139. size_t curr_len;
  140. u8 hien;
  141. u8 mode;
  142. u8 iopins[2];
  143. unsigned long todo;
  144. #ifdef DEBUG
  145. unsigned long err_stat[16];
  146. #endif
  147. };
  148. struct max3421_ep {
  149. struct usb_host_endpoint *ep;
  150. struct list_head ep_list;
  151. u32 naks;
  152. u16 last_active; /* frame # this ep was last active */
  153. enum pkt_state pkt_state;
  154. u8 retries;
  155. u8 retransmit; /* packet needs retransmission */
  156. };
  157. static struct max3421_hcd *max3421_hcd_list;
  158. #define MAX3421_FIFO_SIZE 64
  159. #define MAX3421_SPI_DIR_RD 0 /* read register from MAX3421 */
  160. #define MAX3421_SPI_DIR_WR 1 /* write register to MAX3421 */
  161. /* SPI commands: */
  162. #define MAX3421_SPI_DIR_SHIFT 1
  163. #define MAX3421_SPI_REG_SHIFT 3
  164. #define MAX3421_REG_RCVFIFO 1
  165. #define MAX3421_REG_SNDFIFO 2
  166. #define MAX3421_REG_SUDFIFO 4
  167. #define MAX3421_REG_RCVBC 6
  168. #define MAX3421_REG_SNDBC 7
  169. #define MAX3421_REG_USBIRQ 13
  170. #define MAX3421_REG_USBIEN 14
  171. #define MAX3421_REG_USBCTL 15
  172. #define MAX3421_REG_CPUCTL 16
  173. #define MAX3421_REG_PINCTL 17
  174. #define MAX3421_REG_REVISION 18
  175. #define MAX3421_REG_IOPINS1 20
  176. #define MAX3421_REG_IOPINS2 21
  177. #define MAX3421_REG_GPINIRQ 22
  178. #define MAX3421_REG_GPINIEN 23
  179. #define MAX3421_REG_GPINPOL 24
  180. #define MAX3421_REG_HIRQ 25
  181. #define MAX3421_REG_HIEN 26
  182. #define MAX3421_REG_MODE 27
  183. #define MAX3421_REG_PERADDR 28
  184. #define MAX3421_REG_HCTL 29
  185. #define MAX3421_REG_HXFR 30
  186. #define MAX3421_REG_HRSL 31
  187. enum {
  188. MAX3421_USBIRQ_OSCOKIRQ_BIT = 0,
  189. MAX3421_USBIRQ_NOVBUSIRQ_BIT = 5,
  190. MAX3421_USBIRQ_VBUSIRQ_BIT
  191. };
  192. enum {
  193. MAX3421_CPUCTL_IE_BIT = 0,
  194. MAX3421_CPUCTL_PULSEWID0_BIT = 6,
  195. MAX3421_CPUCTL_PULSEWID1_BIT
  196. };
  197. enum {
  198. MAX3421_USBCTL_PWRDOWN_BIT = 4,
  199. MAX3421_USBCTL_CHIPRES_BIT
  200. };
  201. enum {
  202. MAX3421_PINCTL_GPXA_BIT = 0,
  203. MAX3421_PINCTL_GPXB_BIT,
  204. MAX3421_PINCTL_POSINT_BIT,
  205. MAX3421_PINCTL_INTLEVEL_BIT,
  206. MAX3421_PINCTL_FDUPSPI_BIT,
  207. MAX3421_PINCTL_EP0INAK_BIT,
  208. MAX3421_PINCTL_EP2INAK_BIT,
  209. MAX3421_PINCTL_EP3INAK_BIT,
  210. };
  211. enum {
  212. MAX3421_HI_BUSEVENT_BIT = 0, /* bus-reset/-resume */
  213. MAX3421_HI_RWU_BIT, /* remote wakeup */
  214. MAX3421_HI_RCVDAV_BIT, /* receive FIFO data available */
  215. MAX3421_HI_SNDBAV_BIT, /* send buffer available */
  216. MAX3421_HI_SUSDN_BIT, /* suspend operation done */
  217. MAX3421_HI_CONDET_BIT, /* peripheral connect/disconnect */
  218. MAX3421_HI_FRAME_BIT, /* frame generator */
  219. MAX3421_HI_HXFRDN_BIT, /* host transfer done */
  220. };
  221. enum {
  222. MAX3421_HCTL_BUSRST_BIT = 0,
  223. MAX3421_HCTL_FRMRST_BIT,
  224. MAX3421_HCTL_SAMPLEBUS_BIT,
  225. MAX3421_HCTL_SIGRSM_BIT,
  226. MAX3421_HCTL_RCVTOG0_BIT,
  227. MAX3421_HCTL_RCVTOG1_BIT,
  228. MAX3421_HCTL_SNDTOG0_BIT,
  229. MAX3421_HCTL_SNDTOG1_BIT
  230. };
  231. enum {
  232. MAX3421_MODE_HOST_BIT = 0,
  233. MAX3421_MODE_LOWSPEED_BIT,
  234. MAX3421_MODE_HUBPRE_BIT,
  235. MAX3421_MODE_SOFKAENAB_BIT,
  236. MAX3421_MODE_SEPIRQ_BIT,
  237. MAX3421_MODE_DELAYISO_BIT,
  238. MAX3421_MODE_DMPULLDN_BIT,
  239. MAX3421_MODE_DPPULLDN_BIT
  240. };
  241. enum {
  242. MAX3421_HRSL_OK = 0,
  243. MAX3421_HRSL_BUSY,
  244. MAX3421_HRSL_BADREQ,
  245. MAX3421_HRSL_UNDEF,
  246. MAX3421_HRSL_NAK,
  247. MAX3421_HRSL_STALL,
  248. MAX3421_HRSL_TOGERR,
  249. MAX3421_HRSL_WRONGPID,
  250. MAX3421_HRSL_BADBC,
  251. MAX3421_HRSL_PIDERR,
  252. MAX3421_HRSL_PKTERR,
  253. MAX3421_HRSL_CRCERR,
  254. MAX3421_HRSL_KERR,
  255. MAX3421_HRSL_JERR,
  256. MAX3421_HRSL_TIMEOUT,
  257. MAX3421_HRSL_BABBLE,
  258. MAX3421_HRSL_RESULT_MASK = 0xf,
  259. MAX3421_HRSL_RCVTOGRD_BIT = 4,
  260. MAX3421_HRSL_SNDTOGRD_BIT,
  261. MAX3421_HRSL_KSTATUS_BIT,
  262. MAX3421_HRSL_JSTATUS_BIT
  263. };
  264. /* Return same error-codes as ohci.h:cc_to_error: */
  265. static const int hrsl_to_error[] = {
  266. [MAX3421_HRSL_OK] = 0,
  267. [MAX3421_HRSL_BUSY] = -EINVAL,
  268. [MAX3421_HRSL_BADREQ] = -EINVAL,
  269. [MAX3421_HRSL_UNDEF] = -EINVAL,
  270. [MAX3421_HRSL_NAK] = -EAGAIN,
  271. [MAX3421_HRSL_STALL] = -EPIPE,
  272. [MAX3421_HRSL_TOGERR] = -EILSEQ,
  273. [MAX3421_HRSL_WRONGPID] = -EPROTO,
  274. [MAX3421_HRSL_BADBC] = -EREMOTEIO,
  275. [MAX3421_HRSL_PIDERR] = -EPROTO,
  276. [MAX3421_HRSL_PKTERR] = -EPROTO,
  277. [MAX3421_HRSL_CRCERR] = -EILSEQ,
  278. [MAX3421_HRSL_KERR] = -EIO,
  279. [MAX3421_HRSL_JERR] = -EIO,
  280. [MAX3421_HRSL_TIMEOUT] = -ETIME,
  281. [MAX3421_HRSL_BABBLE] = -EOVERFLOW
  282. };
  283. /*
  284. * See http://www.beyondlogic.org/usbnutshell/usb4.shtml#Control for a
  285. * reasonable overview of how control transfers use the the IN/OUT
  286. * tokens.
  287. */
  288. #define MAX3421_HXFR_BULK_IN(ep) (0x00 | (ep)) /* bulk or interrupt */
  289. #define MAX3421_HXFR_SETUP 0x10
  290. #define MAX3421_HXFR_BULK_OUT(ep) (0x20 | (ep)) /* bulk or interrupt */
  291. #define MAX3421_HXFR_ISO_IN(ep) (0x40 | (ep))
  292. #define MAX3421_HXFR_ISO_OUT(ep) (0x60 | (ep))
  293. #define MAX3421_HXFR_HS_IN 0x80 /* handshake in */
  294. #define MAX3421_HXFR_HS_OUT 0xa0 /* handshake out */
  295. #define field(val, bit) ((val) << (bit))
  296. static inline s16
  297. frame_diff(u16 left, u16 right)
  298. {
  299. return ((unsigned) (left - right)) % (USB_MAX_FRAME_NUMBER + 1);
  300. }
  301. static inline struct max3421_hcd *
  302. hcd_to_max3421(struct usb_hcd *hcd)
  303. {
  304. return (struct max3421_hcd *) hcd->hcd_priv;
  305. }
  306. static inline struct usb_hcd *
  307. max3421_to_hcd(struct max3421_hcd *max3421_hcd)
  308. {
  309. return container_of((void *) max3421_hcd, struct usb_hcd, hcd_priv);
  310. }
  311. static u8
  312. spi_rd8(struct usb_hcd *hcd, unsigned int reg)
  313. {
  314. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  315. struct spi_device *spi = to_spi_device(hcd->self.controller);
  316. struct spi_transfer transfer;
  317. struct spi_message msg;
  318. memset(&transfer, 0, sizeof(transfer));
  319. spi_message_init(&msg);
  320. max3421_hcd->tx->data[0] =
  321. (field(reg, MAX3421_SPI_REG_SHIFT) |
  322. field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
  323. transfer.tx_buf = max3421_hcd->tx->data;
  324. transfer.rx_buf = max3421_hcd->rx->data;
  325. transfer.len = 2;
  326. spi_message_add_tail(&transfer, &msg);
  327. spi_sync(spi, &msg);
  328. return max3421_hcd->rx->data[1];
  329. }
  330. static void
  331. spi_wr8(struct usb_hcd *hcd, unsigned int reg, u8 val)
  332. {
  333. struct spi_device *spi = to_spi_device(hcd->self.controller);
  334. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  335. struct spi_transfer transfer;
  336. struct spi_message msg;
  337. memset(&transfer, 0, sizeof(transfer));
  338. spi_message_init(&msg);
  339. max3421_hcd->tx->data[0] =
  340. (field(reg, MAX3421_SPI_REG_SHIFT) |
  341. field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
  342. max3421_hcd->tx->data[1] = val;
  343. transfer.tx_buf = max3421_hcd->tx->data;
  344. transfer.len = 2;
  345. spi_message_add_tail(&transfer, &msg);
  346. spi_sync(spi, &msg);
  347. }
  348. static void
  349. spi_rd_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
  350. {
  351. struct spi_device *spi = to_spi_device(hcd->self.controller);
  352. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  353. struct spi_transfer transfer[2];
  354. struct spi_message msg;
  355. memset(transfer, 0, sizeof(transfer));
  356. spi_message_init(&msg);
  357. max3421_hcd->tx->data[0] =
  358. (field(reg, MAX3421_SPI_REG_SHIFT) |
  359. field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
  360. transfer[0].tx_buf = max3421_hcd->tx->data;
  361. transfer[0].len = 1;
  362. transfer[1].rx_buf = buf;
  363. transfer[1].len = len;
  364. spi_message_add_tail(&transfer[0], &msg);
  365. spi_message_add_tail(&transfer[1], &msg);
  366. spi_sync(spi, &msg);
  367. }
  368. static void
  369. spi_wr_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
  370. {
  371. struct spi_device *spi = to_spi_device(hcd->self.controller);
  372. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  373. struct spi_transfer transfer[2];
  374. struct spi_message msg;
  375. memset(transfer, 0, sizeof(transfer));
  376. spi_message_init(&msg);
  377. max3421_hcd->tx->data[0] =
  378. (field(reg, MAX3421_SPI_REG_SHIFT) |
  379. field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
  380. transfer[0].tx_buf = max3421_hcd->tx->data;
  381. transfer[0].len = 1;
  382. transfer[1].tx_buf = buf;
  383. transfer[1].len = len;
  384. spi_message_add_tail(&transfer[0], &msg);
  385. spi_message_add_tail(&transfer[1], &msg);
  386. spi_sync(spi, &msg);
  387. }
  388. /*
  389. * Figure out the correct setting for the LOWSPEED and HUBPRE mode
  390. * bits. The HUBPRE bit needs to be set when MAX3421E operates at
  391. * full speed, but it's talking to a low-speed device (i.e., through a
  392. * hub). Setting that bit ensures that every low-speed packet is
  393. * preceded by a full-speed PRE PID. Possible configurations:
  394. *
  395. * Hub speed: Device speed: => LOWSPEED bit: HUBPRE bit:
  396. * FULL FULL => 0 0
  397. * FULL LOW => 1 1
  398. * LOW LOW => 1 0
  399. * LOW FULL => 1 0
  400. */
  401. static void
  402. max3421_set_speed(struct usb_hcd *hcd, struct usb_device *dev)
  403. {
  404. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  405. u8 mode_lowspeed, mode_hubpre, mode = max3421_hcd->mode;
  406. mode_lowspeed = BIT(MAX3421_MODE_LOWSPEED_BIT);
  407. mode_hubpre = BIT(MAX3421_MODE_HUBPRE_BIT);
  408. if (max3421_hcd->port_status & USB_PORT_STAT_LOW_SPEED) {
  409. mode |= mode_lowspeed;
  410. mode &= ~mode_hubpre;
  411. } else if (dev->speed == USB_SPEED_LOW) {
  412. mode |= mode_lowspeed | mode_hubpre;
  413. } else {
  414. mode &= ~(mode_lowspeed | mode_hubpre);
  415. }
  416. if (mode != max3421_hcd->mode) {
  417. max3421_hcd->mode = mode;
  418. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  419. }
  420. }
  421. /*
  422. * Caller must NOT hold HCD spinlock.
  423. */
  424. static void
  425. max3421_set_address(struct usb_hcd *hcd, struct usb_device *dev, int epnum,
  426. int force_toggles)
  427. {
  428. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  429. int old_epnum, same_ep, rcvtog, sndtog;
  430. struct usb_device *old_dev;
  431. u8 hctl;
  432. old_dev = max3421_hcd->loaded_dev;
  433. old_epnum = max3421_hcd->loaded_epnum;
  434. same_ep = (dev == old_dev && epnum == old_epnum);
  435. if (same_ep && !force_toggles)
  436. return;
  437. if (old_dev && !same_ep) {
  438. /* save the old end-points toggles: */
  439. u8 hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  440. rcvtog = (hrsl >> MAX3421_HRSL_RCVTOGRD_BIT) & 1;
  441. sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
  442. /* no locking: HCD (i.e., we) own toggles, don't we? */
  443. usb_settoggle(old_dev, old_epnum, 0, rcvtog);
  444. usb_settoggle(old_dev, old_epnum, 1, sndtog);
  445. }
  446. /* setup new endpoint's toggle bits: */
  447. rcvtog = usb_gettoggle(dev, epnum, 0);
  448. sndtog = usb_gettoggle(dev, epnum, 1);
  449. hctl = (BIT(rcvtog + MAX3421_HCTL_RCVTOG0_BIT) |
  450. BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
  451. max3421_hcd->loaded_epnum = epnum;
  452. spi_wr8(hcd, MAX3421_REG_HCTL, hctl);
  453. /*
  454. * Note: devnum for one and the same device can change during
  455. * address-assignment so it's best to just always load the
  456. * address whenever the end-point changed/was forced.
  457. */
  458. max3421_hcd->loaded_dev = dev;
  459. spi_wr8(hcd, MAX3421_REG_PERADDR, dev->devnum);
  460. }
  461. static int
  462. max3421_ctrl_setup(struct usb_hcd *hcd, struct urb *urb)
  463. {
  464. spi_wr_buf(hcd, MAX3421_REG_SUDFIFO, urb->setup_packet, 8);
  465. return MAX3421_HXFR_SETUP;
  466. }
  467. static int
  468. max3421_transfer_in(struct usb_hcd *hcd, struct urb *urb)
  469. {
  470. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  471. int epnum = usb_pipeendpoint(urb->pipe);
  472. max3421_hcd->curr_len = 0;
  473. max3421_hcd->hien |= BIT(MAX3421_HI_RCVDAV_BIT);
  474. return MAX3421_HXFR_BULK_IN(epnum);
  475. }
  476. static int
  477. max3421_transfer_out(struct usb_hcd *hcd, struct urb *urb, int fast_retransmit)
  478. {
  479. struct spi_device *spi = to_spi_device(hcd->self.controller);
  480. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  481. int epnum = usb_pipeendpoint(urb->pipe);
  482. u32 max_packet;
  483. void *src;
  484. src = urb->transfer_buffer + urb->actual_length;
  485. if (fast_retransmit) {
  486. if (max3421_hcd->rev == 0x12) {
  487. /* work around rev 0x12 bug: */
  488. spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
  489. spi_wr8(hcd, MAX3421_REG_SNDFIFO, ((u8 *) src)[0]);
  490. spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
  491. }
  492. return MAX3421_HXFR_BULK_OUT(epnum);
  493. }
  494. max_packet = usb_maxpacket(urb->dev, urb->pipe, 1);
  495. if (max_packet > MAX3421_FIFO_SIZE) {
  496. /*
  497. * We do not support isochronous transfers at this
  498. * time.
  499. */
  500. dev_err(&spi->dev,
  501. "%s: packet-size of %u too big (limit is %u bytes)",
  502. __func__, max_packet, MAX3421_FIFO_SIZE);
  503. max3421_hcd->urb_done = -EMSGSIZE;
  504. return -EMSGSIZE;
  505. }
  506. max3421_hcd->curr_len = min((urb->transfer_buffer_length -
  507. urb->actual_length), max_packet);
  508. spi_wr_buf(hcd, MAX3421_REG_SNDFIFO, src, max3421_hcd->curr_len);
  509. spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
  510. return MAX3421_HXFR_BULK_OUT(epnum);
  511. }
  512. /*
  513. * Issue the next host-transfer command.
  514. * Caller must NOT hold HCD spinlock.
  515. */
  516. static void
  517. max3421_next_transfer(struct usb_hcd *hcd, int fast_retransmit)
  518. {
  519. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  520. struct urb *urb = max3421_hcd->curr_urb;
  521. struct max3421_ep *max3421_ep;
  522. int cmd = -EINVAL;
  523. if (!urb)
  524. return; /* nothing to do */
  525. max3421_ep = urb->ep->hcpriv;
  526. switch (max3421_ep->pkt_state) {
  527. case PKT_STATE_SETUP:
  528. cmd = max3421_ctrl_setup(hcd, urb);
  529. break;
  530. case PKT_STATE_TRANSFER:
  531. if (usb_urb_dir_in(urb))
  532. cmd = max3421_transfer_in(hcd, urb);
  533. else
  534. cmd = max3421_transfer_out(hcd, urb, fast_retransmit);
  535. break;
  536. case PKT_STATE_TERMINATE:
  537. /*
  538. * IN transfers are terminated with HS_OUT token,
  539. * OUT transfers with HS_IN:
  540. */
  541. if (usb_urb_dir_in(urb))
  542. cmd = MAX3421_HXFR_HS_OUT;
  543. else
  544. cmd = MAX3421_HXFR_HS_IN;
  545. break;
  546. }
  547. if (cmd < 0)
  548. return;
  549. /* issue the command and wait for host-xfer-done interrupt: */
  550. spi_wr8(hcd, MAX3421_REG_HXFR, cmd);
  551. max3421_hcd->hien |= BIT(MAX3421_HI_HXFRDN_BIT);
  552. }
  553. /*
  554. * Find the next URB to process and start its execution.
  555. *
  556. * At this time, we do not anticipate ever connecting a USB hub to the
  557. * MAX3421 chip, so at most USB device can be connected and we can use
  558. * a simplistic scheduler: at the start of a frame, schedule all
  559. * periodic transfers. Once that is done, use the remainder of the
  560. * frame to process non-periodic (bulk & control) transfers.
  561. *
  562. * Preconditions:
  563. * o Caller must NOT hold HCD spinlock.
  564. * o max3421_hcd->curr_urb MUST BE NULL.
  565. * o MAX3421E chip must be idle.
  566. */
  567. static int
  568. max3421_select_and_start_urb(struct usb_hcd *hcd)
  569. {
  570. struct spi_device *spi = to_spi_device(hcd->self.controller);
  571. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  572. struct urb *urb, *curr_urb = NULL;
  573. struct max3421_ep *max3421_ep;
  574. int epnum, force_toggles = 0;
  575. struct usb_host_endpoint *ep;
  576. struct list_head *pos;
  577. unsigned long flags;
  578. spin_lock_irqsave(&max3421_hcd->lock, flags);
  579. for (;
  580. max3421_hcd->sched_pass < SCHED_PASS_DONE;
  581. ++max3421_hcd->sched_pass)
  582. list_for_each(pos, &max3421_hcd->ep_list) {
  583. urb = NULL;
  584. max3421_ep = container_of(pos, struct max3421_ep,
  585. ep_list);
  586. ep = max3421_ep->ep;
  587. switch (usb_endpoint_type(&ep->desc)) {
  588. case USB_ENDPOINT_XFER_ISOC:
  589. case USB_ENDPOINT_XFER_INT:
  590. if (max3421_hcd->sched_pass !=
  591. SCHED_PASS_PERIODIC)
  592. continue;
  593. break;
  594. case USB_ENDPOINT_XFER_CONTROL:
  595. case USB_ENDPOINT_XFER_BULK:
  596. if (max3421_hcd->sched_pass !=
  597. SCHED_PASS_NON_PERIODIC)
  598. continue;
  599. break;
  600. }
  601. if (list_empty(&ep->urb_list))
  602. continue; /* nothing to do */
  603. urb = list_first_entry(&ep->urb_list, struct urb,
  604. urb_list);
  605. if (urb->unlinked) {
  606. dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
  607. __func__, urb, urb->unlinked);
  608. max3421_hcd->curr_urb = urb;
  609. max3421_hcd->urb_done = 1;
  610. spin_unlock_irqrestore(&max3421_hcd->lock,
  611. flags);
  612. return 1;
  613. }
  614. switch (usb_endpoint_type(&ep->desc)) {
  615. case USB_ENDPOINT_XFER_CONTROL:
  616. /*
  617. * Allow one control transaction per
  618. * frame per endpoint:
  619. */
  620. if (frame_diff(max3421_ep->last_active,
  621. max3421_hcd->frame_number) == 0)
  622. continue;
  623. break;
  624. case USB_ENDPOINT_XFER_BULK:
  625. if (max3421_ep->retransmit
  626. && (frame_diff(max3421_ep->last_active,
  627. max3421_hcd->frame_number)
  628. == 0))
  629. /*
  630. * We already tried this EP
  631. * during this frame and got a
  632. * NAK or error; wait for next frame
  633. */
  634. continue;
  635. break;
  636. case USB_ENDPOINT_XFER_ISOC:
  637. case USB_ENDPOINT_XFER_INT:
  638. if (frame_diff(max3421_hcd->frame_number,
  639. max3421_ep->last_active)
  640. < urb->interval)
  641. /*
  642. * We already processed this
  643. * end-point in the current
  644. * frame
  645. */
  646. continue;
  647. break;
  648. }
  649. /* move current ep to tail: */
  650. list_move_tail(pos, &max3421_hcd->ep_list);
  651. curr_urb = urb;
  652. goto done;
  653. }
  654. done:
  655. if (!curr_urb) {
  656. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  657. return 0;
  658. }
  659. urb = max3421_hcd->curr_urb = curr_urb;
  660. epnum = usb_endpoint_num(&urb->ep->desc);
  661. if (max3421_ep->retransmit)
  662. /* restart (part of) a USB transaction: */
  663. max3421_ep->retransmit = 0;
  664. else {
  665. /* start USB transaction: */
  666. if (usb_endpoint_xfer_control(&ep->desc)) {
  667. /*
  668. * See USB 2.0 spec section 8.6.1
  669. * Initialization via SETUP Token:
  670. */
  671. usb_settoggle(urb->dev, epnum, 0, 1);
  672. usb_settoggle(urb->dev, epnum, 1, 1);
  673. max3421_ep->pkt_state = PKT_STATE_SETUP;
  674. force_toggles = 1;
  675. } else
  676. max3421_ep->pkt_state = PKT_STATE_TRANSFER;
  677. }
  678. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  679. max3421_ep->last_active = max3421_hcd->frame_number;
  680. max3421_set_address(hcd, urb->dev, epnum, force_toggles);
  681. max3421_set_speed(hcd, urb->dev);
  682. max3421_next_transfer(hcd, 0);
  683. return 1;
  684. }
  685. /*
  686. * Check all endpoints for URBs that got unlinked.
  687. *
  688. * Caller must NOT hold HCD spinlock.
  689. */
  690. static int
  691. max3421_check_unlink(struct usb_hcd *hcd)
  692. {
  693. struct spi_device *spi = to_spi_device(hcd->self.controller);
  694. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  695. struct max3421_ep *max3421_ep;
  696. struct usb_host_endpoint *ep;
  697. struct urb *urb, *next;
  698. unsigned long flags;
  699. int retval = 0;
  700. spin_lock_irqsave(&max3421_hcd->lock, flags);
  701. list_for_each_entry(max3421_ep, &max3421_hcd->ep_list, ep_list) {
  702. ep = max3421_ep->ep;
  703. list_for_each_entry_safe(urb, next, &ep->urb_list, urb_list) {
  704. if (urb->unlinked) {
  705. retval = 1;
  706. dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
  707. __func__, urb, urb->unlinked);
  708. usb_hcd_unlink_urb_from_ep(hcd, urb);
  709. spin_unlock_irqrestore(&max3421_hcd->lock,
  710. flags);
  711. usb_hcd_giveback_urb(hcd, urb, 0);
  712. spin_lock_irqsave(&max3421_hcd->lock, flags);
  713. }
  714. }
  715. }
  716. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  717. return retval;
  718. }
  719. /*
  720. * Caller must NOT hold HCD spinlock.
  721. */
  722. static void
  723. max3421_slow_retransmit(struct usb_hcd *hcd)
  724. {
  725. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  726. struct urb *urb = max3421_hcd->curr_urb;
  727. struct max3421_ep *max3421_ep;
  728. max3421_ep = urb->ep->hcpriv;
  729. max3421_ep->retransmit = 1;
  730. max3421_hcd->curr_urb = NULL;
  731. }
  732. /*
  733. * Caller must NOT hold HCD spinlock.
  734. */
  735. static void
  736. max3421_recv_data_available(struct usb_hcd *hcd)
  737. {
  738. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  739. struct urb *urb = max3421_hcd->curr_urb;
  740. size_t remaining, transfer_size;
  741. u8 rcvbc;
  742. rcvbc = spi_rd8(hcd, MAX3421_REG_RCVBC);
  743. if (rcvbc > MAX3421_FIFO_SIZE)
  744. rcvbc = MAX3421_FIFO_SIZE;
  745. if (urb->actual_length >= urb->transfer_buffer_length)
  746. remaining = 0;
  747. else
  748. remaining = urb->transfer_buffer_length - urb->actual_length;
  749. transfer_size = rcvbc;
  750. if (transfer_size > remaining)
  751. transfer_size = remaining;
  752. if (transfer_size > 0) {
  753. void *dst = urb->transfer_buffer + urb->actual_length;
  754. spi_rd_buf(hcd, MAX3421_REG_RCVFIFO, dst, transfer_size);
  755. urb->actual_length += transfer_size;
  756. max3421_hcd->curr_len = transfer_size;
  757. }
  758. /* ack the RCVDAV irq now that the FIFO has been read: */
  759. spi_wr8(hcd, MAX3421_REG_HIRQ, BIT(MAX3421_HI_RCVDAV_BIT));
  760. }
  761. static void
  762. max3421_handle_error(struct usb_hcd *hcd, u8 hrsl)
  763. {
  764. struct spi_device *spi = to_spi_device(hcd->self.controller);
  765. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  766. u8 result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
  767. struct urb *urb = max3421_hcd->curr_urb;
  768. struct max3421_ep *max3421_ep = urb->ep->hcpriv;
  769. int switch_sndfifo;
  770. /*
  771. * If an OUT command results in any response other than OK
  772. * (i.e., error or NAK), we have to perform a dummy-write to
  773. * SNDBC so the FIFO gets switched back to us. Otherwise, we
  774. * get out of sync with the SNDFIFO double buffer.
  775. */
  776. switch_sndfifo = (max3421_ep->pkt_state == PKT_STATE_TRANSFER &&
  777. usb_urb_dir_out(urb));
  778. switch (result_code) {
  779. case MAX3421_HRSL_OK:
  780. return; /* this shouldn't happen */
  781. case MAX3421_HRSL_WRONGPID: /* received wrong PID */
  782. case MAX3421_HRSL_BUSY: /* SIE busy */
  783. case MAX3421_HRSL_BADREQ: /* bad val in HXFR */
  784. case MAX3421_HRSL_UNDEF: /* reserved */
  785. case MAX3421_HRSL_KERR: /* K-state instead of response */
  786. case MAX3421_HRSL_JERR: /* J-state instead of response */
  787. /*
  788. * packet experienced an error that we cannot recover
  789. * from; report error
  790. */
  791. max3421_hcd->urb_done = hrsl_to_error[result_code];
  792. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  793. __func__, hrsl);
  794. break;
  795. case MAX3421_HRSL_TOGERR:
  796. if (usb_urb_dir_in(urb))
  797. ; /* don't do anything (device will switch toggle) */
  798. else {
  799. /* flip the send toggle bit: */
  800. int sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
  801. sndtog ^= 1;
  802. spi_wr8(hcd, MAX3421_REG_HCTL,
  803. BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
  804. }
  805. /* FALL THROUGH */
  806. case MAX3421_HRSL_BADBC: /* bad byte count */
  807. case MAX3421_HRSL_PIDERR: /* received PID is corrupted */
  808. case MAX3421_HRSL_PKTERR: /* packet error (stuff, EOP) */
  809. case MAX3421_HRSL_CRCERR: /* CRC error */
  810. case MAX3421_HRSL_BABBLE: /* device talked too long */
  811. case MAX3421_HRSL_TIMEOUT:
  812. if (max3421_ep->retries++ < USB_MAX_RETRIES)
  813. /* retry the packet again in the next frame */
  814. max3421_slow_retransmit(hcd);
  815. else {
  816. /* Based on ohci.h cc_to_err[]: */
  817. max3421_hcd->urb_done = hrsl_to_error[result_code];
  818. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  819. __func__, hrsl);
  820. }
  821. break;
  822. case MAX3421_HRSL_STALL:
  823. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  824. __func__, hrsl);
  825. max3421_hcd->urb_done = hrsl_to_error[result_code];
  826. break;
  827. case MAX3421_HRSL_NAK:
  828. /*
  829. * Device wasn't ready for data or has no data
  830. * available: retry the packet again.
  831. */
  832. if (max3421_ep->naks++ < NAK_MAX_FAST_RETRANSMITS) {
  833. max3421_next_transfer(hcd, 1);
  834. switch_sndfifo = 0;
  835. } else
  836. max3421_slow_retransmit(hcd);
  837. break;
  838. }
  839. if (switch_sndfifo)
  840. spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
  841. }
  842. /*
  843. * Caller must NOT hold HCD spinlock.
  844. */
  845. static int
  846. max3421_transfer_in_done(struct usb_hcd *hcd, struct urb *urb)
  847. {
  848. struct spi_device *spi = to_spi_device(hcd->self.controller);
  849. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  850. u32 max_packet;
  851. if (urb->actual_length >= urb->transfer_buffer_length)
  852. return 1; /* read is complete, so we're done */
  853. /*
  854. * USB 2.0 Section 5.3.2 Pipes: packets must be full size
  855. * except for last one.
  856. */
  857. max_packet = usb_maxpacket(urb->dev, urb->pipe, 0);
  858. if (max_packet > MAX3421_FIFO_SIZE) {
  859. /*
  860. * We do not support isochronous transfers at this
  861. * time...
  862. */
  863. dev_err(&spi->dev,
  864. "%s: packet-size of %u too big (limit is %u bytes)",
  865. __func__, max_packet, MAX3421_FIFO_SIZE);
  866. return -EINVAL;
  867. }
  868. if (max3421_hcd->curr_len < max_packet) {
  869. if (urb->transfer_flags & URB_SHORT_NOT_OK) {
  870. /*
  871. * remaining > 0 and received an
  872. * unexpected partial packet ->
  873. * error
  874. */
  875. return -EREMOTEIO;
  876. } else
  877. /* short read, but it's OK */
  878. return 1;
  879. }
  880. return 0; /* not done */
  881. }
  882. /*
  883. * Caller must NOT hold HCD spinlock.
  884. */
  885. static int
  886. max3421_transfer_out_done(struct usb_hcd *hcd, struct urb *urb)
  887. {
  888. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  889. urb->actual_length += max3421_hcd->curr_len;
  890. if (urb->actual_length < urb->transfer_buffer_length)
  891. return 0;
  892. if (urb->transfer_flags & URB_ZERO_PACKET) {
  893. /*
  894. * Some hardware needs a zero-size packet at the end
  895. * of a bulk-out transfer if the last transfer was a
  896. * full-sized packet (i.e., such hardware use <
  897. * max_packet as an indicator that the end of the
  898. * packet has been reached).
  899. */
  900. u32 max_packet = usb_maxpacket(urb->dev, urb->pipe, 1);
  901. if (max3421_hcd->curr_len == max_packet)
  902. return 0;
  903. }
  904. return 1;
  905. }
  906. /*
  907. * Caller must NOT hold HCD spinlock.
  908. */
  909. static void
  910. max3421_host_transfer_done(struct usb_hcd *hcd)
  911. {
  912. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  913. struct urb *urb = max3421_hcd->curr_urb;
  914. struct max3421_ep *max3421_ep;
  915. u8 result_code, hrsl;
  916. int urb_done = 0;
  917. max3421_hcd->hien &= ~(BIT(MAX3421_HI_HXFRDN_BIT) |
  918. BIT(MAX3421_HI_RCVDAV_BIT));
  919. hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  920. result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
  921. #ifdef DEBUG
  922. ++max3421_hcd->err_stat[result_code];
  923. #endif
  924. max3421_ep = urb->ep->hcpriv;
  925. if (unlikely(result_code != MAX3421_HRSL_OK)) {
  926. max3421_handle_error(hcd, hrsl);
  927. return;
  928. }
  929. max3421_ep->naks = 0;
  930. max3421_ep->retries = 0;
  931. switch (max3421_ep->pkt_state) {
  932. case PKT_STATE_SETUP:
  933. if (urb->transfer_buffer_length > 0)
  934. max3421_ep->pkt_state = PKT_STATE_TRANSFER;
  935. else
  936. max3421_ep->pkt_state = PKT_STATE_TERMINATE;
  937. break;
  938. case PKT_STATE_TRANSFER:
  939. if (usb_urb_dir_in(urb))
  940. urb_done = max3421_transfer_in_done(hcd, urb);
  941. else
  942. urb_done = max3421_transfer_out_done(hcd, urb);
  943. if (urb_done > 0 && usb_pipetype(urb->pipe) == PIPE_CONTROL) {
  944. /*
  945. * We aren't really done - we still need to
  946. * terminate the control transfer:
  947. */
  948. max3421_hcd->urb_done = urb_done = 0;
  949. max3421_ep->pkt_state = PKT_STATE_TERMINATE;
  950. }
  951. break;
  952. case PKT_STATE_TERMINATE:
  953. urb_done = 1;
  954. break;
  955. }
  956. if (urb_done)
  957. max3421_hcd->urb_done = urb_done;
  958. else
  959. max3421_next_transfer(hcd, 0);
  960. }
  961. /*
  962. * Caller must NOT hold HCD spinlock.
  963. */
  964. static void
  965. max3421_detect_conn(struct usb_hcd *hcd)
  966. {
  967. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  968. unsigned int jk, have_conn = 0;
  969. u32 old_port_status, chg;
  970. unsigned long flags;
  971. u8 hrsl, mode;
  972. hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  973. jk = ((((hrsl >> MAX3421_HRSL_JSTATUS_BIT) & 1) << 0) |
  974. (((hrsl >> MAX3421_HRSL_KSTATUS_BIT) & 1) << 1));
  975. mode = max3421_hcd->mode;
  976. switch (jk) {
  977. case 0x0: /* SE0: disconnect */
  978. /*
  979. * Turn off SOFKAENAB bit to avoid getting interrupt
  980. * every milli-second:
  981. */
  982. mode &= ~BIT(MAX3421_MODE_SOFKAENAB_BIT);
  983. break;
  984. case 0x1: /* J=0,K=1: low-speed (in full-speed or vice versa) */
  985. case 0x2: /* J=1,K=0: full-speed (in full-speed or vice versa) */
  986. if (jk == 0x2)
  987. /* need to switch to the other speed: */
  988. mode ^= BIT(MAX3421_MODE_LOWSPEED_BIT);
  989. /* turn on SOFKAENAB bit: */
  990. mode |= BIT(MAX3421_MODE_SOFKAENAB_BIT);
  991. have_conn = 1;
  992. break;
  993. case 0x3: /* illegal */
  994. break;
  995. }
  996. max3421_hcd->mode = mode;
  997. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  998. spin_lock_irqsave(&max3421_hcd->lock, flags);
  999. old_port_status = max3421_hcd->port_status;
  1000. if (have_conn)
  1001. max3421_hcd->port_status |= USB_PORT_STAT_CONNECTION;
  1002. else
  1003. max3421_hcd->port_status &= ~USB_PORT_STAT_CONNECTION;
  1004. if (mode & BIT(MAX3421_MODE_LOWSPEED_BIT))
  1005. max3421_hcd->port_status |= USB_PORT_STAT_LOW_SPEED;
  1006. else
  1007. max3421_hcd->port_status &= ~USB_PORT_STAT_LOW_SPEED;
  1008. chg = (old_port_status ^ max3421_hcd->port_status);
  1009. max3421_hcd->port_status |= chg << 16;
  1010. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1011. }
  1012. static irqreturn_t
  1013. max3421_irq_handler(int irq, void *dev_id)
  1014. {
  1015. struct usb_hcd *hcd = dev_id;
  1016. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1017. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1018. if (max3421_hcd->spi_thread &&
  1019. max3421_hcd->spi_thread->state != TASK_RUNNING)
  1020. wake_up_process(max3421_hcd->spi_thread);
  1021. if (!test_and_set_bit(ENABLE_IRQ, &max3421_hcd->todo))
  1022. disable_irq_nosync(spi->irq);
  1023. return IRQ_HANDLED;
  1024. }
  1025. #ifdef DEBUG
  1026. static void
  1027. dump_eps(struct usb_hcd *hcd)
  1028. {
  1029. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1030. struct max3421_ep *max3421_ep;
  1031. struct usb_host_endpoint *ep;
  1032. char ubuf[512], *dp, *end;
  1033. unsigned long flags;
  1034. struct urb *urb;
  1035. int epnum, ret;
  1036. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1037. list_for_each_entry(max3421_ep, &max3421_hcd->ep_list, ep_list) {
  1038. ep = max3421_ep->ep;
  1039. dp = ubuf;
  1040. end = dp + sizeof(ubuf);
  1041. *dp = '\0';
  1042. list_for_each_entry(urb, &ep->urb_list, urb_list) {
  1043. ret = snprintf(dp, end - dp, " %p(%d.%s %d/%d)", urb,
  1044. usb_pipetype(urb->pipe),
  1045. usb_urb_dir_in(urb) ? "IN" : "OUT",
  1046. urb->actual_length,
  1047. urb->transfer_buffer_length);
  1048. if (ret < 0 || ret >= end - dp)
  1049. break; /* error or buffer full */
  1050. dp += ret;
  1051. }
  1052. epnum = usb_endpoint_num(&ep->desc);
  1053. pr_info("EP%0u %u lst %04u rtr %u nak %6u rxmt %u: %s\n",
  1054. epnum, max3421_ep->pkt_state, max3421_ep->last_active,
  1055. max3421_ep->retries, max3421_ep->naks,
  1056. max3421_ep->retransmit, ubuf);
  1057. }
  1058. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1059. }
  1060. #endif /* DEBUG */
  1061. /* Return zero if no work was performed, 1 otherwise. */
  1062. static int
  1063. max3421_handle_irqs(struct usb_hcd *hcd)
  1064. {
  1065. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1066. u32 chg, old_port_status;
  1067. unsigned long flags;
  1068. u8 hirq;
  1069. /*
  1070. * Read and ack pending interrupts (CPU must never
  1071. * clear SNDBAV directly and RCVDAV must be cleared by
  1072. * max3421_recv_data_available()!):
  1073. */
  1074. hirq = spi_rd8(hcd, MAX3421_REG_HIRQ);
  1075. hirq &= max3421_hcd->hien;
  1076. if (!hirq)
  1077. return 0;
  1078. spi_wr8(hcd, MAX3421_REG_HIRQ,
  1079. hirq & ~(BIT(MAX3421_HI_SNDBAV_BIT) |
  1080. BIT(MAX3421_HI_RCVDAV_BIT)));
  1081. if (hirq & BIT(MAX3421_HI_FRAME_BIT)) {
  1082. max3421_hcd->frame_number = ((max3421_hcd->frame_number + 1)
  1083. & USB_MAX_FRAME_NUMBER);
  1084. max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
  1085. }
  1086. if (hirq & BIT(MAX3421_HI_RCVDAV_BIT))
  1087. max3421_recv_data_available(hcd);
  1088. if (hirq & BIT(MAX3421_HI_HXFRDN_BIT))
  1089. max3421_host_transfer_done(hcd);
  1090. if (hirq & BIT(MAX3421_HI_CONDET_BIT))
  1091. max3421_detect_conn(hcd);
  1092. /*
  1093. * Now process interrupts that may affect HCD state
  1094. * other than the end-points:
  1095. */
  1096. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1097. old_port_status = max3421_hcd->port_status;
  1098. if (hirq & BIT(MAX3421_HI_BUSEVENT_BIT)) {
  1099. if (max3421_hcd->port_status & USB_PORT_STAT_RESET) {
  1100. /* BUSEVENT due to completion of Bus Reset */
  1101. max3421_hcd->port_status &= ~USB_PORT_STAT_RESET;
  1102. max3421_hcd->port_status |= USB_PORT_STAT_ENABLE;
  1103. } else {
  1104. /* BUSEVENT due to completion of Bus Resume */
  1105. pr_info("%s: BUSEVENT Bus Resume Done\n", __func__);
  1106. }
  1107. }
  1108. if (hirq & BIT(MAX3421_HI_RWU_BIT))
  1109. pr_info("%s: RWU\n", __func__);
  1110. if (hirq & BIT(MAX3421_HI_SUSDN_BIT))
  1111. pr_info("%s: SUSDN\n", __func__);
  1112. chg = (old_port_status ^ max3421_hcd->port_status);
  1113. max3421_hcd->port_status |= chg << 16;
  1114. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1115. #ifdef DEBUG
  1116. {
  1117. static unsigned long last_time;
  1118. char sbuf[16 * 16], *dp, *end;
  1119. int i;
  1120. if (time_after(jiffies, last_time + 5*HZ)) {
  1121. dp = sbuf;
  1122. end = sbuf + sizeof(sbuf);
  1123. *dp = '\0';
  1124. for (i = 0; i < 16; ++i) {
  1125. int ret = snprintf(dp, end - dp, " %lu",
  1126. max3421_hcd->err_stat[i]);
  1127. if (ret < 0 || ret >= end - dp)
  1128. break; /* error or buffer full */
  1129. dp += ret;
  1130. }
  1131. pr_info("%s: hrsl_stats %s\n", __func__, sbuf);
  1132. memset(max3421_hcd->err_stat, 0,
  1133. sizeof(max3421_hcd->err_stat));
  1134. last_time = jiffies;
  1135. dump_eps(hcd);
  1136. }
  1137. }
  1138. #endif
  1139. return 1;
  1140. }
  1141. static int
  1142. max3421_reset_hcd(struct usb_hcd *hcd)
  1143. {
  1144. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1145. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1146. int timeout;
  1147. /* perform a chip reset and wait for OSCIRQ signal to appear: */
  1148. spi_wr8(hcd, MAX3421_REG_USBCTL, BIT(MAX3421_USBCTL_CHIPRES_BIT));
  1149. /* clear reset: */
  1150. spi_wr8(hcd, MAX3421_REG_USBCTL, 0);
  1151. timeout = 1000;
  1152. while (1) {
  1153. if (spi_rd8(hcd, MAX3421_REG_USBIRQ)
  1154. & BIT(MAX3421_USBIRQ_OSCOKIRQ_BIT))
  1155. break;
  1156. if (--timeout < 0) {
  1157. dev_err(&spi->dev,
  1158. "timed out waiting for oscillator OK signal");
  1159. return 1;
  1160. }
  1161. cond_resched();
  1162. }
  1163. /*
  1164. * Turn on host mode, automatic generation of SOF packets, and
  1165. * enable pull-down registers on DM/DP:
  1166. */
  1167. max3421_hcd->mode = (BIT(MAX3421_MODE_HOST_BIT) |
  1168. BIT(MAX3421_MODE_SOFKAENAB_BIT) |
  1169. BIT(MAX3421_MODE_DMPULLDN_BIT) |
  1170. BIT(MAX3421_MODE_DPPULLDN_BIT));
  1171. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  1172. /* reset frame-number: */
  1173. max3421_hcd->frame_number = USB_MAX_FRAME_NUMBER;
  1174. spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_FRMRST_BIT));
  1175. /* sample the state of the D+ and D- lines */
  1176. spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_SAMPLEBUS_BIT));
  1177. max3421_detect_conn(hcd);
  1178. /* enable frame, connection-detected, and bus-event interrupts: */
  1179. max3421_hcd->hien = (BIT(MAX3421_HI_FRAME_BIT) |
  1180. BIT(MAX3421_HI_CONDET_BIT) |
  1181. BIT(MAX3421_HI_BUSEVENT_BIT));
  1182. spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
  1183. /* enable interrupts: */
  1184. spi_wr8(hcd, MAX3421_REG_CPUCTL, BIT(MAX3421_CPUCTL_IE_BIT));
  1185. return 1;
  1186. }
  1187. static int
  1188. max3421_urb_done(struct usb_hcd *hcd)
  1189. {
  1190. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1191. unsigned long flags;
  1192. struct urb *urb;
  1193. int status;
  1194. status = max3421_hcd->urb_done;
  1195. max3421_hcd->urb_done = 0;
  1196. if (status > 0)
  1197. status = 0;
  1198. urb = max3421_hcd->curr_urb;
  1199. if (urb) {
  1200. max3421_hcd->curr_urb = NULL;
  1201. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1202. usb_hcd_unlink_urb_from_ep(hcd, urb);
  1203. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1204. /* must be called without the HCD spinlock: */
  1205. usb_hcd_giveback_urb(hcd, urb, status);
  1206. }
  1207. return 1;
  1208. }
  1209. static int
  1210. max3421_spi_thread(void *dev_id)
  1211. {
  1212. struct usb_hcd *hcd = dev_id;
  1213. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1214. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1215. int i, i_worked = 1;
  1216. /* set full-duplex SPI mode, low-active interrupt pin: */
  1217. spi_wr8(hcd, MAX3421_REG_PINCTL,
  1218. (BIT(MAX3421_PINCTL_FDUPSPI_BIT) | /* full-duplex */
  1219. BIT(MAX3421_PINCTL_INTLEVEL_BIT))); /* low-active irq */
  1220. while (!kthread_should_stop()) {
  1221. max3421_hcd->rev = spi_rd8(hcd, MAX3421_REG_REVISION);
  1222. if (max3421_hcd->rev == 0x12 || max3421_hcd->rev == 0x13)
  1223. break;
  1224. dev_err(&spi->dev, "bad rev 0x%02x", max3421_hcd->rev);
  1225. msleep(10000);
  1226. }
  1227. dev_info(&spi->dev, "rev 0x%x, SPI clk %dHz, bpw %u, irq %d\n",
  1228. max3421_hcd->rev, spi->max_speed_hz, spi->bits_per_word,
  1229. spi->irq);
  1230. while (!kthread_should_stop()) {
  1231. if (!i_worked) {
  1232. /*
  1233. * We'll be waiting for wakeups from the hard
  1234. * interrupt handler, so now is a good time to
  1235. * sync our hien with the chip:
  1236. */
  1237. spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
  1238. set_current_state(TASK_INTERRUPTIBLE);
  1239. if (test_and_clear_bit(ENABLE_IRQ, &max3421_hcd->todo))
  1240. enable_irq(spi->irq);
  1241. schedule();
  1242. __set_current_state(TASK_RUNNING);
  1243. }
  1244. i_worked = 0;
  1245. if (max3421_hcd->urb_done)
  1246. i_worked |= max3421_urb_done(hcd);
  1247. else if (max3421_handle_irqs(hcd))
  1248. i_worked = 1;
  1249. else if (!max3421_hcd->curr_urb)
  1250. i_worked |= max3421_select_and_start_urb(hcd);
  1251. if (test_and_clear_bit(RESET_HCD, &max3421_hcd->todo))
  1252. /* reset the HCD: */
  1253. i_worked |= max3421_reset_hcd(hcd);
  1254. if (test_and_clear_bit(RESET_PORT, &max3421_hcd->todo)) {
  1255. /* perform a USB bus reset: */
  1256. spi_wr8(hcd, MAX3421_REG_HCTL,
  1257. BIT(MAX3421_HCTL_BUSRST_BIT));
  1258. i_worked = 1;
  1259. }
  1260. if (test_and_clear_bit(CHECK_UNLINK, &max3421_hcd->todo))
  1261. i_worked |= max3421_check_unlink(hcd);
  1262. if (test_and_clear_bit(IOPIN_UPDATE, &max3421_hcd->todo)) {
  1263. /*
  1264. * IOPINS1/IOPINS2 do not auto-increment, so we can't
  1265. * use spi_wr_buf().
  1266. */
  1267. for (i = 0; i < ARRAY_SIZE(max3421_hcd->iopins); ++i) {
  1268. u8 val = spi_rd8(hcd, MAX3421_REG_IOPINS1);
  1269. val = ((val & 0xf0) |
  1270. (max3421_hcd->iopins[i] & 0x0f));
  1271. spi_wr8(hcd, MAX3421_REG_IOPINS1 + i, val);
  1272. max3421_hcd->iopins[i] = val;
  1273. }
  1274. i_worked = 1;
  1275. }
  1276. }
  1277. set_current_state(TASK_RUNNING);
  1278. dev_info(&spi->dev, "SPI thread exiting");
  1279. return 0;
  1280. }
  1281. static int
  1282. max3421_reset_port(struct usb_hcd *hcd)
  1283. {
  1284. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1285. max3421_hcd->port_status &= ~(USB_PORT_STAT_ENABLE |
  1286. USB_PORT_STAT_LOW_SPEED);
  1287. max3421_hcd->port_status |= USB_PORT_STAT_RESET;
  1288. set_bit(RESET_PORT, &max3421_hcd->todo);
  1289. wake_up_process(max3421_hcd->spi_thread);
  1290. return 0;
  1291. }
  1292. static int
  1293. max3421_reset(struct usb_hcd *hcd)
  1294. {
  1295. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1296. hcd->self.sg_tablesize = 0;
  1297. hcd->speed = HCD_USB2;
  1298. hcd->self.root_hub->speed = USB_SPEED_FULL;
  1299. set_bit(RESET_HCD, &max3421_hcd->todo);
  1300. wake_up_process(max3421_hcd->spi_thread);
  1301. return 0;
  1302. }
  1303. static int
  1304. max3421_start(struct usb_hcd *hcd)
  1305. {
  1306. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1307. spin_lock_init(&max3421_hcd->lock);
  1308. max3421_hcd->rh_state = MAX3421_RH_RUNNING;
  1309. INIT_LIST_HEAD(&max3421_hcd->ep_list);
  1310. hcd->power_budget = POWER_BUDGET;
  1311. hcd->state = HC_STATE_RUNNING;
  1312. hcd->uses_new_polling = 1;
  1313. return 0;
  1314. }
  1315. static void
  1316. max3421_stop(struct usb_hcd *hcd)
  1317. {
  1318. }
  1319. static int
  1320. max3421_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
  1321. {
  1322. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1323. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1324. struct max3421_ep *max3421_ep;
  1325. unsigned long flags;
  1326. int retval;
  1327. switch (usb_pipetype(urb->pipe)) {
  1328. case PIPE_INTERRUPT:
  1329. case PIPE_ISOCHRONOUS:
  1330. if (urb->interval < 0) {
  1331. dev_err(&spi->dev,
  1332. "%s: interval=%d for intr-/iso-pipe; expected > 0\n",
  1333. __func__, urb->interval);
  1334. return -EINVAL;
  1335. }
  1336. default:
  1337. break;
  1338. }
  1339. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1340. max3421_ep = urb->ep->hcpriv;
  1341. if (!max3421_ep) {
  1342. /* gets freed in max3421_endpoint_disable: */
  1343. max3421_ep = kzalloc(sizeof(struct max3421_ep), GFP_ATOMIC);
  1344. if (!max3421_ep) {
  1345. retval = -ENOMEM;
  1346. goto out;
  1347. }
  1348. max3421_ep->ep = urb->ep;
  1349. max3421_ep->last_active = max3421_hcd->frame_number;
  1350. urb->ep->hcpriv = max3421_ep;
  1351. list_add_tail(&max3421_ep->ep_list, &max3421_hcd->ep_list);
  1352. }
  1353. retval = usb_hcd_link_urb_to_ep(hcd, urb);
  1354. if (retval == 0) {
  1355. /* Since we added to the queue, restart scheduling: */
  1356. max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
  1357. wake_up_process(max3421_hcd->spi_thread);
  1358. }
  1359. out:
  1360. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1361. return retval;
  1362. }
  1363. static int
  1364. max3421_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  1365. {
  1366. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1367. unsigned long flags;
  1368. int retval;
  1369. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1370. /*
  1371. * This will set urb->unlinked which in turn causes the entry
  1372. * to be dropped at the next opportunity.
  1373. */
  1374. retval = usb_hcd_check_unlink_urb(hcd, urb, status);
  1375. if (retval == 0) {
  1376. set_bit(CHECK_UNLINK, &max3421_hcd->todo);
  1377. wake_up_process(max3421_hcd->spi_thread);
  1378. }
  1379. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1380. return retval;
  1381. }
  1382. static void
  1383. max3421_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
  1384. {
  1385. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1386. unsigned long flags;
  1387. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1388. if (ep->hcpriv) {
  1389. struct max3421_ep *max3421_ep = ep->hcpriv;
  1390. /* remove myself from the ep_list: */
  1391. if (!list_empty(&max3421_ep->ep_list))
  1392. list_del(&max3421_ep->ep_list);
  1393. kfree(max3421_ep);
  1394. ep->hcpriv = NULL;
  1395. }
  1396. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1397. }
  1398. static int
  1399. max3421_get_frame_number(struct usb_hcd *hcd)
  1400. {
  1401. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1402. return max3421_hcd->frame_number;
  1403. }
  1404. /*
  1405. * Should return a non-zero value when any port is undergoing a resume
  1406. * transition while the root hub is suspended.
  1407. */
  1408. static int
  1409. max3421_hub_status_data(struct usb_hcd *hcd, char *buf)
  1410. {
  1411. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1412. unsigned long flags;
  1413. int retval = 0;
  1414. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1415. if (!HCD_HW_ACCESSIBLE(hcd))
  1416. goto done;
  1417. *buf = 0;
  1418. if ((max3421_hcd->port_status & PORT_C_MASK) != 0) {
  1419. *buf = (1 << 1); /* a hub over-current condition exists */
  1420. dev_dbg(hcd->self.controller,
  1421. "port status 0x%08x has changes\n",
  1422. max3421_hcd->port_status);
  1423. retval = 1;
  1424. if (max3421_hcd->rh_state == MAX3421_RH_SUSPENDED)
  1425. usb_hcd_resume_root_hub(hcd);
  1426. }
  1427. done:
  1428. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1429. return retval;
  1430. }
  1431. static inline void
  1432. hub_descriptor(struct usb_hub_descriptor *desc)
  1433. {
  1434. memset(desc, 0, sizeof(*desc));
  1435. /*
  1436. * See Table 11-13: Hub Descriptor in USB 2.0 spec.
  1437. */
  1438. desc->bDescriptorType = USB_DT_HUB; /* hub descriptor */
  1439. desc->bDescLength = 9;
  1440. desc->wHubCharacteristics = cpu_to_le16(HUB_CHAR_INDV_PORT_LPSM |
  1441. HUB_CHAR_COMMON_OCPM);
  1442. desc->bNbrPorts = 1;
  1443. }
  1444. /*
  1445. * Set the MAX3421E general-purpose output with number PIN_NUMBER to
  1446. * VALUE (0 or 1). PIN_NUMBER may be in the range from 1-8. For
  1447. * any other value, this function acts as a no-op.
  1448. */
  1449. static void
  1450. max3421_gpout_set_value(struct usb_hcd *hcd, u8 pin_number, u8 value)
  1451. {
  1452. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1453. u8 mask, idx;
  1454. --pin_number;
  1455. if (pin_number >= MAX3421_GPOUT_COUNT)
  1456. return;
  1457. mask = 1u << (pin_number % 4);
  1458. idx = pin_number / 4;
  1459. if (value)
  1460. max3421_hcd->iopins[idx] |= mask;
  1461. else
  1462. max3421_hcd->iopins[idx] &= ~mask;
  1463. set_bit(IOPIN_UPDATE, &max3421_hcd->todo);
  1464. wake_up_process(max3421_hcd->spi_thread);
  1465. }
  1466. static int
  1467. max3421_hub_control(struct usb_hcd *hcd, u16 type_req, u16 value, u16 index,
  1468. char *buf, u16 length)
  1469. {
  1470. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1471. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1472. struct max3421_hcd_platform_data *pdata;
  1473. unsigned long flags;
  1474. int retval = 0;
  1475. pdata = spi->dev.platform_data;
  1476. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1477. switch (type_req) {
  1478. case ClearHubFeature:
  1479. break;
  1480. case ClearPortFeature:
  1481. switch (value) {
  1482. case USB_PORT_FEAT_SUSPEND:
  1483. break;
  1484. case USB_PORT_FEAT_POWER:
  1485. dev_dbg(hcd->self.controller, "power-off\n");
  1486. max3421_gpout_set_value(hcd, pdata->vbus_gpout,
  1487. !pdata->vbus_active_level);
  1488. /* FALLS THROUGH */
  1489. default:
  1490. max3421_hcd->port_status &= ~(1 << value);
  1491. }
  1492. break;
  1493. case GetHubDescriptor:
  1494. hub_descriptor((struct usb_hub_descriptor *) buf);
  1495. break;
  1496. case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
  1497. case GetPortErrorCount:
  1498. case SetHubDepth:
  1499. /* USB3 only */
  1500. goto error;
  1501. case GetHubStatus:
  1502. *(__le32 *) buf = cpu_to_le32(0);
  1503. break;
  1504. case GetPortStatus:
  1505. if (index != 1) {
  1506. retval = -EPIPE;
  1507. goto error;
  1508. }
  1509. ((__le16 *) buf)[0] = cpu_to_le16(max3421_hcd->port_status);
  1510. ((__le16 *) buf)[1] =
  1511. cpu_to_le16(max3421_hcd->port_status >> 16);
  1512. break;
  1513. case SetHubFeature:
  1514. retval = -EPIPE;
  1515. break;
  1516. case SetPortFeature:
  1517. switch (value) {
  1518. case USB_PORT_FEAT_LINK_STATE:
  1519. case USB_PORT_FEAT_U1_TIMEOUT:
  1520. case USB_PORT_FEAT_U2_TIMEOUT:
  1521. case USB_PORT_FEAT_BH_PORT_RESET:
  1522. goto error;
  1523. case USB_PORT_FEAT_SUSPEND:
  1524. if (max3421_hcd->active)
  1525. max3421_hcd->port_status |=
  1526. USB_PORT_STAT_SUSPEND;
  1527. break;
  1528. case USB_PORT_FEAT_POWER:
  1529. dev_dbg(hcd->self.controller, "power-on\n");
  1530. max3421_hcd->port_status |= USB_PORT_STAT_POWER;
  1531. max3421_gpout_set_value(hcd, pdata->vbus_gpout,
  1532. pdata->vbus_active_level);
  1533. break;
  1534. case USB_PORT_FEAT_RESET:
  1535. max3421_reset_port(hcd);
  1536. /* FALLS THROUGH */
  1537. default:
  1538. if ((max3421_hcd->port_status & USB_PORT_STAT_POWER)
  1539. != 0)
  1540. max3421_hcd->port_status |= (1 << value);
  1541. }
  1542. break;
  1543. default:
  1544. dev_dbg(hcd->self.controller,
  1545. "hub control req%04x v%04x i%04x l%d\n",
  1546. type_req, value, index, length);
  1547. error: /* "protocol stall" on error */
  1548. retval = -EPIPE;
  1549. }
  1550. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1551. return retval;
  1552. }
  1553. static int
  1554. max3421_bus_suspend(struct usb_hcd *hcd)
  1555. {
  1556. return -1;
  1557. }
  1558. static int
  1559. max3421_bus_resume(struct usb_hcd *hcd)
  1560. {
  1561. return -1;
  1562. }
  1563. /*
  1564. * The SPI driver already takes care of DMA-mapping/unmapping, so no
  1565. * reason to do it twice.
  1566. */
  1567. static int
  1568. max3421_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
  1569. {
  1570. return 0;
  1571. }
  1572. static void
  1573. max3421_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
  1574. {
  1575. }
  1576. static const struct hc_driver max3421_hcd_desc = {
  1577. .description = "max3421",
  1578. .product_desc = DRIVER_DESC,
  1579. .hcd_priv_size = sizeof(struct max3421_hcd),
  1580. .flags = HCD_USB11,
  1581. .reset = max3421_reset,
  1582. .start = max3421_start,
  1583. .stop = max3421_stop,
  1584. .get_frame_number = max3421_get_frame_number,
  1585. .urb_enqueue = max3421_urb_enqueue,
  1586. .urb_dequeue = max3421_urb_dequeue,
  1587. .map_urb_for_dma = max3421_map_urb_for_dma,
  1588. .unmap_urb_for_dma = max3421_unmap_urb_for_dma,
  1589. .endpoint_disable = max3421_endpoint_disable,
  1590. .hub_status_data = max3421_hub_status_data,
  1591. .hub_control = max3421_hub_control,
  1592. .bus_suspend = max3421_bus_suspend,
  1593. .bus_resume = max3421_bus_resume,
  1594. };
  1595. static int
  1596. max3421_of_vbus_en_pin(struct device *dev, struct max3421_hcd_platform_data *pdata)
  1597. {
  1598. int retval;
  1599. uint32_t value[2];
  1600. if (!pdata)
  1601. return -EINVAL;
  1602. retval = of_property_read_u32_array(dev->of_node, "maxim,vbus-en-pin", value, 2);
  1603. if (retval) {
  1604. dev_err(dev, "device tree node property 'maxim,vbus-en-pin' is missing\n");
  1605. return retval;
  1606. }
  1607. dev_info(dev, "property 'maxim,vbus-en-pin' value is <%d %d>\n", value[0], value[1]);
  1608. pdata->vbus_gpout = value[0];
  1609. pdata->vbus_active_level = value[1];
  1610. return 0;
  1611. }
  1612. static int
  1613. max3421_probe(struct spi_device *spi)
  1614. {
  1615. struct device *dev = &spi->dev;
  1616. struct max3421_hcd *max3421_hcd;
  1617. struct usb_hcd *hcd = NULL;
  1618. struct max3421_hcd_platform_data *pdata = NULL;
  1619. int retval;
  1620. if (spi_setup(spi) < 0) {
  1621. dev_err(&spi->dev, "Unable to setup SPI bus");
  1622. return -EFAULT;
  1623. }
  1624. if (!spi->irq) {
  1625. dev_err(dev, "Failed to get SPI IRQ");
  1626. return -EFAULT;
  1627. }
  1628. if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
  1629. pdata = devm_kzalloc(&spi->dev, sizeof(*pdata), GFP_KERNEL);
  1630. if (!pdata) {
  1631. retval = -ENOMEM;
  1632. goto error;
  1633. }
  1634. retval = max3421_of_vbus_en_pin(dev, pdata);
  1635. if (retval)
  1636. goto error;
  1637. spi->dev.platform_data = pdata;
  1638. }
  1639. pdata = spi->dev.platform_data;
  1640. if (!pdata) {
  1641. dev_err(&spi->dev, "driver configuration data is not provided\n");
  1642. retval = -EFAULT;
  1643. goto error;
  1644. }
  1645. if (pdata->vbus_active_level > 1) {
  1646. dev_err(&spi->dev, "vbus active level value %d is out of range (0/1)\n", pdata->vbus_active_level);
  1647. retval = -EINVAL;
  1648. goto error;
  1649. }
  1650. if (pdata->vbus_gpout < 1 || pdata->vbus_gpout > MAX3421_GPOUT_COUNT) {
  1651. dev_err(&spi->dev, "vbus gpout value %d is out of range (1..8)\n", pdata->vbus_gpout);
  1652. retval = -EINVAL;
  1653. goto error;
  1654. }
  1655. retval = -ENOMEM;
  1656. hcd = usb_create_hcd(&max3421_hcd_desc, &spi->dev,
  1657. dev_name(&spi->dev));
  1658. if (!hcd) {
  1659. dev_err(&spi->dev, "failed to create HCD structure\n");
  1660. goto error;
  1661. }
  1662. set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
  1663. max3421_hcd = hcd_to_max3421(hcd);
  1664. max3421_hcd->next = max3421_hcd_list;
  1665. max3421_hcd_list = max3421_hcd;
  1666. INIT_LIST_HEAD(&max3421_hcd->ep_list);
  1667. max3421_hcd->tx = kmalloc(sizeof(*max3421_hcd->tx), GFP_KERNEL);
  1668. if (!max3421_hcd->tx)
  1669. goto error;
  1670. max3421_hcd->rx = kmalloc(sizeof(*max3421_hcd->rx), GFP_KERNEL);
  1671. if (!max3421_hcd->rx)
  1672. goto error;
  1673. max3421_hcd->spi_thread = kthread_run(max3421_spi_thread, hcd,
  1674. "max3421_spi_thread");
  1675. if (max3421_hcd->spi_thread == ERR_PTR(-ENOMEM)) {
  1676. dev_err(&spi->dev,
  1677. "failed to create SPI thread (out of memory)\n");
  1678. goto error;
  1679. }
  1680. retval = usb_add_hcd(hcd, 0, 0);
  1681. if (retval) {
  1682. dev_err(&spi->dev, "failed to add HCD\n");
  1683. goto error;
  1684. }
  1685. retval = request_irq(spi->irq, max3421_irq_handler,
  1686. IRQF_TRIGGER_LOW, "max3421", hcd);
  1687. if (retval < 0) {
  1688. dev_err(&spi->dev, "failed to request irq %d\n", spi->irq);
  1689. goto error;
  1690. }
  1691. return 0;
  1692. error:
  1693. if (IS_ENABLED(CONFIG_OF) && dev->of_node && pdata) {
  1694. devm_kfree(&spi->dev, pdata);
  1695. spi->dev.platform_data = NULL;
  1696. }
  1697. if (hcd) {
  1698. kfree(max3421_hcd->tx);
  1699. kfree(max3421_hcd->rx);
  1700. if (max3421_hcd->spi_thread)
  1701. kthread_stop(max3421_hcd->spi_thread);
  1702. usb_put_hcd(hcd);
  1703. }
  1704. return retval;
  1705. }
  1706. static int
  1707. max3421_remove(struct spi_device *spi)
  1708. {
  1709. struct max3421_hcd *max3421_hcd = NULL, **prev;
  1710. struct usb_hcd *hcd = NULL;
  1711. unsigned long flags;
  1712. for (prev = &max3421_hcd_list; *prev; prev = &(*prev)->next) {
  1713. max3421_hcd = *prev;
  1714. hcd = max3421_to_hcd(max3421_hcd);
  1715. if (hcd->self.controller == &spi->dev)
  1716. break;
  1717. }
  1718. if (!max3421_hcd) {
  1719. dev_err(&spi->dev, "no MAX3421 HCD found for SPI device %p\n",
  1720. spi);
  1721. return -ENODEV;
  1722. }
  1723. usb_remove_hcd(hcd);
  1724. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1725. kthread_stop(max3421_hcd->spi_thread);
  1726. *prev = max3421_hcd->next;
  1727. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1728. free_irq(spi->irq, hcd);
  1729. usb_put_hcd(hcd);
  1730. return 0;
  1731. }
  1732. static const struct of_device_id max3421_of_match_table[] = {
  1733. { .compatible = "maxim,max3421", },
  1734. {},
  1735. };
  1736. MODULE_DEVICE_TABLE(of, max3421_of_match_table);
  1737. static struct spi_driver max3421_driver = {
  1738. .probe = max3421_probe,
  1739. .remove = max3421_remove,
  1740. .driver = {
  1741. .name = "max3421-hcd",
  1742. .of_match_table = of_match_ptr(max3421_of_match_table),
  1743. },
  1744. };
  1745. module_spi_driver(max3421_driver);
  1746. MODULE_DESCRIPTION(DRIVER_DESC);
  1747. MODULE_AUTHOR("David Mosberger <davidm@egauge.net>");
  1748. MODULE_LICENSE("GPL");