init.c 4.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Wireless Host Controller (WHC) initialization.
  4. *
  5. * Copyright (C) 2007 Cambridge Silicon Radio Ltd.
  6. */
  7. #include <linux/kernel.h>
  8. #include <linux/gfp.h>
  9. #include <linux/dma-mapping.h>
  10. #include <linux/uwb/umc.h>
  11. #include "../../wusbcore/wusbhc.h"
  12. #include "whcd.h"
  13. /*
  14. * Reset the host controller.
  15. */
  16. static void whc_hw_reset(struct whc *whc)
  17. {
  18. le_writel(WUSBCMD_WHCRESET, whc->base + WUSBCMD);
  19. whci_wait_for(&whc->umc->dev, whc->base + WUSBCMD, WUSBCMD_WHCRESET, 0,
  20. 100, "reset");
  21. }
  22. static void whc_hw_init_di_buf(struct whc *whc)
  23. {
  24. int d;
  25. /* Disable all entries in the Device Information buffer. */
  26. for (d = 0; d < whc->n_devices; d++)
  27. whc->di_buf[d].addr_sec_info = WHC_DI_DISABLE;
  28. le_writeq(whc->di_buf_dma, whc->base + WUSBDEVICEINFOADDR);
  29. }
  30. static void whc_hw_init_dn_buf(struct whc *whc)
  31. {
  32. /* Clear the Device Notification buffer to ensure the V (valid)
  33. * bits are clear. */
  34. memset(whc->dn_buf, 0, 4096);
  35. le_writeq(whc->dn_buf_dma, whc->base + WUSBDNTSBUFADDR);
  36. }
  37. int whc_init(struct whc *whc)
  38. {
  39. u32 whcsparams;
  40. int ret, i;
  41. resource_size_t start, len;
  42. spin_lock_init(&whc->lock);
  43. mutex_init(&whc->mutex);
  44. init_waitqueue_head(&whc->cmd_wq);
  45. init_waitqueue_head(&whc->async_list_wq);
  46. init_waitqueue_head(&whc->periodic_list_wq);
  47. whc->workqueue = alloc_ordered_workqueue(dev_name(&whc->umc->dev), 0);
  48. if (whc->workqueue == NULL) {
  49. ret = -ENOMEM;
  50. goto error;
  51. }
  52. INIT_WORK(&whc->dn_work, whc_dn_work);
  53. INIT_WORK(&whc->async_work, scan_async_work);
  54. INIT_LIST_HEAD(&whc->async_list);
  55. INIT_LIST_HEAD(&whc->async_removed_list);
  56. INIT_WORK(&whc->periodic_work, scan_periodic_work);
  57. for (i = 0; i < 5; i++)
  58. INIT_LIST_HEAD(&whc->periodic_list[i]);
  59. INIT_LIST_HEAD(&whc->periodic_removed_list);
  60. /* Map HC registers. */
  61. start = whc->umc->resource.start;
  62. len = whc->umc->resource.end - start + 1;
  63. if (!request_mem_region(start, len, "whci-hc")) {
  64. dev_err(&whc->umc->dev, "can't request HC region\n");
  65. ret = -EBUSY;
  66. goto error;
  67. }
  68. whc->base_phys = start;
  69. whc->base = ioremap(start, len);
  70. if (!whc->base) {
  71. dev_err(&whc->umc->dev, "ioremap\n");
  72. ret = -ENOMEM;
  73. goto error;
  74. }
  75. whc_hw_reset(whc);
  76. /* Read maximum number of devices, keys and MMC IEs. */
  77. whcsparams = le_readl(whc->base + WHCSPARAMS);
  78. whc->n_devices = WHCSPARAMS_TO_N_DEVICES(whcsparams);
  79. whc->n_keys = WHCSPARAMS_TO_N_KEYS(whcsparams);
  80. whc->n_mmc_ies = WHCSPARAMS_TO_N_MMC_IES(whcsparams);
  81. dev_dbg(&whc->umc->dev, "N_DEVICES = %d, N_KEYS = %d, N_MMC_IES = %d\n",
  82. whc->n_devices, whc->n_keys, whc->n_mmc_ies);
  83. whc->qset_pool = dma_pool_create("qset", &whc->umc->dev,
  84. sizeof(struct whc_qset), 64, 0);
  85. if (whc->qset_pool == NULL) {
  86. ret = -ENOMEM;
  87. goto error;
  88. }
  89. ret = asl_init(whc);
  90. if (ret < 0)
  91. goto error;
  92. ret = pzl_init(whc);
  93. if (ret < 0)
  94. goto error;
  95. /* Allocate and initialize a buffer for generic commands, the
  96. Device Information buffer, and the Device Notification
  97. buffer. */
  98. whc->gen_cmd_buf = dma_alloc_coherent(&whc->umc->dev, WHC_GEN_CMD_DATA_LEN,
  99. &whc->gen_cmd_buf_dma, GFP_KERNEL);
  100. if (whc->gen_cmd_buf == NULL) {
  101. ret = -ENOMEM;
  102. goto error;
  103. }
  104. whc->dn_buf = dma_alloc_coherent(&whc->umc->dev,
  105. sizeof(struct dn_buf_entry) * WHC_N_DN_ENTRIES,
  106. &whc->dn_buf_dma, GFP_KERNEL);
  107. if (!whc->dn_buf) {
  108. ret = -ENOMEM;
  109. goto error;
  110. }
  111. whc_hw_init_dn_buf(whc);
  112. whc->di_buf = dma_alloc_coherent(&whc->umc->dev,
  113. sizeof(struct di_buf_entry) * whc->n_devices,
  114. &whc->di_buf_dma, GFP_KERNEL);
  115. if (!whc->di_buf) {
  116. ret = -ENOMEM;
  117. goto error;
  118. }
  119. whc_hw_init_di_buf(whc);
  120. return 0;
  121. error:
  122. whc_clean_up(whc);
  123. return ret;
  124. }
  125. void whc_clean_up(struct whc *whc)
  126. {
  127. resource_size_t len;
  128. if (whc->di_buf)
  129. dma_free_coherent(&whc->umc->dev, sizeof(struct di_buf_entry) * whc->n_devices,
  130. whc->di_buf, whc->di_buf_dma);
  131. if (whc->dn_buf)
  132. dma_free_coherent(&whc->umc->dev, sizeof(struct dn_buf_entry) * WHC_N_DN_ENTRIES,
  133. whc->dn_buf, whc->dn_buf_dma);
  134. if (whc->gen_cmd_buf)
  135. dma_free_coherent(&whc->umc->dev, WHC_GEN_CMD_DATA_LEN,
  136. whc->gen_cmd_buf, whc->gen_cmd_buf_dma);
  137. pzl_clean_up(whc);
  138. asl_clean_up(whc);
  139. dma_pool_destroy(whc->qset_pool);
  140. len = resource_size(&whc->umc->resource);
  141. if (whc->base)
  142. iounmap(whc->base);
  143. if (whc->base_phys)
  144. release_mem_region(whc->base_phys, len);
  145. if (whc->workqueue)
  146. destroy_workqueue(whc->workqueue);
  147. }