atmel_usba_udc.c 31 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Driver for the Atmel USBA high speed USB device controller
  4. * [Original from Linux kernel: drivers/usb/gadget/atmel_usba_udc.c]
  5. *
  6. * Copyright (C) 2005-2013 Atmel Corporation
  7. * Bo Shen <voice.shen@atmel.com>
  8. */
  9. #include <common.h>
  10. #include <linux/errno.h>
  11. #include <asm/gpio.h>
  12. #include <asm/hardware.h>
  13. #include <linux/list.h>
  14. #include <linux/usb/ch9.h>
  15. #include <linux/usb/gadget.h>
  16. #include <linux/usb/atmel_usba_udc.h>
  17. #include <malloc.h>
  18. #include <usb/lin_gadget_compat.h>
  19. #include "atmel_usba_udc.h"
  20. static int vbus_is_present(struct usba_udc *udc)
  21. {
  22. /* No Vbus detection: Assume always present */
  23. return 1;
  24. }
  25. static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
  26. {
  27. unsigned int transaction_len;
  28. transaction_len = req->req.length - req->req.actual;
  29. req->last_transaction = 1;
  30. if (transaction_len > ep->ep.maxpacket) {
  31. transaction_len = ep->ep.maxpacket;
  32. req->last_transaction = 0;
  33. } else if (transaction_len == ep->ep.maxpacket && req->req.zero) {
  34. req->last_transaction = 0;
  35. }
  36. DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
  37. ep->ep.name, req, transaction_len,
  38. req->last_transaction ? ", done" : "");
  39. memcpy(ep->fifo, req->req.buf + req->req.actual, transaction_len);
  40. usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
  41. req->req.actual += transaction_len;
  42. }
  43. static void submit_request(struct usba_ep *ep, struct usba_request *req)
  44. {
  45. DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d), dma: %d\n",
  46. ep->ep.name, req, req->req.length, req->using_dma);
  47. req->req.actual = 0;
  48. req->submitted = 1;
  49. next_fifo_transaction(ep, req);
  50. if (req->last_transaction) {
  51. usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
  52. usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
  53. } else {
  54. usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
  55. usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
  56. }
  57. }
  58. static void submit_next_request(struct usba_ep *ep)
  59. {
  60. struct usba_request *req;
  61. if (list_empty(&ep->queue)) {
  62. usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
  63. return;
  64. }
  65. req = list_entry(ep->queue.next, struct usba_request, queue);
  66. if (!req->submitted)
  67. submit_request(ep, req);
  68. }
  69. static void send_status(struct usba_udc *udc, struct usba_ep *ep)
  70. {
  71. ep->state = STATUS_STAGE_IN;
  72. usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
  73. usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
  74. }
  75. static void receive_data(struct usba_ep *ep)
  76. {
  77. struct usba_udc *udc = ep->udc;
  78. struct usba_request *req;
  79. unsigned long status;
  80. unsigned int bytecount, nr_busy;
  81. int is_complete = 0;
  82. status = usba_ep_readl(ep, STA);
  83. nr_busy = USBA_BFEXT(BUSY_BANKS, status);
  84. DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
  85. while (nr_busy > 0) {
  86. if (list_empty(&ep->queue)) {
  87. usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
  88. break;
  89. }
  90. req = list_entry(ep->queue.next,
  91. struct usba_request, queue);
  92. bytecount = USBA_BFEXT(BYTE_COUNT, status);
  93. if (status & USBA_SHORT_PACKET)
  94. is_complete = 1;
  95. if (req->req.actual + bytecount >= req->req.length) {
  96. is_complete = 1;
  97. bytecount = req->req.length - req->req.actual;
  98. }
  99. memcpy(req->req.buf + req->req.actual, ep->fifo, bytecount);
  100. req->req.actual += bytecount;
  101. usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
  102. if (is_complete) {
  103. DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
  104. req->req.status = 0;
  105. list_del_init(&req->queue);
  106. usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
  107. spin_lock(&udc->lock);
  108. req->req.complete(&ep->ep, &req->req);
  109. spin_unlock(&udc->lock);
  110. }
  111. status = usba_ep_readl(ep, STA);
  112. nr_busy = USBA_BFEXT(BUSY_BANKS, status);
  113. if (is_complete && ep_is_control(ep)) {
  114. send_status(udc, ep);
  115. break;
  116. }
  117. }
  118. }
  119. static void
  120. request_complete(struct usba_ep *ep, struct usba_request *req, int status)
  121. {
  122. if (req->req.status == -EINPROGRESS)
  123. req->req.status = status;
  124. DBG(DBG_GADGET | DBG_REQ, "%s: req %p complete: status %d, actual %u\n",
  125. ep->ep.name, req, req->req.status, req->req.actual);
  126. req->req.complete(&ep->ep, &req->req);
  127. }
  128. static void
  129. request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
  130. {
  131. struct usba_request *req, *tmp_req;
  132. list_for_each_entry_safe(req, tmp_req, list, queue) {
  133. list_del_init(&req->queue);
  134. request_complete(ep, req, status);
  135. }
  136. }
  137. static int
  138. usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
  139. {
  140. struct usba_ep *ep = to_usba_ep(_ep);
  141. struct usba_udc *udc = ep->udc;
  142. unsigned long flags = 0, ept_cfg, maxpacket;
  143. unsigned int nr_trans;
  144. DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
  145. maxpacket = usb_endpoint_maxp(desc) & 0x7ff;
  146. if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
  147. != ep->index) ||
  148. ep->index == 0 ||
  149. desc->bDescriptorType != USB_DT_ENDPOINT ||
  150. maxpacket == 0 ||
  151. maxpacket > ep->fifo_size) {
  152. DBG(DBG_ERR, "ep_enable: Invalid argument");
  153. return -EINVAL;
  154. }
  155. ep->is_isoc = 0;
  156. ep->is_in = 0;
  157. if (maxpacket <= 8)
  158. ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
  159. else
  160. /* LSB is bit 1, not 0 */
  161. ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3);
  162. DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
  163. ep->ep.name, ept_cfg, maxpacket);
  164. if (usb_endpoint_dir_in(desc)) {
  165. ep->is_in = 1;
  166. ept_cfg |= USBA_EPT_DIR_IN;
  167. }
  168. switch (usb_endpoint_type(desc)) {
  169. case USB_ENDPOINT_XFER_CONTROL:
  170. ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
  171. ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
  172. break;
  173. case USB_ENDPOINT_XFER_ISOC:
  174. if (!ep->can_isoc) {
  175. DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
  176. ep->ep.name);
  177. return -EINVAL;
  178. }
  179. /*
  180. * Bits 11:12 specify number of _additional_
  181. * transactions per microframe.
  182. */
  183. nr_trans = ((usb_endpoint_maxp(desc) >> 11) & 3) + 1;
  184. if (nr_trans > 3)
  185. return -EINVAL;
  186. ep->is_isoc = 1;
  187. ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
  188. /*
  189. * Do triple-buffering on high-bandwidth iso endpoints.
  190. */
  191. if (nr_trans > 1 && ep->nr_banks == 3)
  192. ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE);
  193. else
  194. ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
  195. ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
  196. break;
  197. case USB_ENDPOINT_XFER_BULK:
  198. ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
  199. ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
  200. break;
  201. case USB_ENDPOINT_XFER_INT:
  202. ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
  203. ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
  204. break;
  205. }
  206. spin_lock_irqsave(&ep->udc->lock, flags);
  207. ep->desc = desc;
  208. ep->ep.maxpacket = maxpacket;
  209. usba_ep_writel(ep, CFG, ept_cfg);
  210. usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
  211. usba_writel(udc, INT_ENB,
  212. (usba_readl(udc, INT_ENB)
  213. | USBA_BF(EPT_INT, 1 << ep->index)));
  214. spin_unlock_irqrestore(&udc->lock, flags);
  215. DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
  216. (unsigned long)usba_ep_readl(ep, CFG));
  217. DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
  218. (unsigned long)usba_readl(udc, INT_ENB));
  219. return 0;
  220. }
  221. static int usba_ep_disable(struct usb_ep *_ep)
  222. {
  223. struct usba_ep *ep = to_usba_ep(_ep);
  224. struct usba_udc *udc = ep->udc;
  225. LIST_HEAD(req_list);
  226. unsigned long flags = 0;
  227. DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
  228. spin_lock_irqsave(&udc->lock, flags);
  229. if (!ep->desc) {
  230. spin_unlock_irqrestore(&udc->lock, flags);
  231. /* REVISIT because this driver disables endpoints in
  232. * reset_all_endpoints() before calling disconnect(),
  233. * most gadget drivers would trigger this non-error ...
  234. */
  235. if (udc->gadget.speed != USB_SPEED_UNKNOWN)
  236. DBG(DBG_ERR, "ep_disable: %s not enabled\n",
  237. ep->ep.name);
  238. return -EINVAL;
  239. }
  240. ep->desc = NULL;
  241. list_splice_init(&ep->queue, &req_list);
  242. usba_ep_writel(ep, CFG, 0);
  243. usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
  244. usba_writel(udc, INT_ENB,
  245. usba_readl(udc, INT_ENB) &
  246. ~USBA_BF(EPT_INT, 1 << ep->index));
  247. request_complete_list(ep, &req_list, -ESHUTDOWN);
  248. spin_unlock_irqrestore(&udc->lock, flags);
  249. return 0;
  250. }
  251. static struct usb_request *
  252. usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
  253. {
  254. struct usba_request *req;
  255. DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
  256. req = calloc(1, sizeof(struct usba_request));
  257. if (!req)
  258. return NULL;
  259. INIT_LIST_HEAD(&req->queue);
  260. return &req->req;
  261. }
  262. static void
  263. usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
  264. {
  265. struct usba_request *req = to_usba_req(_req);
  266. DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
  267. free(req);
  268. }
  269. static int
  270. usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
  271. {
  272. struct usba_request *req = to_usba_req(_req);
  273. struct usba_ep *ep = to_usba_ep(_ep);
  274. struct usba_udc *udc = ep->udc;
  275. unsigned long flags = 0;
  276. int ret;
  277. DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
  278. ep->ep.name, req, _req->length);
  279. if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN ||
  280. !ep->desc)
  281. return -ESHUTDOWN;
  282. req->submitted = 0;
  283. req->using_dma = 0;
  284. req->last_transaction = 0;
  285. _req->status = -EINPROGRESS;
  286. _req->actual = 0;
  287. /* May have received a reset since last time we checked */
  288. ret = -ESHUTDOWN;
  289. spin_lock_irqsave(&udc->lock, flags);
  290. if (ep->desc) {
  291. list_add_tail(&req->queue, &ep->queue);
  292. if ((!ep_is_control(ep) && ep->is_in) ||
  293. (ep_is_control(ep) && (ep->state == DATA_STAGE_IN ||
  294. ep->state == STATUS_STAGE_IN)))
  295. usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
  296. else
  297. usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
  298. ret = 0;
  299. }
  300. spin_unlock_irqrestore(&udc->lock, flags);
  301. return ret;
  302. }
  303. static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  304. {
  305. struct usba_ep *ep = to_usba_ep(_ep);
  306. struct usba_request *req = to_usba_req(_req);
  307. DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
  308. ep->ep.name, req);
  309. /*
  310. * Errors should stop the queue from advancing until the
  311. * completion function returns.
  312. */
  313. list_del_init(&req->queue);
  314. request_complete(ep, req, -ECONNRESET);
  315. /* Process the next request if any */
  316. submit_next_request(ep);
  317. return 0;
  318. }
  319. static int usba_ep_set_halt(struct usb_ep *_ep, int value)
  320. {
  321. struct usba_ep *ep = to_usba_ep(_ep);
  322. unsigned long flags = 0;
  323. int ret = 0;
  324. DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
  325. value ? "set" : "clear");
  326. if (!ep->desc) {
  327. DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
  328. ep->ep.name);
  329. return -ENODEV;
  330. }
  331. if (ep->is_isoc) {
  332. DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
  333. ep->ep.name);
  334. return -ENOTTY;
  335. }
  336. spin_lock_irqsave(&udc->lock, flags);
  337. /*
  338. * We can't halt IN endpoints while there are still data to be
  339. * transferred
  340. */
  341. if (!list_empty(&ep->queue) ||
  342. ((value && ep->is_in && (usba_ep_readl(ep, STA) &
  343. USBA_BF(BUSY_BANKS, -1L))))) {
  344. ret = -EAGAIN;
  345. } else {
  346. if (value)
  347. usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
  348. else
  349. usba_ep_writel(ep, CLR_STA,
  350. USBA_FORCE_STALL | USBA_TOGGLE_CLR);
  351. usba_ep_readl(ep, STA);
  352. }
  353. spin_unlock_irqrestore(&udc->lock, flags);
  354. return ret;
  355. }
  356. static int usba_ep_fifo_status(struct usb_ep *_ep)
  357. {
  358. struct usba_ep *ep = to_usba_ep(_ep);
  359. return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
  360. }
  361. static void usba_ep_fifo_flush(struct usb_ep *_ep)
  362. {
  363. struct usba_ep *ep = to_usba_ep(_ep);
  364. struct usba_udc *udc = ep->udc;
  365. usba_writel(udc, EPT_RST, 1 << ep->index);
  366. }
  367. static const struct usb_ep_ops usba_ep_ops = {
  368. .enable = usba_ep_enable,
  369. .disable = usba_ep_disable,
  370. .alloc_request = usba_ep_alloc_request,
  371. .free_request = usba_ep_free_request,
  372. .queue = usba_ep_queue,
  373. .dequeue = usba_ep_dequeue,
  374. .set_halt = usba_ep_set_halt,
  375. .fifo_status = usba_ep_fifo_status,
  376. .fifo_flush = usba_ep_fifo_flush,
  377. };
  378. static int usba_udc_get_frame(struct usb_gadget *gadget)
  379. {
  380. struct usba_udc *udc = to_usba_udc(gadget);
  381. return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
  382. }
  383. static int usba_udc_wakeup(struct usb_gadget *gadget)
  384. {
  385. struct usba_udc *udc = to_usba_udc(gadget);
  386. unsigned long flags = 0;
  387. u32 ctrl;
  388. int ret = -EINVAL;
  389. spin_lock_irqsave(&udc->lock, flags);
  390. if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) {
  391. ctrl = usba_readl(udc, CTRL);
  392. usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
  393. ret = 0;
  394. }
  395. spin_unlock_irqrestore(&udc->lock, flags);
  396. return ret;
  397. }
  398. static int
  399. usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
  400. {
  401. struct usba_udc *udc = to_usba_udc(gadget);
  402. unsigned long flags = 0;
  403. spin_lock_irqsave(&udc->lock, flags);
  404. if (is_selfpowered)
  405. udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
  406. else
  407. udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
  408. spin_unlock_irqrestore(&udc->lock, flags);
  409. return 0;
  410. }
  411. static const struct usb_gadget_ops usba_udc_ops = {
  412. .get_frame = usba_udc_get_frame,
  413. .wakeup = usba_udc_wakeup,
  414. .set_selfpowered = usba_udc_set_selfpowered,
  415. };
  416. static struct usb_endpoint_descriptor usba_ep0_desc = {
  417. .bLength = USB_DT_ENDPOINT_SIZE,
  418. .bDescriptorType = USB_DT_ENDPOINT,
  419. .bEndpointAddress = 0,
  420. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  421. .wMaxPacketSize = cpu_to_le16(64),
  422. /* FIXME: I have no idea what to put here */
  423. .bInterval = 1,
  424. };
  425. /*
  426. * Called with interrupts disabled and udc->lock held.
  427. */
  428. static void reset_all_endpoints(struct usba_udc *udc)
  429. {
  430. struct usba_ep *ep;
  431. struct usba_request *req, *tmp_req;
  432. usba_writel(udc, EPT_RST, ~0UL);
  433. ep = to_usba_ep(udc->gadget.ep0);
  434. list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
  435. list_del_init(&req->queue);
  436. request_complete(ep, req, -ECONNRESET);
  437. }
  438. /* NOTE: normally, the next call to the gadget driver is in
  439. * charge of disabling endpoints... usually disconnect().
  440. * The exception would be entering a high speed test mode.
  441. *
  442. * FIXME remove this code ... and retest thoroughly.
  443. */
  444. list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
  445. if (ep->desc) {
  446. spin_unlock(&udc->lock);
  447. usba_ep_disable(&ep->ep);
  448. spin_lock(&udc->lock);
  449. }
  450. }
  451. }
  452. static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
  453. {
  454. struct usba_ep *ep;
  455. if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
  456. return to_usba_ep(udc->gadget.ep0);
  457. list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
  458. u8 bEndpointAddress;
  459. if (!ep->desc)
  460. continue;
  461. bEndpointAddress = ep->desc->bEndpointAddress;
  462. if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
  463. continue;
  464. if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
  465. == (wIndex & USB_ENDPOINT_NUMBER_MASK))
  466. return ep;
  467. }
  468. return NULL;
  469. }
  470. /* Called with interrupts disabled and udc->lock held */
  471. static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
  472. {
  473. usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
  474. ep->state = WAIT_FOR_SETUP;
  475. }
  476. static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
  477. {
  478. if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
  479. return 1;
  480. return 0;
  481. }
  482. static inline void set_address(struct usba_udc *udc, unsigned int addr)
  483. {
  484. u32 regval;
  485. DBG(DBG_BUS, "setting address %u...\n", addr);
  486. regval = usba_readl(udc, CTRL);
  487. regval = USBA_BFINS(DEV_ADDR, addr, regval);
  488. usba_writel(udc, CTRL, regval);
  489. }
  490. static int do_test_mode(struct usba_udc *udc)
  491. {
  492. static const char test_packet_buffer[] = {
  493. /* JKJKJKJK * 9 */
  494. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  495. /* JJKKJJKK * 8 */
  496. 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
  497. /* JJKKJJKK * 8 */
  498. 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
  499. /* JJJJJJJKKKKKKK * 8 */
  500. 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
  501. 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
  502. /* JJJJJJJK * 8 */
  503. 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
  504. /* {JKKKKKKK * 10}, JK */
  505. 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
  506. };
  507. struct usba_ep *ep;
  508. int test_mode;
  509. test_mode = udc->test_mode;
  510. /* Start from a clean slate */
  511. reset_all_endpoints(udc);
  512. switch (test_mode) {
  513. case 0x0100:
  514. /* Test_J */
  515. usba_writel(udc, TST, USBA_TST_J_MODE);
  516. DBG(DBG_ALL, "Entering Test_J mode...\n");
  517. break;
  518. case 0x0200:
  519. /* Test_K */
  520. usba_writel(udc, TST, USBA_TST_K_MODE);
  521. DBG(DBG_ALL, "Entering Test_K mode...\n");
  522. break;
  523. case 0x0300:
  524. /*
  525. * Test_SE0_NAK: Force high-speed mode and set up ep0
  526. * for Bulk IN transfers
  527. */
  528. ep = &udc->usba_ep[0];
  529. usba_writel(udc, TST,
  530. USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
  531. usba_ep_writel(ep, CFG,
  532. USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
  533. | USBA_EPT_DIR_IN
  534. | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
  535. | USBA_BF(BK_NUMBER, 1));
  536. if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
  537. set_protocol_stall(udc, ep);
  538. DBG(DBG_ALL, "Test_SE0_NAK: ep0 not mapped\n");
  539. } else {
  540. usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
  541. DBG(DBG_ALL, "Entering Test_SE0_NAK mode...\n");
  542. }
  543. break;
  544. case 0x0400:
  545. /* Test_Packet */
  546. ep = &udc->usba_ep[0];
  547. usba_ep_writel(ep, CFG,
  548. USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
  549. | USBA_EPT_DIR_IN
  550. | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
  551. | USBA_BF(BK_NUMBER, 1));
  552. if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
  553. set_protocol_stall(udc, ep);
  554. DBG(DBG_ALL, "Test_Packet: ep0 not mapped\n");
  555. } else {
  556. usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
  557. usba_writel(udc, TST, USBA_TST_PKT_MODE);
  558. memcpy(ep->fifo, test_packet_buffer,
  559. sizeof(test_packet_buffer));
  560. usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
  561. DBG(DBG_ALL, "Entering Test_Packet mode...\n");
  562. }
  563. break;
  564. default:
  565. DBG(DBG_ERR, "Invalid test mode: 0x%04x\n", test_mode);
  566. return -EINVAL;
  567. }
  568. return 0;
  569. }
  570. /* Avoid overly long expressions */
  571. static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
  572. {
  573. if (crq->wValue == cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
  574. return true;
  575. return false;
  576. }
  577. static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
  578. {
  579. if (crq->wValue == cpu_to_le16(USB_DEVICE_TEST_MODE))
  580. return true;
  581. return false;
  582. }
  583. static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
  584. {
  585. if (crq->wValue == cpu_to_le16(USB_ENDPOINT_HALT))
  586. return true;
  587. return false;
  588. }
  589. static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
  590. struct usb_ctrlrequest *crq)
  591. {
  592. int retval = 0;
  593. switch (crq->bRequest) {
  594. case USB_REQ_GET_STATUS: {
  595. u16 status;
  596. if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
  597. status = cpu_to_le16(udc->devstatus);
  598. } else if (crq->bRequestType
  599. == (USB_DIR_IN | USB_RECIP_INTERFACE)) {
  600. status = cpu_to_le16(0);
  601. } else if (crq->bRequestType
  602. == (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
  603. struct usba_ep *target;
  604. target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
  605. if (!target)
  606. goto stall;
  607. status = 0;
  608. if (is_stalled(udc, target))
  609. status |= cpu_to_le16(1);
  610. } else {
  611. goto delegate;
  612. }
  613. /* Write directly to the FIFO. No queueing is done. */
  614. if (crq->wLength != cpu_to_le16(sizeof(status)))
  615. goto stall;
  616. ep->state = DATA_STAGE_IN;
  617. __raw_writew(status, ep->fifo);
  618. usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
  619. break;
  620. }
  621. case USB_REQ_CLEAR_FEATURE: {
  622. if (crq->bRequestType == USB_RECIP_DEVICE) {
  623. if (feature_is_dev_remote_wakeup(crq))
  624. udc->devstatus
  625. &= ~(1 << USB_DEVICE_REMOTE_WAKEUP);
  626. else
  627. /* Can't CLEAR_FEATURE TEST_MODE */
  628. goto stall;
  629. } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
  630. struct usba_ep *target;
  631. if (crq->wLength != cpu_to_le16(0) ||
  632. !feature_is_ep_halt(crq))
  633. goto stall;
  634. target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
  635. if (!target)
  636. goto stall;
  637. usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
  638. if (target->index != 0)
  639. usba_ep_writel(target, CLR_STA,
  640. USBA_TOGGLE_CLR);
  641. } else {
  642. goto delegate;
  643. }
  644. send_status(udc, ep);
  645. break;
  646. }
  647. case USB_REQ_SET_FEATURE: {
  648. if (crq->bRequestType == USB_RECIP_DEVICE) {
  649. if (feature_is_dev_test_mode(crq)) {
  650. send_status(udc, ep);
  651. ep->state = STATUS_STAGE_TEST;
  652. udc->test_mode = le16_to_cpu(crq->wIndex);
  653. return 0;
  654. } else if (feature_is_dev_remote_wakeup(crq)) {
  655. udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP;
  656. } else {
  657. goto stall;
  658. }
  659. } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
  660. struct usba_ep *target;
  661. if (crq->wLength != cpu_to_le16(0) ||
  662. !feature_is_ep_halt(crq))
  663. goto stall;
  664. target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
  665. if (!target)
  666. goto stall;
  667. usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
  668. } else {
  669. goto delegate;
  670. }
  671. send_status(udc, ep);
  672. break;
  673. }
  674. case USB_REQ_SET_ADDRESS:
  675. if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
  676. goto delegate;
  677. set_address(udc, le16_to_cpu(crq->wValue));
  678. send_status(udc, ep);
  679. ep->state = STATUS_STAGE_ADDR;
  680. break;
  681. default:
  682. delegate:
  683. spin_unlock(&udc->lock);
  684. retval = udc->driver->setup(&udc->gadget, crq);
  685. spin_lock(&udc->lock);
  686. }
  687. return retval;
  688. stall:
  689. DBG(DBG_ALL, "%s: Invalid setup request: %02x.%02x v%04x i%04x l%d\n",
  690. ep->ep.name, crq->bRequestType, crq->bRequest,
  691. le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
  692. le16_to_cpu(crq->wLength));
  693. set_protocol_stall(udc, ep);
  694. return -1;
  695. }
  696. static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
  697. {
  698. struct usba_request *req;
  699. u32 epstatus;
  700. u32 epctrl;
  701. restart:
  702. epstatus = usba_ep_readl(ep, STA);
  703. epctrl = usba_ep_readl(ep, CTL);
  704. DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
  705. ep->ep.name, ep->state, epstatus, epctrl);
  706. req = NULL;
  707. if (!list_empty(&ep->queue))
  708. req = list_entry(ep->queue.next,
  709. struct usba_request, queue);
  710. if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
  711. if (req->submitted)
  712. next_fifo_transaction(ep, req);
  713. else
  714. submit_request(ep, req);
  715. if (req->last_transaction) {
  716. usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
  717. usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
  718. }
  719. goto restart;
  720. }
  721. if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
  722. usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
  723. switch (ep->state) {
  724. case DATA_STAGE_IN:
  725. usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
  726. usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
  727. ep->state = STATUS_STAGE_OUT;
  728. break;
  729. case STATUS_STAGE_ADDR:
  730. /* Activate our new address */
  731. usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
  732. | USBA_FADDR_EN));
  733. usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
  734. ep->state = WAIT_FOR_SETUP;
  735. break;
  736. case STATUS_STAGE_IN:
  737. if (req) {
  738. list_del_init(&req->queue);
  739. request_complete(ep, req, 0);
  740. submit_next_request(ep);
  741. }
  742. usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
  743. ep->state = WAIT_FOR_SETUP;
  744. break;
  745. case STATUS_STAGE_TEST:
  746. usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
  747. ep->state = WAIT_FOR_SETUP;
  748. if (do_test_mode(udc))
  749. set_protocol_stall(udc, ep);
  750. break;
  751. default:
  752. DBG(DBG_ALL, "%s: TXCOMP: Invalid endpoint state %d\n",
  753. ep->ep.name, ep->state);
  754. set_protocol_stall(udc, ep);
  755. break;
  756. }
  757. goto restart;
  758. }
  759. if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
  760. switch (ep->state) {
  761. case STATUS_STAGE_OUT:
  762. usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
  763. usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
  764. if (req) {
  765. list_del_init(&req->queue);
  766. request_complete(ep, req, 0);
  767. }
  768. ep->state = WAIT_FOR_SETUP;
  769. break;
  770. case DATA_STAGE_OUT:
  771. receive_data(ep);
  772. break;
  773. default:
  774. usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
  775. usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
  776. DBG(DBG_ALL, "%s: RXRDY: Invalid endpoint state %d\n",
  777. ep->ep.name, ep->state);
  778. set_protocol_stall(udc, ep);
  779. break;
  780. }
  781. goto restart;
  782. }
  783. if (epstatus & USBA_RX_SETUP) {
  784. union {
  785. struct usb_ctrlrequest crq;
  786. unsigned long data[2];
  787. } crq;
  788. unsigned int pkt_len;
  789. int ret;
  790. if (ep->state != WAIT_FOR_SETUP) {
  791. /*
  792. * Didn't expect a SETUP packet at this
  793. * point. Clean up any pending requests (which
  794. * may be successful).
  795. */
  796. int status = -EPROTO;
  797. /*
  798. * RXRDY and TXCOMP are dropped when SETUP
  799. * packets arrive. Just pretend we received
  800. * the status packet.
  801. */
  802. if (ep->state == STATUS_STAGE_OUT ||
  803. ep->state == STATUS_STAGE_IN) {
  804. usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
  805. status = 0;
  806. }
  807. if (req) {
  808. list_del_init(&req->queue);
  809. request_complete(ep, req, status);
  810. }
  811. }
  812. pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
  813. DBG(DBG_HW, "Packet length: %u\n", pkt_len);
  814. if (pkt_len != sizeof(crq)) {
  815. DBG(DBG_ALL, "udc: Invalid length %u (expected %zu)\n",
  816. pkt_len, sizeof(crq));
  817. set_protocol_stall(udc, ep);
  818. return;
  819. }
  820. DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
  821. memcpy(crq.data, ep->fifo, sizeof(crq));
  822. /* Free up one bank in the FIFO so that we can
  823. * generate or receive a reply right away. */
  824. usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
  825. if (crq.crq.bRequestType & USB_DIR_IN) {
  826. /*
  827. * The USB 2.0 spec states that "if wLength is
  828. * zero, there is no data transfer phase."
  829. * However, testusb #14 seems to actually
  830. * expect a data phase even if wLength = 0...
  831. */
  832. ep->state = DATA_STAGE_IN;
  833. } else {
  834. if (crq.crq.wLength != cpu_to_le16(0))
  835. ep->state = DATA_STAGE_OUT;
  836. else
  837. ep->state = STATUS_STAGE_IN;
  838. }
  839. ret = -1;
  840. if (ep->index == 0) {
  841. ret = handle_ep0_setup(udc, ep, &crq.crq);
  842. } else {
  843. spin_unlock(&udc->lock);
  844. ret = udc->driver->setup(&udc->gadget, &crq.crq);
  845. spin_lock(&udc->lock);
  846. }
  847. DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
  848. crq.crq.bRequestType, crq.crq.bRequest,
  849. le16_to_cpu(crq.crq.wLength), ep->state, ret);
  850. if (ret < 0) {
  851. /* Let the host know that we failed */
  852. set_protocol_stall(udc, ep);
  853. }
  854. }
  855. }
  856. static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
  857. {
  858. struct usba_request *req;
  859. u32 epstatus;
  860. u32 epctrl;
  861. epstatus = usba_ep_readl(ep, STA);
  862. epctrl = usba_ep_readl(ep, CTL);
  863. DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
  864. while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
  865. DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
  866. if (list_empty(&ep->queue)) {
  867. DBG(DBG_INT, "ep_irq: queue empty\n");
  868. usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
  869. return;
  870. }
  871. req = list_entry(ep->queue.next, struct usba_request, queue);
  872. if (req->submitted)
  873. next_fifo_transaction(ep, req);
  874. else
  875. submit_request(ep, req);
  876. if (req->last_transaction) {
  877. list_del_init(&req->queue);
  878. submit_next_request(ep);
  879. request_complete(ep, req, 0);
  880. }
  881. epstatus = usba_ep_readl(ep, STA);
  882. epctrl = usba_ep_readl(ep, CTL);
  883. }
  884. if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
  885. DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
  886. receive_data(ep);
  887. }
  888. }
  889. static int usba_udc_irq(struct usba_udc *udc)
  890. {
  891. u32 status, ep_status;
  892. spin_lock(&udc->lock);
  893. status = usba_readl(udc, INT_STA);
  894. DBG(DBG_INT, "irq, status=%#08x\n", status);
  895. if (status & USBA_DET_SUSPEND) {
  896. usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
  897. DBG(DBG_BUS, "Suspend detected\n");
  898. if (udc->gadget.speed != USB_SPEED_UNKNOWN &&
  899. udc->driver && udc->driver->suspend) {
  900. spin_unlock(&udc->lock);
  901. udc->driver->suspend(&udc->gadget);
  902. spin_lock(&udc->lock);
  903. }
  904. }
  905. if (status & USBA_WAKE_UP) {
  906. usba_writel(udc, INT_CLR, USBA_WAKE_UP);
  907. DBG(DBG_BUS, "Wake Up CPU detected\n");
  908. }
  909. if (status & USBA_END_OF_RESUME) {
  910. usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
  911. DBG(DBG_BUS, "Resume detected\n");
  912. if (udc->gadget.speed != USB_SPEED_UNKNOWN &&
  913. udc->driver && udc->driver->resume) {
  914. spin_unlock(&udc->lock);
  915. udc->driver->resume(&udc->gadget);
  916. spin_lock(&udc->lock);
  917. }
  918. }
  919. ep_status = USBA_BFEXT(EPT_INT, status);
  920. if (ep_status) {
  921. int i;
  922. for (i = 0; i < USBA_NR_ENDPOINTS; i++)
  923. if (ep_status & (1 << i)) {
  924. if (ep_is_control(&udc->usba_ep[i]))
  925. usba_control_irq(udc, &udc->usba_ep[i]);
  926. else
  927. usba_ep_irq(udc, &udc->usba_ep[i]);
  928. }
  929. }
  930. if (status & USBA_END_OF_RESET) {
  931. struct usba_ep *ep0;
  932. usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
  933. reset_all_endpoints(udc);
  934. if (udc->gadget.speed != USB_SPEED_UNKNOWN &&
  935. udc->driver->disconnect) {
  936. udc->gadget.speed = USB_SPEED_UNKNOWN;
  937. spin_unlock(&udc->lock);
  938. udc->driver->disconnect(&udc->gadget);
  939. spin_lock(&udc->lock);
  940. }
  941. if (status & USBA_HIGH_SPEED)
  942. udc->gadget.speed = USB_SPEED_HIGH;
  943. else
  944. udc->gadget.speed = USB_SPEED_FULL;
  945. ep0 = &udc->usba_ep[0];
  946. ep0->desc = &usba_ep0_desc;
  947. ep0->state = WAIT_FOR_SETUP;
  948. usba_ep_writel(ep0, CFG,
  949. (USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
  950. | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
  951. | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
  952. usba_ep_writel(ep0, CTL_ENB,
  953. USBA_EPT_ENABLE | USBA_RX_SETUP);
  954. usba_writel(udc, INT_ENB,
  955. (usba_readl(udc, INT_ENB)
  956. | USBA_BF(EPT_INT, 1)
  957. | USBA_DET_SUSPEND
  958. | USBA_END_OF_RESUME));
  959. /*
  960. * Unclear why we hit this irregularly, e.g. in usbtest,
  961. * but it's clearly harmless...
  962. */
  963. if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
  964. DBG(DBG_ALL, "ODD: EP0 configuration is invalid!\n");
  965. }
  966. spin_unlock(&udc->lock);
  967. return 0;
  968. }
  969. static int atmel_usba_start(struct usba_udc *udc)
  970. {
  971. udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
  972. udc->vbus_prev = 0;
  973. /* If Vbus is present, enable the controller and wait for reset */
  974. if (vbus_is_present(udc) && udc->vbus_prev == 0) {
  975. usba_writel(udc, CTRL, USBA_ENABLE_MASK);
  976. usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
  977. }
  978. return 0;
  979. }
  980. static int atmel_usba_stop(struct usba_udc *udc)
  981. {
  982. udc->gadget.speed = USB_SPEED_UNKNOWN;
  983. reset_all_endpoints(udc);
  984. /* This will also disable the DP pullup */
  985. usba_writel(udc, CTRL, USBA_DISABLE_MASK);
  986. return 0;
  987. }
  988. static struct usba_udc controller = {
  989. .regs = (unsigned *)ATMEL_BASE_UDPHS,
  990. .fifo = (unsigned *)ATMEL_BASE_UDPHS_FIFO,
  991. .gadget = {
  992. .ops = &usba_udc_ops,
  993. .ep_list = LIST_HEAD_INIT(controller.gadget.ep_list),
  994. .speed = USB_SPEED_HIGH,
  995. .is_dualspeed = 1,
  996. .name = "atmel_usba_udc",
  997. },
  998. };
  999. int usb_gadget_handle_interrupts(int index)
  1000. {
  1001. struct usba_udc *udc = &controller;
  1002. return usba_udc_irq(udc);
  1003. }
  1004. int usb_gadget_register_driver(struct usb_gadget_driver *driver)
  1005. {
  1006. struct usba_udc *udc = &controller;
  1007. int ret;
  1008. if (!driver || !driver->bind || !driver->setup) {
  1009. printf("bad paramter\n");
  1010. return -EINVAL;
  1011. }
  1012. if (udc->driver) {
  1013. printf("UDC already has a gadget driver\n");
  1014. return -EBUSY;
  1015. }
  1016. atmel_usba_start(udc);
  1017. udc->driver = driver;
  1018. ret = driver->bind(&udc->gadget);
  1019. if (ret) {
  1020. pr_err("driver->bind() returned %d\n", ret);
  1021. udc->driver = NULL;
  1022. }
  1023. return ret;
  1024. }
  1025. int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
  1026. {
  1027. struct usba_udc *udc = &controller;
  1028. if (!driver || !driver->unbind || !driver->disconnect) {
  1029. pr_err("bad paramter\n");
  1030. return -EINVAL;
  1031. }
  1032. driver->disconnect(&udc->gadget);
  1033. driver->unbind(&udc->gadget);
  1034. udc->driver = NULL;
  1035. atmel_usba_stop(udc);
  1036. return 0;
  1037. }
  1038. static struct usba_ep *usba_udc_pdata(struct usba_platform_data *pdata,
  1039. struct usba_udc *udc)
  1040. {
  1041. struct usba_ep *eps;
  1042. int i;
  1043. eps = malloc(sizeof(struct usba_ep) * pdata->num_ep);
  1044. if (!eps) {
  1045. pr_err("failed to alloc eps\n");
  1046. return NULL;
  1047. }
  1048. udc->gadget.ep0 = &eps[0].ep;
  1049. INIT_LIST_HEAD(&udc->gadget.ep_list);
  1050. INIT_LIST_HEAD(&eps[0].ep.ep_list);
  1051. for (i = 0; i < pdata->num_ep; i++) {
  1052. struct usba_ep *ep = &eps[i];
  1053. ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
  1054. ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
  1055. ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
  1056. ep->ep.ops = &usba_ep_ops;
  1057. ep->ep.name = pdata->ep[i].name;
  1058. ep->ep.maxpacket = pdata->ep[i].fifo_size;
  1059. ep->fifo_size = ep->ep.maxpacket;
  1060. ep->udc = udc;
  1061. INIT_LIST_HEAD(&ep->queue);
  1062. ep->nr_banks = pdata->ep[i].nr_banks;
  1063. ep->index = pdata->ep[i].index;
  1064. ep->can_dma = pdata->ep[i].can_dma;
  1065. ep->can_isoc = pdata->ep[i].can_isoc;
  1066. if (i)
  1067. list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
  1068. };
  1069. return eps;
  1070. }
  1071. int usba_udc_probe(struct usba_platform_data *pdata)
  1072. {
  1073. struct usba_udc *udc;
  1074. udc = &controller;
  1075. udc->usba_ep = usba_udc_pdata(pdata, udc);
  1076. return 0;
  1077. }