cyrus.c 2.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Based on corenet_ds.c
  4. */
  5. #include <common.h>
  6. #include <command.h>
  7. #include <netdev.h>
  8. #include <linux/compiler.h>
  9. #include <asm/mmu.h>
  10. #include <asm/processor.h>
  11. #include <asm/cache.h>
  12. #include <asm/immap_85xx.h>
  13. #include <asm/fsl_law.h>
  14. #include <asm/fsl_serdes.h>
  15. #include <asm/fsl_portals.h>
  16. #include <asm/fsl_liodn.h>
  17. #include <fm_eth.h>
  18. #include <pci.h>
  19. #include "cyrus.h"
  20. #include "../common/eeprom.h"
  21. #define GPIO_OPENDRAIN 0x30000000
  22. #define GPIO_DIR 0x3c000004
  23. #define GPIO_INITIAL 0x30000000
  24. #define GPIO_VGA_SWITCH 0x00001000
  25. int checkboard(void)
  26. {
  27. printf("Board: CYRUS\n");
  28. return 0;
  29. }
  30. int board_early_init_f(void)
  31. {
  32. ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  33. ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
  34. /*
  35. * Only use DDR1_MCK0/3 and DDR2_MCK0/3
  36. * disable DDR1_MCK1/2/4/5 and DDR2_MCK1/2/4/5 to reduce
  37. * the noise introduced by these unterminated and unused clock pairs.
  38. */
  39. setbits_be32(&gur->ddrclkdr, 0x001B001B);
  40. /* Set GPIO reset lines to open-drain, tristate */
  41. setbits_be32(&pgpio->gpdat, GPIO_INITIAL);
  42. setbits_be32(&pgpio->gpodr, GPIO_OPENDRAIN);
  43. /* Set GPIO Direction */
  44. setbits_be32(&pgpio->gpdir, GPIO_DIR);
  45. return 0;
  46. }
  47. int board_early_init_r(void)
  48. {
  49. fsl_lbc_t *lbc = LBC_BASE_ADDR;
  50. out_be32(&lbc->lbcr, 0);
  51. /* 1 clock LALE cycle */
  52. out_be32(&lbc->lcrr, 0x80000000 | CONFIG_SYS_LBC_LCRR);
  53. set_liodns();
  54. #ifdef CONFIG_SYS_DPAA_QBMAN
  55. setup_qbman_portals();
  56. #endif
  57. print_lbc_regs();
  58. return 0;
  59. }
  60. int misc_init_r(void)
  61. {
  62. return 0;
  63. }
  64. int ft_board_setup(void *blob, bd_t *bd)
  65. {
  66. phys_addr_t base;
  67. phys_size_t size;
  68. ft_cpu_setup(blob, bd);
  69. base = env_get_bootm_low();
  70. size = env_get_bootm_size();
  71. fdt_fixup_memory(blob, (u64)base, (u64)size);
  72. #ifdef CONFIG_PCI
  73. pci_of_setup(blob, bd);
  74. #endif
  75. fdt_fixup_liodn(blob);
  76. fsl_fdt_fixup_dr_usb(blob, bd);
  77. #ifdef CONFIG_SYS_DPAA_FMAN
  78. fdt_fixup_fman_ethernet(blob);
  79. #endif
  80. return 0;
  81. }
  82. int mac_read_from_eeprom(void)
  83. {
  84. init_eeprom(CONFIG_SYS_EEPROM_BUS_NUM,
  85. CONFIG_SYS_I2C_EEPROM_ADDR,
  86. CONFIG_SYS_I2C_EEPROM_ADDR_LEN);
  87. return mac_read_from_eeprom_common();
  88. }