interrupt.h 1.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2009
  4. * Graeme Russ, graeme.russ@gmail.com
  5. *
  6. * (C) Copyright 2002
  7. * Daniel Engström, Omicron Ceti AB, daniel@omicron.se
  8. */
  9. #ifndef __ASM_INTERRUPT_H_
  10. #define __ASM_INTERRUPT_H_ 1
  11. #include <asm/types.h>
  12. #define SYS_NUM_IRQS 16
  13. /* Architecture defined exceptions */
  14. enum x86_exception {
  15. EXC_DE = 0,
  16. EXC_DB,
  17. EXC_NMI,
  18. EXC_BP,
  19. EXC_OF,
  20. EXC_BR,
  21. EXC_UD,
  22. EXC_NM,
  23. EXC_DF,
  24. EXC_CSO,
  25. EXC_TS,
  26. EXC_NP,
  27. EXC_SS,
  28. EXC_GP,
  29. EXC_PF,
  30. EXC_MF = 16,
  31. EXC_AC,
  32. EXC_MC,
  33. EXC_XM,
  34. EXC_VE
  35. };
  36. /* arch/x86/cpu/interrupts.c */
  37. void set_vector(u8 intnum, void *routine);
  38. /* Architecture specific functions */
  39. void mask_irq(int irq);
  40. void unmask_irq(int irq);
  41. void specific_eoi(int irq);
  42. extern char exception_stack[];
  43. /**
  44. * configure_irq_trigger() - Configure IRQ triggering
  45. *
  46. * Switch the given interrupt to be level / edge triggered
  47. *
  48. * @param int_num legacy interrupt number (3-7, 9-15)
  49. * @param is_level_triggered true for level triggered interrupt, false for
  50. * edge triggered interrupt
  51. */
  52. void configure_irq_trigger(int int_num, bool is_level_triggered);
  53. void *x86_get_idt(void);
  54. #endif