p1023.c 1.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2011 Freescale Semiconductor, Inc.
  4. */
  5. #include <common.h>
  6. #include <phy.h>
  7. #include <fm_eth.h>
  8. #include <asm/io.h>
  9. #include <asm/immap_85xx.h>
  10. #include <asm/fsl_serdes.h>
  11. static u32 port_to_devdisr[] = {
  12. [FM1_DTSEC1] = MPC85xx_DEVDISR_TSEC1,
  13. [FM1_DTSEC2] = MPC85xx_DEVDISR_TSEC2,
  14. };
  15. static int is_device_disabled(enum fm_port port)
  16. {
  17. ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  18. u32 devdisr = in_be32(&gur->devdisr);
  19. return port_to_devdisr[port] & devdisr;
  20. }
  21. void fman_disable_port(enum fm_port port)
  22. {
  23. ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  24. /* don't allow disabling of DTSEC1 as its needed for MDIO */
  25. if (port == FM1_DTSEC1)
  26. return;
  27. setbits_be32(&gur->devdisr, port_to_devdisr[port]);
  28. }
  29. void fman_enable_port(enum fm_port port)
  30. {
  31. ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  32. clrbits_be32(&gur->devdisr, port_to_devdisr[port]);
  33. }
  34. phy_interface_t fman_port_enet_if(enum fm_port port)
  35. {
  36. ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  37. u32 pordevsr = in_be32(&gur->pordevsr);
  38. if (is_device_disabled(port))
  39. return PHY_INTERFACE_MODE_NONE;
  40. /* DTSEC1 can be SGMII, RGMII or RMII */
  41. if (port == FM1_DTSEC1) {
  42. if (is_serdes_configured(SGMII_FM1_DTSEC1))
  43. return PHY_INTERFACE_MODE_SGMII;
  44. if (pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS) {
  45. if (pordevsr & MPC85xx_PORDEVSR_TSEC1_PRTC)
  46. return PHY_INTERFACE_MODE_RGMII;
  47. else
  48. return PHY_INTERFACE_MODE_RMII;
  49. }
  50. }
  51. /* DTSEC2 only supports SGMII or RGMII */
  52. if (port == FM1_DTSEC2) {
  53. if (is_serdes_configured(SGMII_FM1_DTSEC2))
  54. return PHY_INTERFACE_MODE_SGMII;
  55. if (pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS)
  56. return PHY_INTERFACE_MODE_RGMII;
  57. }
  58. return PHY_INTERFACE_MODE_NONE;
  59. }