s2mps11_regulator.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2018 Samsung Electronics
  4. * Jaehoon Chung <jh80.chung@samsung.com>
  5. */
  6. #include <common.h>
  7. #include <fdtdec.h>
  8. #include <errno.h>
  9. #include <dm.h>
  10. #include <i2c.h>
  11. #include <power/pmic.h>
  12. #include <power/regulator.h>
  13. #include <power/s2mps11.h>
  14. #define MODE(_id, _val, _name) { \
  15. .id = _id, \
  16. .register_value = _val, \
  17. .name = _name, \
  18. }
  19. /* BUCK : 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 */
  20. static struct dm_regulator_mode s2mps11_buck_modes[] = {
  21. MODE(OP_OFF, S2MPS11_BUCK_MODE_OFF, "OFF"),
  22. MODE(OP_STANDBY, S2MPS11_BUCK_MODE_STANDBY, "ON/OFF"),
  23. MODE(OP_ON, S2MPS11_BUCK_MODE_STANDBY, "ON"),
  24. };
  25. static struct dm_regulator_mode s2mps11_ldo_modes[] = {
  26. MODE(OP_OFF, S2MPS11_LDO_MODE_OFF, "OFF"),
  27. MODE(OP_STANDBY, S2MPS11_LDO_MODE_STANDBY, "ON/OFF"),
  28. MODE(OP_STANDBY_LPM, S2MPS11_LDO_MODE_STANDBY_LPM, "ON/LPM"),
  29. MODE(OP_ON, S2MPS11_LDO_MODE_ON, "ON"),
  30. };
  31. static const char s2mps11_buck_ctrl[] = {
  32. 0xff, 0x25, 0x27, 0x29, 0x2b, 0x2d, 0x33, 0x35, 0x37, 0x39, 0x3b
  33. };
  34. static const char s2mps11_buck_out[] = {
  35. 0xff, 0x26, 0x28, 0x2a, 0x2c, 0x2f, 0x34, 0x36, 0x38, 0x3a, 0x3c
  36. };
  37. static int s2mps11_buck_hex2volt(int buck, int hex)
  38. {
  39. unsigned int uV = 0;
  40. if (hex < 0)
  41. goto bad;
  42. switch (buck) {
  43. case 7:
  44. case 8:
  45. case 10:
  46. if (hex > S2MPS11_BUCK7_8_10_VOLT_MAX_HEX)
  47. goto bad;
  48. uV = hex * S2MPS11_BUCK_HSTEP + S2MPS11_BUCK_UV_HMIN;
  49. break;
  50. case 9:
  51. if (hex > S2MPS11_BUCK9_VOLT_MAX_HEX)
  52. goto bad;
  53. uV = hex * S2MPS11_BUCK9_STEP * 2 + S2MPS11_BUCK9_UV_MIN;
  54. break;
  55. default:
  56. if (buck == 5 && hex > S2MPS11_BUCK5_VOLT_MAX_HEX)
  57. goto bad;
  58. else if (buck != 5 && hex > S2MPS11_BUCK_VOLT_MAX_HEX)
  59. goto bad;
  60. uV = hex * S2MPS11_BUCK_LSTEP + S2MPS11_BUCK_UV_MIN;
  61. break;
  62. }
  63. return uV;
  64. bad:
  65. pr_err("Value: %#x is wrong for BUCK%d", hex, buck);
  66. return -EINVAL;
  67. }
  68. static int s2mps11_buck_volt2hex(int buck, int uV)
  69. {
  70. int hex;
  71. switch (buck) {
  72. case 7:
  73. case 8:
  74. case 10:
  75. hex = (uV - S2MPS11_BUCK_UV_HMIN) / S2MPS11_BUCK_HSTEP;
  76. if (hex > S2MPS11_BUCK7_8_10_VOLT_MAX_HEX)
  77. goto bad;
  78. break;
  79. case 9:
  80. hex = (uV - S2MPS11_BUCK9_UV_MIN) / S2MPS11_BUCK9_STEP;
  81. if (hex > S2MPS11_BUCK9_VOLT_MAX_HEX)
  82. goto bad;
  83. break;
  84. default:
  85. hex = (uV - S2MPS11_BUCK_UV_MIN) / S2MPS11_BUCK_LSTEP;
  86. if (buck == 5 && hex > S2MPS11_BUCK5_VOLT_MAX_HEX)
  87. goto bad;
  88. else if (buck != 5 && hex > S2MPS11_BUCK_VOLT_MAX_HEX)
  89. goto bad;
  90. break;
  91. };
  92. if (hex >= 0)
  93. return hex;
  94. bad:
  95. pr_err("Value: %d uV is wrong for BUCK%d", uV, buck);
  96. return -EINVAL;
  97. }
  98. static int s2mps11_buck_val(struct udevice *dev, int op, int *uV)
  99. {
  100. int hex, buck, ret;
  101. u32 mask, addr;
  102. u8 val;
  103. buck = dev->driver_data;
  104. if (buck < 1 || buck > S2MPS11_BUCK_NUM) {
  105. pr_err("Wrong buck number: %d\n", buck);
  106. return -EINVAL;
  107. }
  108. if (op == PMIC_OP_GET)
  109. *uV = 0;
  110. addr = s2mps11_buck_out[buck];
  111. switch (buck) {
  112. case 9:
  113. mask = S2MPS11_BUCK9_VOLT_MASK;
  114. break;
  115. default:
  116. mask = S2MPS11_BUCK_VOLT_MASK;
  117. break;
  118. }
  119. ret = pmic_read(dev->parent, addr, &val, 1);
  120. if (ret)
  121. return ret;
  122. if (op == PMIC_OP_GET) {
  123. val &= mask;
  124. ret = s2mps11_buck_hex2volt(buck, val);
  125. if (ret < 0)
  126. return ret;
  127. *uV = ret;
  128. return 0;
  129. }
  130. hex = s2mps11_buck_volt2hex(buck, *uV);
  131. if (hex < 0)
  132. return hex;
  133. val &= ~mask;
  134. val |= hex;
  135. ret = pmic_write(dev->parent, addr, &val, 1);
  136. return ret;
  137. }
  138. static int s2mps11_buck_mode(struct udevice *dev, int op, int *opmode)
  139. {
  140. unsigned int addr, mode;
  141. unsigned char val;
  142. int buck, ret;
  143. buck = dev->driver_data;
  144. if (buck < 1 || buck > S2MPS11_BUCK_NUM) {
  145. pr_err("Wrong buck number: %d\n", buck);
  146. return -EINVAL;
  147. }
  148. addr = s2mps11_buck_ctrl[buck];
  149. ret = pmic_read(dev->parent, addr, &val, 1);
  150. if (ret)
  151. return ret;
  152. if (op == PMIC_OP_GET) {
  153. val &= (S2MPS11_BUCK_MODE_MASK << S2MPS11_BUCK_MODE_SHIFT);
  154. switch (val) {
  155. case S2MPS11_BUCK_MODE_OFF:
  156. *opmode = OP_OFF;
  157. break;
  158. case S2MPS11_BUCK_MODE_STANDBY:
  159. *opmode = OP_STANDBY;
  160. break;
  161. case S2MPS11_BUCK_MODE_ON:
  162. *opmode = OP_ON;
  163. break;
  164. default:
  165. return -EINVAL;
  166. }
  167. return 0;
  168. }
  169. switch (*opmode) {
  170. case OP_OFF:
  171. mode = S2MPS11_BUCK_MODE_OFF;
  172. break;
  173. case OP_STANDBY:
  174. mode = S2MPS11_BUCK_MODE_STANDBY;
  175. break;
  176. case OP_ON:
  177. mode = S2MPS11_BUCK_MODE_ON;
  178. break;
  179. default:
  180. pr_err("Wrong mode: %d for buck: %d\n", *opmode, buck);
  181. return -EINVAL;
  182. }
  183. val &= ~(S2MPS11_BUCK_MODE_MASK << S2MPS11_BUCK_MODE_SHIFT);
  184. val |= mode;
  185. ret = pmic_write(dev->parent, addr, &val, 1);
  186. return ret;
  187. }
  188. static int s2mps11_buck_enable(struct udevice *dev, int op, bool *enable)
  189. {
  190. int ret, on_off;
  191. if (op == PMIC_OP_GET) {
  192. ret = s2mps11_buck_mode(dev, op, &on_off);
  193. if (ret)
  194. return ret;
  195. switch (on_off) {
  196. case OP_OFF:
  197. *enable = false;
  198. break;
  199. case OP_ON:
  200. *enable = true;
  201. break;
  202. default:
  203. return -EINVAL;
  204. }
  205. } else if (op == PMIC_OP_SET) {
  206. if (*enable)
  207. on_off = OP_ON;
  208. else
  209. on_off = OP_OFF;
  210. ret = s2mps11_buck_mode(dev, op, &on_off);
  211. if (ret)
  212. return ret;
  213. }
  214. return 0;
  215. }
  216. static int buck_get_value(struct udevice *dev)
  217. {
  218. int uV;
  219. int ret;
  220. ret = s2mps11_buck_val(dev, PMIC_OP_GET, &uV);
  221. if (ret)
  222. return ret;
  223. return uV;
  224. }
  225. static int buck_set_value(struct udevice *dev, int uV)
  226. {
  227. return s2mps11_buck_val(dev, PMIC_OP_SET, &uV);
  228. }
  229. static int buck_get_enable(struct udevice *dev)
  230. {
  231. bool enable = false;
  232. int ret;
  233. ret = s2mps11_buck_enable(dev, PMIC_OP_GET, &enable);
  234. if (ret)
  235. return ret;
  236. return enable;
  237. }
  238. static int buck_set_enable(struct udevice *dev, bool enable)
  239. {
  240. return s2mps11_buck_enable(dev, PMIC_OP_SET, &enable);
  241. }
  242. static int buck_get_mode(struct udevice *dev)
  243. {
  244. int mode;
  245. int ret;
  246. ret = s2mps11_buck_mode(dev, PMIC_OP_GET, &mode);
  247. if (ret)
  248. return ret;
  249. return mode;
  250. }
  251. static int buck_set_mode(struct udevice *dev, int mode)
  252. {
  253. return s2mps11_buck_mode(dev, PMIC_OP_SET, &mode);
  254. }
  255. static int s2mps11_buck_probe(struct udevice *dev)
  256. {
  257. struct dm_regulator_uclass_platdata *uc_pdata;
  258. uc_pdata = dev_get_uclass_platdata(dev);
  259. uc_pdata->type = REGULATOR_TYPE_BUCK;
  260. uc_pdata->mode = s2mps11_buck_modes;
  261. uc_pdata->mode_count = ARRAY_SIZE(s2mps11_buck_modes);
  262. return 0;
  263. }
  264. static const struct dm_regulator_ops s2mps11_buck_ops = {
  265. .get_value = buck_get_value,
  266. .set_value = buck_set_value,
  267. .get_enable = buck_get_enable,
  268. .set_enable = buck_set_enable,
  269. .get_mode = buck_get_mode,
  270. .set_mode = buck_set_mode,
  271. };
  272. U_BOOT_DRIVER(s2mps11_buck) = {
  273. .name = S2MPS11_BUCK_DRIVER,
  274. .id = UCLASS_REGULATOR,
  275. .ops = &s2mps11_buck_ops,
  276. .probe = s2mps11_buck_probe,
  277. };
  278. static int s2mps11_ldo_hex2volt(int ldo, int hex)
  279. {
  280. unsigned int uV = 0;
  281. if (hex > S2MPS11_LDO_VOLT_MAX_HEX) {
  282. pr_err("Value: %#x is wrong for LDO%d", hex, ldo);
  283. return -EINVAL;
  284. }
  285. switch (ldo) {
  286. case 1:
  287. case 6:
  288. case 11:
  289. case 22:
  290. case 23:
  291. uV = hex * S2MPS11_LDO_STEP + S2MPS11_LDO_UV_MIN;
  292. break;
  293. default:
  294. uV = hex * S2MPS11_LDO_STEP * 2 + S2MPS11_LDO_UV_MIN;
  295. break;
  296. }
  297. return uV;
  298. }
  299. static int s2mps11_ldo_volt2hex(int ldo, int uV)
  300. {
  301. int hex = 0;
  302. switch (ldo) {
  303. case 1:
  304. case 6:
  305. case 11:
  306. case 22:
  307. case 23:
  308. hex = (uV - S2MPS11_LDO_UV_MIN) / S2MPS11_LDO_STEP;
  309. break;
  310. default:
  311. hex = (uV - S2MPS11_LDO_UV_MIN) / (S2MPS11_LDO_STEP * 2);
  312. break;
  313. }
  314. if (hex >= 0 && hex <= S2MPS11_LDO_VOLT_MAX_HEX)
  315. return hex;
  316. pr_err("Value: %d uV is wrong for LDO%d", uV, ldo);
  317. return -EINVAL;
  318. return 0;
  319. }
  320. static int s2mps11_ldo_val(struct udevice *dev, int op, int *uV)
  321. {
  322. unsigned int addr;
  323. unsigned char val;
  324. int hex, ldo, ret;
  325. ldo = dev->driver_data;
  326. if (ldo < 1 || ldo > S2MPS11_LDO_NUM) {
  327. pr_err("Wrong ldo number: %d\n", ldo);
  328. return -EINVAL;
  329. }
  330. addr = S2MPS11_REG_L1CTRL + ldo - 1;
  331. ret = pmic_read(dev->parent, addr, &val, 1);
  332. if (ret)
  333. return ret;
  334. if (op == PMIC_OP_GET) {
  335. *uV = 0;
  336. val &= S2MPS11_LDO_VOLT_MASK;
  337. ret = s2mps11_ldo_hex2volt(ldo, val);
  338. if (ret < 0)
  339. return ret;
  340. *uV = ret;
  341. return 0;
  342. }
  343. hex = s2mps11_ldo_volt2hex(ldo, *uV);
  344. if (hex < 0)
  345. return hex;
  346. val &= ~S2MPS11_LDO_VOLT_MASK;
  347. val |= hex;
  348. ret = pmic_write(dev->parent, addr, &val, 1);
  349. return ret;
  350. }
  351. static int s2mps11_ldo_mode(struct udevice *dev, int op, int *opmode)
  352. {
  353. unsigned int addr, mode;
  354. unsigned char val;
  355. int ldo, ret;
  356. ldo = dev->driver_data;
  357. if (ldo < 1 || ldo > S2MPS11_LDO_NUM) {
  358. pr_err("Wrong ldo number: %d\n", ldo);
  359. return -EINVAL;
  360. }
  361. addr = S2MPS11_REG_L1CTRL + ldo - 1;
  362. ret = pmic_read(dev->parent, addr, &val, 1);
  363. if (ret)
  364. return ret;
  365. if (op == PMIC_OP_GET) {
  366. val &= (S2MPS11_LDO_MODE_MASK << S2MPS11_LDO_MODE_SHIFT);
  367. switch (val) {
  368. case S2MPS11_LDO_MODE_OFF:
  369. *opmode = OP_OFF;
  370. break;
  371. case S2MPS11_LDO_MODE_STANDBY:
  372. *opmode = OP_STANDBY;
  373. break;
  374. case S2MPS11_LDO_MODE_STANDBY_LPM:
  375. *opmode = OP_STANDBY_LPM;
  376. break;
  377. case S2MPS11_LDO_MODE_ON:
  378. *opmode = OP_ON;
  379. break;
  380. default:
  381. return -EINVAL;
  382. }
  383. return 0;
  384. }
  385. switch (*opmode) {
  386. case OP_OFF:
  387. mode = S2MPS11_LDO_MODE_OFF;
  388. break;
  389. case OP_STANDBY:
  390. mode = S2MPS11_LDO_MODE_STANDBY;
  391. break;
  392. case OP_STANDBY_LPM:
  393. mode = S2MPS11_LDO_MODE_STANDBY_LPM;
  394. break;
  395. case OP_ON:
  396. mode = S2MPS11_LDO_MODE_ON;
  397. break;
  398. default:
  399. pr_err("Wrong mode: %d for ldo: %d\n", *opmode, ldo);
  400. return -EINVAL;
  401. }
  402. val &= ~(S2MPS11_LDO_MODE_MASK << S2MPS11_LDO_MODE_SHIFT);
  403. val |= mode;
  404. ret = pmic_write(dev->parent, addr, &val, 1);
  405. return ret;
  406. }
  407. static int s2mps11_ldo_enable(struct udevice *dev, int op, bool *enable)
  408. {
  409. int ret, on_off;
  410. if (op == PMIC_OP_GET) {
  411. ret = s2mps11_ldo_mode(dev, op, &on_off);
  412. if (ret)
  413. return ret;
  414. switch (on_off) {
  415. case OP_OFF:
  416. *enable = false;
  417. break;
  418. case OP_ON:
  419. *enable = true;
  420. break;
  421. default:
  422. return -EINVAL;
  423. }
  424. } else if (op == PMIC_OP_SET) {
  425. if (*enable)
  426. on_off = OP_ON;
  427. else
  428. on_off = OP_OFF;
  429. ret = s2mps11_ldo_mode(dev, op, &on_off);
  430. if (ret)
  431. return ret;
  432. }
  433. return 0;
  434. }
  435. static int ldo_get_value(struct udevice *dev)
  436. {
  437. int uV;
  438. int ret;
  439. ret = s2mps11_ldo_val(dev, PMIC_OP_GET, &uV);
  440. if (ret)
  441. return ret;
  442. return uV;
  443. }
  444. static int ldo_set_value(struct udevice *dev, int uV)
  445. {
  446. return s2mps11_ldo_val(dev, PMIC_OP_SET, &uV);
  447. }
  448. static int ldo_get_enable(struct udevice *dev)
  449. {
  450. bool enable = false;
  451. int ret;
  452. ret = s2mps11_ldo_enable(dev, PMIC_OP_GET, &enable);
  453. if (ret)
  454. return ret;
  455. return enable;
  456. }
  457. static int ldo_set_enable(struct udevice *dev, bool enable)
  458. {
  459. return s2mps11_ldo_enable(dev, PMIC_OP_SET, &enable);
  460. }
  461. static int ldo_get_mode(struct udevice *dev)
  462. {
  463. int mode, ret;
  464. ret = s2mps11_ldo_mode(dev, PMIC_OP_GET, &mode);
  465. if (ret)
  466. return ret;
  467. return mode;
  468. }
  469. static int ldo_set_mode(struct udevice *dev, int mode)
  470. {
  471. return s2mps11_ldo_mode(dev, PMIC_OP_SET, &mode);
  472. }
  473. static int s2mps11_ldo_probe(struct udevice *dev)
  474. {
  475. struct dm_regulator_uclass_platdata *uc_pdata;
  476. uc_pdata = dev_get_uclass_platdata(dev);
  477. uc_pdata->type = REGULATOR_TYPE_LDO;
  478. uc_pdata->mode = s2mps11_ldo_modes;
  479. uc_pdata->mode_count = ARRAY_SIZE(s2mps11_ldo_modes);
  480. return 0;
  481. }
  482. static const struct dm_regulator_ops s2mps11_ldo_ops = {
  483. .get_value = ldo_get_value,
  484. .set_value = ldo_set_value,
  485. .get_enable = ldo_get_enable,
  486. .set_enable = ldo_set_enable,
  487. .get_mode = ldo_get_mode,
  488. .set_mode = ldo_set_mode,
  489. };
  490. U_BOOT_DRIVER(s2mps11_ldo) = {
  491. .name = S2MPS11_LDO_DRIVER,
  492. .id = UCLASS_REGULATOR,
  493. .ops = &s2mps11_ldo_ops,
  494. .probe = s2mps11_ldo_probe,
  495. };